Skyworks Solutions Inc. SI5351B-B13189-GM1
- Part No.:
- SI5351B-B13189-GM1
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- 16-VFQFN Exposed Pad
- Datasheet:
-
SI5351B-B13189-GM1.pdf
- Description:
- IC CLOCK GENERATOR 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,322
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Product details
Overview
SI5351B-B13189-GM1 from Skyworks Solutions is an I²C-programmable, 4-output CMOS clock generator with integrated VCXO, generating frequencies from 2.5 kHz to 200 MHz per output with 0 ppm synthesis error. It replaces crystals, crystal oscillators, and discrete VCXOs in cost-sensitive timing applications, supporting independent voltage supplies (VDD = 2.5/3.3 V; VDDO = 1.8/2.5/3.3 V) and operating across –40°C to +85°C.
For engineers reviewing the SI5351B-B13189-GM1 datasheet, SI5351B-B13189-GM1 pinout, SI5351B-B13189-GM1 application, or SI5351B-B13189-GM1 equivalent, this device delivers precise multi-frequency synthesis with VCXO tuning capability, low period jitter (<70 ps pk-pk), configurable spread spectrum, and HCSL-compatible output swing - critical for audio/video equipment, networking gear, and embedded instrumentation timing subsystems.
Technical Context
The SI5351B-B13189-GM1 implements a dual-PLL architecture: PLL A (SSC-capable) and PLL B (VCXO-based), both fed by either a 25/27 MHz crystal or optional CLKIN (10–100 MHz). Its eight MultiSynth fractional dividers enable independent frequency synthesis per output, with static phase offset control and glitchless frequency transitions.
It supports VCXO tuning over 0–VDD range with configurable gain (18–150 ppm/V) and ±240 ppm pull range at 3.3 V, while maintaining high linearity (±5%) and 10 kHz modulation bandwidth. Output drive strength, rise/fall time, and spread spectrum (down/center, 0.1–2.5% deviation at 31.5 kHz) are programmable per channel.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count | 4 independent CMOS outputs (CLK0–CLK3), each configurable to 2.5 kHz–200 MHz |
| Frequency accuracy | 0 ppm synthesis error - eliminates need for trimming or calibration in production |
| VCXO tuning range | ±240 ppm at 3.3 V - enables synchronization to external control loops without custom pullable crystals |
| Period jitter | <70 ps pk-pk (typ.) - meets PCIe Gen 1 jitter requirements and supports high-speed serial interfaces |
| Supply flexibility | VDD = 2.5/3.3 V; VDDO = 1.8/2.5/3.3 V - allows level translation to mixed-voltage SoCs and FPGAs |
| Spread spectrum | Selectable per output: down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) - reduces EMI in dense PCB layouts |
| I²C interface | Standard/Fast mode (100/400 kbps); VDDI²C = 2.25–3.63 V - compatible with most microcontrollers and PMICs |
Pinout & Package
SI5351B-B13189-GM1 is housed in a 16-pin QFN package (3 mm × 3 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Si5351B 16-QFN pinout specification (Rev. 1.3, Section 10.5).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| R0 (Pin 1) | CLK0 output | Primary CMOS clock output; independently configurable frequency, drive strength, and spread spectrum |
| R1 (Pin 2) | CLK1 output | Secondary output with static phase offset control relative to CLK0 - enables skew management |
| VDDOA (Pin 3) | CLK0/CLK1 output supply | Independent voltage rail for outputs R0/R1 - enables 1.8 V logic interfacing while core runs at 3.3 V |
| R2 (Pin 4) | CLK2 output | Third output with programmable rise/fall time - supports HCSL-compatible swing (8–12 mA) |
| R3 (Pin 5) | CLK3 output | Fourth output; supports glitchless frequency change - safe for dynamic reconfiguration in live systems |
| VDDOB (Pin 6) | CLK2/CLK3 output supply | Dedicated supply for R2/R3 - isolates noise between output groups |
| SCL (Pin 7) | I²C clock input | Open-drain input; accepts 100/400 kbps; requires external pull-up to VDDI²C (2.25–3.63 V) |
| SDA (Pin 8) | I²C data bidirectional | Open-drain I/O; shares same pull-up as SCL - supports standard I²C bus topology |
| OEB (Pin 9) | Output enable bar | Active-low global enable; drives all outputs to high-impedance when asserted - simplifies power sequencing |
| VC (Pin 10) | VCXO control voltage | Analog input (0–VDD); sets VCXO frequency with linear ±5% gain tolerance - connects to DAC or loop filter |
| XA (Pin 11) | Crytal input A | Connects to one terminal of 25/27 MHz AT-cut crystal; internal load capacitance selectable (0/6/8/10 pF) |
| XB (Pin 12) | Crytal input B | Connects to other crystal terminal; supports optional external load caps ≤2 pF total - eliminates external matching network |
| VDD (Pin 13) | Core supply | 2.5 V or 3.3 V digital core supply; must be powered before or simultaneously with VDDOx rails |
| GND (Pin 14) | Digital ground | Reference for core logic and I²C interface; separate from analog ground (no dedicated AGND pin) |
| CLKIN (Pin 15) | External reference input | Accepts 10–100 MHz single-ended clock; used only in Si5351C variant - not functional in SI5351B-B13189-GM1 |
| EPAD (Pin 16) | Thermal pad | Internally connected to GND; must be soldered to PCB thermal plane - lowers θJA to 65°C/W (4-layer board) |
Key Features
| Feature | Design Value |
|---|---|
| VCXO integration | Eliminates need for external pullable crystal or discrete VCXO - reduces BOM count and layout area by ≥3 components |
| Per-output spread spectrum | Reduces peak EMI by >10 dB across 30–33 kHz band - enables compliance with FCC Class B without added shielding |
| Independent VDDO rails | Allows simultaneous 1.8 V (FPGA I/O) and 3.3 V (microcontroller) clocking from single device - avoids level shifters |
| Glitchless frequency switching | Enables runtime clock reconfiguration (e.g., CPU DVFS, display refresh rate changes) without system reset or clock interruption |
| Configurable output drive | Adjustable rise/fall time (1–1.5 ns typ.) and HCSL-compatible swing - matches legacy SerDes and PHY timing requirements |
Applications
| Audio/Video Timing | Networking Equipment |
|---|---|
Use Scenario: Generating synchronized pixel clocks (74.25 MHz), audio master clocks (24.576 MHz), and HDMI TMDS clocks (165 MHz) in AV receivers and set-top boxes. IC Role / Device Role / Timing Role: Single-chip multi-domain clock source replacing 4 discrete oscillators and a PLL. Use Value: Reduces timing skew between video and audio paths to <100 ps, enabling lip-sync compliance per CEA-861. | Use Scenario: Providing reference clocks for Ethernet PHYs (25 MHz), switch fabric (125 MHz), and USB 3.0 controllers (100 MHz) in residential gateways. IC Role / Device Role / Timing Role: I²C-configurable clock generator with VCXO support for IEEE 1588 PTP slave clock alignment. Use Value: Enables sub-microsecond time-stamp accuracy via VCXO tuning against GPS-disciplined reference. |
| Embedded Instrumentation | Laser Range Finders |
Use Scenario: Delivering precise trigger clocks (100 MHz) and sampling clocks (50 MHz) for handheld oscilloscopes and spectrum analyzers. IC Role / Device Role / Timing Role: Low-jitter (<70 ps pk-pk) clock source for ADC/DAC synchronization and FPGA logic timing. Use Value: Improves effective number of bits (ENOB) by 1.2 bits versus crystal oscillator due to reduced aperture jitter. | Use Scenario: Generating laser pulse timing (10–50 MHz) and time-of-flight measurement clocks (200 MHz) in compact LIDAR modules. IC Role / Device Role / Timing Role: VCXO-based clock generator locked to stable temperature-compensated reference for drift compensation. Use Value: Maintains ±2 mm distance accuracy over –20°C to +70°C ambient via 240 ppm VCXO pull range. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5351A-B-GM1 | No VCXO; uses only crystal reference - lacks voltage-controlled tuning capability | Suitable only for free-running clock generation; cannot track external control signals or compensate for drift | Select when VCXO functionality is unnecessary and lowest BOM cost is prioritized |
| Si5351C-B-GM1 | Includes CLKIN input (10–100 MHz); no VC pin - synchronizes to external reference instead of analog voltage | Required for systems with existing high-accuracy reference (e.g., OCXO, GPSDO); no analog control loop needed | Select when synchronization to external timing source is mandatory and VCXO is not required |
Compared with Si5351A-B-GM1 and Si5351C-B-GM1, the SI5351B-B13189-GM1 uniquely provides analog VCXO control for closed-loop frequency adjustment - essential for applications requiring real-time drift correction, temperature compensation, or phase-locking to analog control voltages without external PLL circuitry.
Availability
SI5351B-B13189-GM1 is available at Aetrix Electronics and suitable for audio/video equipment, networking gear, and embedded instrumentation requiring stable component supply, long-term lifecycle support, and consistent electrical performance across temperature and voltage variations.
Supply support for SI5351B-B13189-GM1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.
The SI5351B-B13189-GM1 belongs to Skyworks' Si5351 family of I²C-programmable clock generators designed for cost-sensitive, space-constrained applications needing flexible, multi-frequency timing with VCXO capability - targeting consumer, industrial, and communications end markets.
FAQ
What is the maximum output frequency supported by the SI5351B-B13189-GM1?
The SI5351B-B13189-GM1 supports output frequencies from 2.5 kHz up to 200 MHz on each of its four outputs. However, only two unique frequencies above 112.5 MHz may be generated simultaneously - for example, 125 MHz and 150 MHz can coexist, but adding a third >112.5 MHz frequency (e.g., 130 MHz) violates the device's synthesis constraint. This limitation arises from internal PLL resource allocation in the Si5351B architecture.
Does the SI5351B-B13189-GM1 require an external crystal?
Yes, the SI5351B-B13189-GM1 requires a 25 MHz or 27 MHz fundamental-mode AT-cut crystal connected across XA and XB pins. The device includes programmable internal load capacitance (0/6/8/10 pF) to eliminate external capacitors for standard 8–10 pF crystals. Crystals with 12 pF load requirement may need ≤2 pF additional external capacitance. No external crystal is needed if using CLKIN - but CLKIN is not functional in the Si5351B variant.
Can the SI5351B-B13189-GM1 generate spread spectrum clocking on individual outputs?
Yes, the SI5351B-B13189-GM1 supports per-output spread spectrum clocking (SSC) with selectable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) modulation at a fixed 31.5 kHz rate. SSC is configured independently for each of the four outputs via I²C register writes, allowing targeted EMI reduction on noise-sensitive interfaces (e.g., USB, HDMI) while leaving other clocks unmodulated for jitter-critical paths.
What is the function of the VC pin on the SI5351B-B13189-GM1?
The VC pin on the SI5351B-B13189-GM1 is the analog voltage control input for its integrated VCXO. Applying a DC voltage from 0 V to VDD tunes the output frequency linearly within a configurable range (up to ±240 ppm at 3.3 V). This enables closed-loop frequency stabilization, temperature compensation, or synchronization to analog control signals - eliminating the need for external VCXO components and reducing system-level calibration complexity.
Is the SI5351B-B13189-GM1 pin-compatible with other Si5351 variants in the same package?
Yes, the SI5351B-B13189-GM1 in the 16-pin QFN package shares identical pinout and footprint with Si5351A-B-GM1 and Si5351C-B-GM1. All three variants use the same mechanical layout, thermal pad, and I/O assignment. However, functional differences exist: CLKIN (Pin 15) is unused in Si5351B, and VC (Pin 10) is inactive in Si5351A/C. PCB designs can accommodate all three variants with software configuration only - no layout change required.
SI5351B-B13189-GM1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-VFQFN Exposed Pad
- Packaging:
- Strip
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Clock Generator, VCXO
- PLL:
- Yes
- Input:
- Clock, Crystal
- Output:
- LVCMOS
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 1:4
- Differential - Input:Output:
- No/No
- Frequency - Max:
- 200MHz
- Divider/Multiplier:
- Yes/No
- Voltage - Supply:
- 2.25V ~ 2.75V, 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 16-QFN (3x3)
SI5351B-B13189-GM1 FAQ
1.How can I place an order for SI5351B-B13189-GM1 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5351B-B13189-GM1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5351B-B13189-GM1 reliable?
The price and inventory of SI5351B-B13189-GM1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5351B-B13189-GM1 is usually 5 days.
3.What payment methods are accepted for SI5351B-B13189-GM1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5351B-B13189-GM1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5351B-B13189-GM1?
SI5351B-B13189-GM1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5351B-B13189-GM1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5351B-B13189-GM1?
For technical support, including SI5351B-B13189-GM1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5351B-B13189-GM1 requirements.
6.How does Aetrix verify that SI5351B-B13189-GM1 is sourced from the original manufacturer or authorized distributors?
All SI5351B-B13189-GM1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5351B-B13189-GM1 meets industry standards.
7.What is the process for return or replacement of SI5351B-B13189-GM1?
All SI5351B-B13189-GM1 units undergo pre-shipment inspection (PSI). If there is an issue with SI5351B-B13189-GM1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5351B-B13189-GM1 part is unused and in its original packaging.
Return procedure for SI5351B-B13189-GM1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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