Skyworks Solutions Inc. SI5351C-B02659-GM
- Part No.:
- SI5351C-B02659-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- -
- Datasheet:
-
SI5351C-B02659-GM.pdf
- Description:
- IC CLOCK GENERATOR 20QFN
- Quantity:
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Product details
Overview
SI5351C-B02659-GM from Skyworks Solutions is an I²C-programmable, 4-output CMOS clock generator with external reference (CLKIN) synchronization capability, integrated VCXO architecture, 0 ppm frequency synthesis error, <70 ps pk-pk period jitter, and independent 1.8/2.5/3.3 V output supply rails - used in residential gateways and networking equipment requiring multi-domain synchronous clocking.
For engineers reviewing the SI5351C-B02659-GM datasheet, SI5351C-B02659-GM pinout, SI5351C-B02659-GM application, or SI5351C-B02659-GM equivalent, key selection criteria include CLKIN-synchronized operation, VCXO tuning range (±240 ppm), 4-output QFN-16 package, I²C register programmability, and HCSL-compatible swing support.
Technical Context
The SI5351C-B02659-GM implements a dual-PLL architecture where PLLA locks to an external 10–100 MHz CLKIN reference while PLLB may lock to either CLKIN or the internal 25/27 MHz crystal oscillator. Each of its four outputs is driven by a dedicated MultiSynth fractional divider enabling non-integer-related frequencies from 2.5 kHz to 200 MHz.
It supports static phase offset control, glitchless frequency changes, programmable rise/fall times, and configurable spread spectrum (±0.1% to ±1.5% deviation at 31.5 kHz modulation rate). Output voltage rails (VDDOA–VDDOD) are independently configurable for level translation across 1.8 V, 2.5 V, or 3.3 V logic families.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Outputs | 4 independent CMOS clock outputs (CLK0–CLK3) |
| Frequency Range | 2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz simultaneously allowed |
| Reference Input | External CLKIN (10–100 MHz) + optional 25/27 MHz crystal (XA/XB) |
| Period Jitter | <70 ps pk-pk (typical, all outputs active, default drive strength) |
| VCXO Pull Range | Configurable ±240 ppm max (at VDD = 3.3 V) |
| Supply Voltages | Core VDD: 2.25–3.6 V; Output VDDOx: 1.71–3.6 V, independently set per rail |
| I²C Interface | Standard/Fast mode (100/400 kbps); SCL/SDA compatible with 2.25–3.63 V pull-up |
Pinout & Package
SI5351C-B02659-GM is housed in a 16-pin QFN (3 mm × 3 mm, 0.5 mm pitch) package with exposed thermal pad. Pin functions align with the Si5351C 16-QFN variant per Skyworks datasheet Rev. 1.3, Section 10.6.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLK0–CLK3 | CMOS clock outputs | Individually programmable frequency, phase, drive strength, and spread spectrum |
| VDDOA–VDDOD | Output buffer supply rails | Independent voltage setting per output group (1.8/2.5/3.3 V logic level translation) |
| SCL / SDA | I²C serial interface | Configuration and real-time reprogramming; supports standard/fast mode up to 400 kbps |
| CLKIN | External reference input | Accepts 10–100 MHz clock; enables synchronous output generation locked to system master clock |
| XA / XB | Crystal oscillator inputs | Supports 25 or 27 MHz AT-cut crystal; internal load capacitance selectable (0/6/8/10 pF) |
| OEB | Output enable bar | Active-low global output disable; asynchronous assertion halts all clock outputs without reset |
| VDD / GND | Core power and ground | VDD = 2.25–3.6 V; power sequencing requires VDDOx powered before or concurrently with VDD |
| VC | VCXO control voltage | 0–VDD tuning range; enables ±240 ppm pull range with high linearity (±5% gain error) |
Key Features
| Feature | Design Value |
|---|---|
| CLKIN-synchronized outputs | Enables deterministic phase alignment to external system clock - critical for PCIe Gen 1 and networking PHY timing compliance |
| Independent output VDDO rails | Permits mixed-voltage board designs (e.g., 1.8 V FPGA core + 3.3 V PHY interface) without external level shifters |
| Glitchless frequency switching | Allows dynamic clock rate changes during operation - essential for power-aware SoC DVFS schemes |
| Programmable rise/fall time | Reduces EMI and signal integrity issues on long traces by matching edge rates to trace impedance and receiver requirements |
| HCSL-compatible swing | Configurable output drive supports HCSL-level signaling (≈0.8 V differential) for direct connection to SerDes receivers |
Applications
| Residential Gateway Timing | Networking PHY Clocking |
|---|---|
Use Scenario: Synchronizing multiple Ethernet PHYs, Wi-Fi radios, and CPU subsystems within a single-box broadband router using one shared 25 MHz system reference. IC Role / Device Role / Timing Role: Generates four precisely aligned clocks (e.g., 125 MHz for 1G PHY, 50 MHz for Wi-Fi MAC, 25 MHz for CPU bus, 100 MHz for USB 2.0) locked to CLKIN. Use Value: Eliminates four discrete oscillators, reduces BOM count and board area, and ensures zero ppm inter-clock skew across domains. | Use Scenario: Providing low-jitter, spread-spectrum-capable clocks to 10/100/1000BASE-T PHYs in managed switches with EMI-sensitive front-panel interfaces. IC Role / Device Role / Timing Role: Delivers 25 MHz, 125 MHz, and 250 MHz clocks with configurable SSC (–0.5% down-spread) to meet FCC Class B emissions limits. Use Value: Meets CISPR 22/32 radiated emission requirements without adding ferrites or shielding, simplifying EMC validation. |
| Laser Range Finder Synchronization | Audio/Video Equipment Clocking |
Use Scenario: Coordinating time-of-flight measurement cycles between laser diode driver, ADC sampling, and FPGA processing in handheld LIDAR modules. IC Role / Device Role / Timing Role: Supplies 100 MHz sampling clock to ADC, 50 MHz logic clock to FPGA, and 200 MHz trigger pulse to laser driver - all phase-locked to a common 25 MHz master. Use Value: Enables sub-nanosecond timing correlation between emission and capture events, improving distance resolution to ±1 mm. | Use Scenario: Replacing multiple crystals in AV receivers supporting HDMI, SPDIF, and USB audio with varying sample rates (44.1 kHz, 48 kHz, 96 kHz, 192 kHz). IC Role / Device Role / Timing Role: Generates exact audio master clocks (e.g., 22.5792 MHz, 24.576 MHz, 27 MHz) with 0 ppm error and adjustable phase offsets for jitter-sensitive DACs. Use Value: Removes clock domain crossing artifacts and improves THD+N performance by >3 dB versus crystal-based solutions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5351B-B-GM1 | Internal VCXO only (no CLKIN input); same 4-output QFN-16 package and I²C interface | Requires internal crystal reference; unsuitable for systems needing external master clock lock | Select when cost-sensitive designs use only free-running clocks and do not require CLKIN synchronization |
| Si5341-A-GM | Higher-performance 10-output clock generator with JESD204B support, lower jitter (35 ps pk-pk), and integrated jitter cleaner | Targeted at high-speed data converters and RF sampling systems; over-spec'd for basic multi-clock routing | Select when sub-50 ps jitter, JESD204B compliance, or >4 outputs are required - otherwise SI5351C-B02659-GM offers better cost/performance balance |
Compared with Si5351B-B-GM1, SI5351C-B02659-GM adds CLKIN synchronization for deterministic phase alignment; compared with Si5341-A-GM, it trades higher integration and lower jitter for lower cost and simpler configuration in mid-tier timing applications.
Availability
SI5351C-B02659-GM is available at Aetrix Electronics and suitable for residential gateways, networking switches, laser range finders, and audio/video equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for SI5351C-B02659-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.
The Si5351 family is designed for cost-sensitive, multi-clock-domain applications requiring flexible, software-configurable timing - replacing crystals, oscillators, VCXOs, and PLLs with a single programmable IC.
FAQ
What reference inputs does the SI5351C-B02659-GM support?
The SI5351C-B02659-GM supports both an external 10–100 MHz CLKIN reference and a 25/27 MHz crystal connected to XA/XB pins. Unlike the Si5351A, it does not rely solely on the crystal; unlike the Si5351B, it does not use a VC-only tuning path. The CLKIN input enables synchronous clock generation, making SI5351C-B02659-GM ideal for systems requiring alignment to a master timing source.
How many outputs does the SI5351C-B02659-GM provide, and what are their voltage options?
The SI5351C-B02659-GM provides four CMOS clock outputs (CLK0–CLK3) in a 16-pin QFN package. Each output has its own dedicated supply rail (VDDOA–VDDOD), configurable independently for 1.8 V, 2.5 V, or 3.3 V operation. This allows SI5351C-B02659-GM to drive mixed-voltage components - such as a 1.8 V FPGA core and 3.3 V Ethernet PHY - without external level shifters.
Does the SI5351C-B02659-GM support spread spectrum clocking (SSC)?
Yes, the SI5351C-B02659-GM supports per-output spread spectrum clocking with selectable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) modulation at a fixed 31.5 kHz rate. This feature is programmable via I²C registers and helps reduce electromagnetic interference in noise-sensitive applications like residential gateways and AV receivers - a capability confirmed in Skyworks datasheet Rev. 1.3, Table 5.
What is the maximum VCXO pull range of the SI5351C-B02659-GM?
The SI5351C-B02659-GM supports a configurable VCXO pull range up to ±240 ppm when operated at VDD = 3.3 V, as specified in Skyworks datasheet Rev. 1.3, Table 5. The VC pin accepts 0–VDD control voltage with high linearity (±5% gain error), enabling precise frequency pulling for applications requiring dynamic clock adjustment - such as frequency margining or jitter reduction in networking PHYs.
Can the SI5351C-B02659-GM generate frequencies above 112.5 MHz?
Yes, the SI5351C-B02659-GM can generate frequencies up to 200 MHz per output, but only two *unique* frequencies above 112.5 MHz may be active simultaneously (e.g., 125 MHz and 150 MHz). Multiple outputs may replicate the same high-frequency clock (e.g., four 125 MHz outputs), as confirmed in Skyworks datasheet Rev. 1.3, Table 7 note 1. This constraint ensures stable PLL operation and low jitter performance across all outputs.
SI5351C-B02659-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- *
- Package/Case:
- -
- Packaging:
- Strip
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- -
SI5351C-B02659-GM FAQ
1.How can I place an order for SI5351C-B02659-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5351C-B02659-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5351C-B02659-GM reliable?
The price and inventory of SI5351C-B02659-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5351C-B02659-GM is usually 5 days.
3.What payment methods are accepted for SI5351C-B02659-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5351C-B02659-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5351C-B02659-GM?
SI5351C-B02659-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5351C-B02659-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5351C-B02659-GM?
For technical support, including SI5351C-B02659-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5351C-B02659-GM requirements.
6.How does Aetrix verify that SI5351C-B02659-GM is sourced from the original manufacturer or authorized distributors?
All SI5351C-B02659-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5351C-B02659-GM meets industry standards.
7.What is the process for return or replacement of SI5351C-B02659-GM?
All SI5351C-B02659-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5351C-B02659-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5351C-B02659-GM part is unused and in its original packaging.
Return procedure for SI5351C-B02659-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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