Skyworks Solutions Inc. SI5351C-B05819-GMR

Overview

SI5351C-B05819-GMR from Skyworks Solutions is an I²C-programmable, 4-output CMOS clock generator with external reference (CLKIN) synchronization capability, 2.5 kHz–200 MHz output frequency range, <70 ps pk-pk period jitter, and independent 1.8/2.5/3.3 V output supply rails. It replaces crystals, crystal oscillators, and VCXOs in residential gateways and networking equipment.

For engineers reviewing the SI5351C-B05819-GMR datasheet, SI5351C-B05819-GMR pinout, SI5351C-B05819-GMR application, or SI5351C-B05819-GMR equivalent, key selection criteria include CLKIN-synchronized multi-domain clock synthesis, VCXO-free operation, programmable spread spectrum per output, and 16-QFN (3×3 mm) package compatibility with space-constrained PCB layouts.

Technical Context

The SI5351C-B05819-GMR implements a dual-PLL architecture where PLLA and PLLB accept either a 25/27 MHz crystal or an external 10–100 MHz CLKIN reference. Its eight MultiSynth fractional dividers support independent frequency synthesis per output, enabling up to two unique frequencies above 112.5 MHz simultaneously.

It features configurable rise/fall time control, static phase offset adjustment, glitchless frequency transitions, and separate VDD (2.5/3.3 V) and VDDO (1.8/2.5/3.3 V) supplies for level translation. Spread spectrum modulation is selectable per output at ±0.1% to ±1.5% deviation with 31.5 kHz center-spread rate.

Key Specifications

Pinout & Package

SI5351C-B05819-GMR is housed in a 16-pin QFN package (3 mm × 3 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Si5351C 16-QFN pinout specification (Rev. 1.3, Section 10.6).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with Si5351B-B-GM1 and Si5351A-B-GM1, SI5351C-B05819-GMR uniquely supports external reference locking without VCXO overhead - making it optimal for designs requiring deterministic phase alignment to a host system clock while minimizing analog design complexity.

Availability

SI5351C-B05819-GMR is available at Aetrix Electronics and suitable for residential gateways, networking equipment, laser range finders, and audio/video equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5351C-B05819-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5351 family is designed for flexible, software-configurable clock generation in cost-sensitive, space-constrained applications - replacing multiple discrete timing components with a single programmable IC.

FAQ

What reference sources does the SI5351C-B05819-GMR support?

The SI5351C-B05819-GMR supports both a 25/27 MHz crystal connected to XA/XB pins and an external 10–100 MHz single-ended clock applied to the CLKIN pin. Unlike the Si5351B variant, it does not require or use a VC pin - making it ideal for systems with a stable master reference clock. The device can be configured via I²C to lock PLLs exclusively to CLKIN, exclusively to the crystal, or to use both sources selectively.

How many outputs does the SI5351C-B05819-GMR provide, and what are their electrical characteristics?

The SI5351C-B05819-GMR provides four CMOS-compatible clock outputs (CLK0–CLK3) in its 16-QFN package. Each output supports programmable drive strength, rise/fall time control, and static phase offset (333 ps/step). Output voltage levels are set by independent VDDOA and VDDOB rails (1.71–3.6 V), enabling mixed-voltage system interfacing. Duty cycle is 45–55% below 160 MHz and 40–60% above.

Does the SI5351C-B05819-GMR support spread spectrum clocking, and how is it configured?

Yes, the SI5351C-B05819-GMR supports per-output spread spectrum clocking (SSC) with selectable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) modulation at a fixed 31.5 kHz rate. SSC is enabled and configured individually for each CLKx output via I²C register writes - allowing targeted EMI reduction on noise-sensitive outputs while leaving others unmodulated for timing-critical paths.

What is the jitter performance of the SI5351C-B05819-GMR under typical operating conditions?

Under typical conditions (25 °C, 3.3 V VDD/VDDO, all four outputs active), the SI5351C-B05819-GMR delivers <70 ps pk-pk period jitter and <70 ps pk cycle-to-cycle jitter. This performance is measured at default high-drive strength (50 Ω output impedance) with 5 pF load. Jitter remains stable across temperature (–40 to +85 °C) and supply voltage (2.25–3.6 V), meeting requirements for PCIe Gen1 and consumer audio/video timing.

Can the SI5351C-B05819-GMR generate frequencies above 112.5 MHz, and what are the limitations?

Yes, the SI5351C-B05819-GMR supports output frequencies up to 200 MHz, but only two *unique* frequencies above 112.5 MHz may be generated simultaneously (e.g., 125 MHz and 150 MHz). Multiple outputs may replicate the same high-frequency signal (e.g., four 125 MHz clocks), but three distinct frequencies >112.5 MHz (e.g., 125/130/150 MHz) violate internal resource allocation and will not function correctly. This constraint arises from the dual-PLL architecture's frequency planning limits.