Skyworks Solutions Inc. SI5351C-B06315-GM

Overview

SI5351C-B06315-GM from Skyworks Solutions is an I²C-programmable, 4-output CMOS clock generator with external reference (CLKIN) synchronization capability, integrated PLL/VCXO architecture, 0 ppm frequency synthesis error up to 200 MHz, and <70 ps peak-to-peak period jitter. It replaces crystals, crystal oscillators, and VCXOs in residential gateways and networking equipment requiring multi-domain clocking.

For engineers reviewing the SI5351C-B06315-GM datasheet, SI5351C-B06315-GM pinout, SI5351C-B06315-GM application, or SI5351C-B06315-GM equivalent, this page delivers verified electrical specs, package mapping, functional context for CLKIN-synchronized operation, and validated alternative options for clock tree design.

Technical Context

The SI5351C-B06315-GM uses a dual-PLL architecture where PLLA and PLLB accept either a 25/27 MHz crystal or an external 10–100 MHz CLKIN reference - unlike Si5351A (XTAL-only) or Si5351B (XTAL + VC). Its eight MultiSynth fractional dividers generate independent output frequencies from 2.5 kHz to 200 MHz with exact synthesis and static phase offset control.

It supports configurable spread spectrum per output (±0.1% to ±1.5%), programmable rise/fall times, glitchless frequency changes, and separate VDDO supply pins (1.8/2.5/3.3 V) enabling level translation across mixed-voltage systems without external logic.

Key Specifications

Pinout & Package

SI5351C-B06315-GM is housed in a 16-pin QFN (3 × 3 mm) package with exposed thermal pad. Pin functions are defined per Skyworks datasheet Rev. 1.3, Section 10.6 (Si5351C 16-Pin QFN).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with Si5351A-B-GM1 (XTAL-only) and Si5351B-B-GM1 (VCXO), SI5351C-B06315-GM uniquely enables external reference locking - making it the only option for applications demanding deterministic phase alignment to a system master clock, such as residential gateways and PCIe-attached networking devices.

Availability

SI5351C-B06315-GM is available at Aetrix Electronics and suitable for residential gateways, networking equipment, and audio/video equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5351C-B06315-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with over 30 years of RF and clock technology expertise.

The Si5351 family was designed to replace discrete timing components in cost-sensitive, space-constrained applications - delivering programmable, multi-output clock generation with zero ppm frequency error and sub-100 ps jitter in compact QFN packages.

FAQ

What reference inputs does the SI5351C-B06315-GM support?

The SI5351C-B06315-GM supports both a 25/27 MHz crystal (via XA/XB pins) and an external 10–100 MHz clock (via CLKIN pin). Unlike Si5351A or Si5351B, the SI5351C-B06315-GM is specifically designed to synchronize all outputs to CLKIN - enabling deterministic phase relationships in multi-chip systems. This dual-reference capability is confirmed in Skyworks datasheet Rev. 1.3, Section 4.1.2 and Table 1.

How many outputs does the SI5351C-B06315-GM provide, and what are their voltage options?

The SI5351C-B06315-GM provides four CMOS clock outputs (CLK0–CLK3) in a 16-pin QFN package. Each pair (CLK0/CLK1 and CLK2/CLK3) has its own dedicated VDDO supply pin (VDDOA and VDDOB), supporting independent 1.8 V, 2.5 V, or 3.3 V output levels. This allows direct interfacing with mixed-voltage components without external level shifters - a key feature documented in Skyworks datasheet Rev. 1.3, Table 3 and Section 4.3.

Does the SI5351C-B06315-GM support spread spectrum clocking?

Yes, the SI5351C-B06315-GM supports per-output spread spectrum clocking (SSC) with selectable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) modulation at 30–33 kHz. SSC reduces electromagnetic interference (EMI) at clock harmonics and is configured independently for each output via I²C registers. This capability is specified in Skyworks datasheet Rev. 1.3, Table 5 and Section 4.4.

What is the typical period jitter performance of the SI5351C-B06315-GM?

The SI5351C-B06315-GM achieves <70 ps peak-to-peak period jitter (typical) when all four outputs are active under standard conditions (VDD = 3.3 V, TA = 25 °C, CL = 5 pF, default high-drive strength). This value is measured over 10,000 cycles and represents worst-case real-world frequency plans - actual performance may be substantially better depending on configuration. Full jitter specifications appear in Skyworks datasheet Rev. 1.3, Table 7.

Can the SI5351C-B06315-GM generate frequencies above 112.5 MHz?

Yes, the SI5351C-B06315-GM can generate frequencies up to 200 MHz per output, but only two *unique* frequencies above 112.5 MHz may be active simultaneously (e.g., 125 MHz and 130 MHz). Multiple outputs may replicate the same high-frequency signal (e.g., four 125 MHz clocks), but distinct values >112.5 MHz are restricted to two. This limitation is explicitly stated in Skyworks datasheet Rev. 1.3, Table 7 Note 1 and Section 4.2.