Skyworks Solutions Inc. SI5351C-B06352-GM

Overview

SI5351C-B06352-GM from Skyworks Solutions is an I²C-programmable, 4-output CMOS clock generator with external reference (CLKIN) synchronization capability, 2.5 kHz–200 MHz output frequency range, <70 ps peak-to-peak period jitter, and independent 1.8/2.5/3.3 V output supply rails. It replaces crystals, crystal oscillators, and VCXOs in residential gateways and networking equipment.

For engineers reviewing the SI5351C-B06352-GM datasheet, SI5351C-B06352-GM pinout, SI5351C-B06352-GM application, or SI5351C-B06352-GM equivalent, this device supports factory preprogramming via ClockBuilder Pro, offers configurable spread spectrum per output, enables static phase offset control, and delivers exact frequency synthesis (0 ppm error) across all four outputs.

Technical Context

The SI5351C-B06352-GM implements a dual-PLL architecture with PLLA locked to CLKIN (10–100 MHz) and PLLB optionally locked to XTAL (25/27 MHz), feeding eight high-resolution MultiSynth fractional dividers. Its input stage accepts both external clock reference and crystal, enabling synchronous clock generation with precise frequency alignment to system timing sources.

Each of its four outputs (CLK0–CLK3) features independent voltage supply pins (VDDOA–VDDOD), programmable rise/fall time, glitchless frequency switching, and support for HCSL-compatible swing. Spread spectrum modulation is selectable per output at ±0.1% to ±1.5% deviation with 31.5 kHz center-spread rate.

Key Specifications

Pinout & Package

SI5351C-B06352-GM is housed in a 16-pin QFN package (3 mm × 3 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are validated per Skyworks Si5351C 16-QFN functional diagram and register map (Rev. 1.3, pp. 32).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with Si5351B-B-GM1, SI5351C-B06352-GM provides superior synchronization to external timing infrastructure but lacks VCXO tuning; compared with Si5341-A06352-GM, it offers lower cost and simpler configuration for mid-speed applications where sub-100 fs jitter is unnecessary.

Availability

SI5351C-B06352-GM is available at Aetrix Electronics and suitable for residential gateways, networking switches, laser range finders, and audio/video equipment requiring stable component supply, factory preprogramming support, and long-term lifecycle assurance.

Supply support for SI5351C-B06352-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5351 family is designed for cost-sensitive, space-constrained applications requiring flexible, software-configurable clock generation - specifically targeting replacement of crystals, oscillators, and discrete PLLs in consumer and networking infrastructure.

FAQ

What reference inputs does the SI5351C-B06352-GM support?

The SI5351C-B06352-GM supports both an external clock input (CLKIN, 10–100 MHz) and a 25/27 MHz crystal (XTAL) simultaneously. Unlike the Si5351A or Si5351B variants, the SI5351C-B06352-GM uses CLKIN as its primary reference for synchronous clock generation while retaining XTAL for oscillator stability and VCXO assist. This dual-reference capability is confirmed in Skyworks Rev. 1.3 datasheet Section 4.1.2 and Table 6.

How many outputs does the SI5351C-B06352-GM provide, and what are their voltage options?

The SI5351C-B06352-GM provides four CMOS clock outputs (CLK0–CLK3), each with an independent output supply rail (VDDOA–VDDOD). Each rail supports 1.8 V, 2.5 V, or 3.3 V operation, enabling direct interfacing with mixed-voltage SoCs without external level shifters. This 4-output, multi-rail configuration is specified in the ordering guide (Table 1, page 4) and electrical specifications (Table 3, page 8) of the SI5351C-B06352-GM datasheet.

Does the SI5351C-B06352-GM support spread spectrum clocking, and how is it configured?

Yes, the SI5351C-B06352-GM supports per-output spread spectrum clocking with selectable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) modulation at a fixed 31.5 kHz rate. Configuration is performed via I²C register writes to the Spread Spectrum Enable and Deviation registers (Registers 47–49), as documented in Section 9 (Register Descriptions) of the SI5351C-B06352-GM datasheet Rev. 1.3.

What is the typical period jitter performance of the SI5351C-B06352-GM?

The SI5351C-B06352-GM delivers <70 ps peak-to-peak period jitter (typical) when all four outputs are active under standard conditions (VDD = 3.3 V, TA = 25 °C, CL = 5 pF, default high drive strength). This value is measured over 10,000 cycles and reflects worst-case real-world frequency plans, as specified in Table 7 (page 10) of the SI5351C-B06352-GM datasheet Rev. 1.3.

Can the SI5351C-B06352-GM generate frequencies above 112.5 MHz, and what are the limitations?

Yes, the SI5351C-B06352-GM supports output frequencies up to 200 MHz, but only two unique frequencies above 112.5 MHz may be generated simultaneously (e.g., 125 MHz and 150 MHz). Multiple copies of the same high-frequency output are permitted (e.g., 125 MHz on CLK0 and CLK1). This constraint arises from internal PLL bandwidth and MultiSynth divider resource allocation, as explicitly stated in Table 7 footnote 1 and Section 4.2 of the SI5351C-B06352-GM datasheet.