Skyworks Solutions Inc. SI5351C-B06424-GM

Overview

SI5351C-B06424-GM from Skyworks Solutions is an I²C-programmable, 4-output CMOS clock generator with external reference (CLKIN) synchronization capability, integrated VCXO architecture, 2.5 kHz–200 MHz output frequency range per channel, <70 ps pk-pk period jitter (typ), and independent 1.8/2.5/3.3 V output supply rails. It replaces crystals, crystal oscillators, and synchronous clock sources in residential gateways and networking equipment.

For engineers reviewing the SI5351C-B06424-GM datasheet, SI5351C-B06424-GM pinout, SI5351C-B06424-GM application, or SI5351C-B06424-GM equivalent, this page delivers verified specifications, package mapping, functional alternatives, and design-critical timing behavior - all confirmed against Skyworks Rev. 1.3 documentation and official ordering guide data.

Technical Context

The SI5351C-B06424-GM implements a dual-PLL architecture: PLL A accepts either a 25/27 MHz crystal or an external 10–100 MHz CLKIN reference, while PLL B operates as a VCXO (only active in Si5351B variants). As a Si5351C variant, it synchronizes both PLLs to CLKIN or XTAL, enabling deterministic phase relationships across outputs. Its eight MultiSynth fractional dividers support independent non-integer-related frequencies per output.

It features per-output spread spectrum control (±0.1% to ±1.5% deviation), programmable rise/fall times, static phase offset adjustment, and glitchless frequency reconfiguration. Output buffers are powered by dedicated VDDO pins supporting 1.8 V, 2.5 V, or 3.3 V logic levels - decoupled from the 2.5/3.3 V core supply - enabling mixed-voltage system interfacing without level shifters.

Key Specifications

Pinout & Package

SI5351C-B06424-GM is housed in a 16-pin QFN (3 × 3 mm) package with an exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.3 datasheet Section 10.6 (Si5351C 16-Pin QFN).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with Si5351B-B-GM1, SI5351C-B06424-GM removes VCXO complexity and cost while retaining full CLKIN synchronization - ideal for designs prioritizing simplicity and deterministic phase alignment. Against Si5350C-B-GM1, it adds I²C configurability at minimal bill-of-materials impact, enabling flexible prototyping and firmware-driven clock management.

Availability

SI5351C-B06424-GM is available at Aetrix Electronics and suitable for residential gateways, networking equipment, laser range finders, and audio/video equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5351C-B06424-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog products.

The Si5351 family is engineered for cost-sensitive, multi-clock-domain systems requiring programmable, low-jitter timing - targeting consumer, enterprise, and industrial applications where crystal replacement and flexible frequency synthesis deliver measurable BOM and layout savings.

FAQ

What reference inputs does the SI5351C-B06424-GM support?

The SI5351C-B06424-GM supports two mutually exclusive reference sources: a 25 MHz or 27 MHz fundamental-mode AT-cut crystal connected across XA/XB pins, or a single-ended 10–100 MHz CMOS clock applied to the CLKIN pin. Unlike Si5351B variants, it does not use the VC pin - its architecture relies solely on CLKIN or XTAL for synchronization. Both references feed PLL A and PLL B to maintain deterministic phase relationships across all four outputs.

How many unique frequencies above 112.5 MHz can the SI5351C-B06424-GM generate simultaneously?

The SI5351C-B06424-GM can generate no more than two unique frequencies above 112.5 MHz at the same time - for example, 125 MHz on CLK0 and 133.33 MHz on CLK1. Additional outputs above 112.5 MHz must duplicate one of those two frequencies (e.g., CLK2 and CLK3 also set to 125 MHz or 133.33 MHz). This constraint arises from internal PLL bandwidth and MultiSynth divider resolution limits documented in Skyworks Rev. 1.3 Table 7.

Does the SI5351C-B06424-GM require external load capacitors for the crystal?

The SI5351C-B06424-GM integrates programmable internal load capacitance (0, 6, 8, or 10 pF) and typically requires no external capacitors for standard 6–10 pF crystals. If using a 12 pF crystal, Skyworks recommends adding ≤2 pF total external capacitance - achieved with ≤4 pF capacitors on both XA and XB pins - to meet optimal oscillation conditions per AN551 guidelines.

Can the SI5351C-B06424-GM generate different output voltages on its four clock pins?

Yes. The SI5351C-B06424-GM provides two independent output supply rails: VDDOA powers CLK0 and CLK1, while VDDOB powers CLK2 and CLK3. Each rail accepts 1.8 V, 2.5 V, or 3.3 V, allowing mixed-voltage operation - for instance, 1.8 V clocks for a Wi-Fi SoC (CLK0/CLK1) and 3.3 V clocks for an Ethernet PHY (CLK2/CLK3) - without external level-shifting circuitry.

What is the typical power consumption of the SI5351C-B06424-GM with all four outputs active?

With all four outputs enabled at 3.3 V core supply (VDD), the SI5351C-B06424-GM draws 24 mA (typical) and up to 38 mA (maximum) according to Skyworks Rev. 1.3 Table 4. Power scales with output count and frequency; disabling unused outputs or lowering VDDO voltage reduces current. Thermal performance remains robust on 4-layer boards (θJA = 65 °C/W), supporting continuous operation in enclosed residential gateway enclosures.