Skyworks Solutions Inc. SI5351C-B07108-GM

Overview

SI5351C-B07108-GM from Skyworks Solutions is an I²C-programmable 4-output CMOS clock generator with external reference (CLKIN) synchronization, VCXO architecture, and fractional MultiSynth synthesis enabling exact-frequency generation up to 200 MHz per output with 0 ppm error. It operates from a 25/27 MHz crystal or 10–100 MHz CLKIN, supports independent 1.8/2.5/3.3 V output supplies, and targets timing-critical embedded systems requiring multi-domain clocking.

For engineers reviewing the SI5351C-B07108-GM datasheet, SI5351C-B07108-GM pinout, SI5351C-B07108-GM application, or SI5351C-B07108-GM equivalent, key selection factors include its 4-output 16-QFN (3×3 mm) package, CLKIN-synchronized VCXO operation, programmable spread spectrum per output, <70 ps pk-pk period jitter, and support for HCSL-compatible swing in networking, audio/video, and instrumentation designs.

Technical Context

The SI5351C-B07108-GM implements dual PLLs (PLLA and PLLB) with a crosspoint switch enabling either PLL to lock to CLKIN or XTAL, allowing synchronous and free-running outputs simultaneously. Its second-stage synthesis uses eight independent high-resolution MultiSynth fractional dividers-each configurable for non-integer-related frequencies from 2.5 kHz to 200 MHz.

It accepts an external 10–100 MHz reference via CLKIN while retaining internal 25/27 MHz crystal oscillator capability; all outputs support programmable rise/fall time, static phase offset, glitchless frequency changes, and separate VDDO supply pins for level translation across 1.8 V, 2.5 V, or 3.3 V logic domains.

Key Specifications

Pinout & Package

SI5351C-B07108-GM is housed in a 16-pin QFN package (3 mm × 3 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Si5351C 16-QFN pinout specification (Rev. 1.3, Section 10.6).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with SI5351B-B-GM1 and SI5351A-B-GM1, SI5351C-B07108-GM uniquely supports external reference locking without VC pin overhead-making it optimal for systems requiring traceable synchronization to master clocks while avoiding analog tuning complexity and layout constraints.

Availability

SI5351C-B07108-GM is available at Aetrix Electronics and suitable for networking equipment, audio/video timing systems, and industrial instrumentation requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5351C-B07108-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog ICs.

The SI5351 family is designed for cost-sensitive, multi-clock-domain applications requiring flexible, software-defined timing-replacing crystals, oscillators, VCXOs, and discrete PLLs in consumer, industrial, and communications systems.

FAQ

What reference inputs does the SI5351C-B07108-GM support?

The SI5351C-B07108-GM supports both a 25 MHz or 27 MHz fundamental-mode AT-cut crystal (via XA/XB pins) and an external 10–100 MHz single-ended CMOS clock (via CLKIN pin). Unlike Si5351B, it omits the VC pin-making it ideal for CLKIN-synchronized applications without analog tuning. The device uses internal PLLs to lock to either source, enabling hybrid clock trees.

How many outputs does the SI5351C-B07108-GM provide, and what are their electrical characteristics?

The SI5351C-B07108-GM provides four CMOS clock outputs (CLK0–CLK3) in a 16-QFN package. Each output supports 2.5 kHz–200 MHz frequencies, 45–55% duty cycle (below 160 MHz), <1.5 ns rise/fall time (CL = 5 pF), and programmable drive strength. Output voltage levels are set independently via VDDOA (CLK0–CLK1) and VDDOB (CLK2–CLK3), supporting 1.8 V, 2.5 V, or 3.3 V logic families.

Does the SI5351C-B07108-GM support spread spectrum clocking, and how is it configured?

Yes, the SI5351C-B07108-GM supports per-output spread spectrum clocking (SSC) with selectable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) modes at a fixed 30–33 kHz modulation rate. SSC is enabled and tuned individually for each output via I²C register writes-allowing noise reduction on specific high-speed links (e.g., PCIe or USB) while leaving others unmodulated for timing-critical subsystems.

What is the jitter performance of the SI5351C-B07108-GM, and under what conditions is it specified?

The SI5351C-B07108-GM delivers <70 ps pk-pk period jitter (typical) and <90 ps pk cycle-to-cycle jitter (typical) when four outputs are active, measured at default high-drive strength (50 Ω output impedance) with CL = 5 pF. These values apply across the full operating temperature range (–40°C to +85°C) and supply voltages (2.25–2.75 V or 3.0–3.6 V), per Skyworks Rev. 1.3 datasheet Table 7.

Can the SI5351C-B07108-GM generate multiple frequencies above 112.5 MHz simultaneously?

The SI5351C-B07108-GM permits only two unique frequencies above 112.5 MHz across its four outputs-for example, 125 MHz on CLK0 and 130 MHz on CLK1 is valid, but adding 150 MHz on CLK2 violates the architecture limit. However, duplicate frequencies (e.g., 125 MHz on CLK0–CLK3) are fully supported. This constraint arises from internal PLL bandwidth and MultiSynth resource allocation in the Si5351C-B series.