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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5356A-B04593-GM

Name: SI5356A-B04593-GM
Brand: Skyworks Solutions Inc.
SKU: SI5356A-B04593-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5356A-B04593-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5356A-B04593-GM.pdf

Description:: I2C PROG, ANY FREQUENCY, ANY OUT

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Product details

Overview

SI5356A-B04593-GM from Skyworks Solutions is an I²C-programmable, quad-frequency, 8-output CMOS clock generator synthesizing four independent non-integer-related frequencies from 1 to 200 MHz per bank. It uses MultiSynth fractional-N PLL architecture with 0 ppm synthesis error, supports 1.8/2.5/3.3 V core and per-bank VDDO supplies, and targets multi-clock systems in network switches and laser printers.

For engineers reviewing the SI5356A-B04593-GM datasheet, SI5356A-B04593-GM pinout, SI5356A-B04593-GM application, or SI5356A-B04593-GM equivalent, key selection criteria include guaranteed 0 ppm frequency synthesis across all 8 outputs, <20 ps programmable phase adjustment per output, 50 ps pk-pk period jitter (typ), 24-QFN package compatibility, and factory-programmed NVM configuration support.

Technical Context

The SI5356A-B04593-GM implements a single high-frequency VCO feeding four independent MultiSynth fractional dividers-each delivering precise, jitter-optimized CMOS clocks without integer-ratio constraints. Its architecture eliminates inter-bank frequency coupling and guarantees zero ppm synthesis error regardless of output combination.

It accepts either a 25/27 MHz crystal (XA/XB) or 5–200 MHz CMOS reference clock (CLKIN), supports per-bank output voltage selection (1.8/2.5/3.3 V), and integrates on-chip crystal load capacitance (12 pF nominal). The device features interrupt-driven status monitoring (LOS/LOL/SYS_CAL) via open-drain INTR pin and configurable OEB control per bank or globally.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & topology	8 CMOS outputs grouped into 4 banks (CLK0–1, CLK2–3, CLK4–5, CLK6–7), each bank independently configurable for frequency and voltage
Frequency range per output	1–200 MHz with 0 ppm synthesis error-enables replacement of multiple discrete oscillators and PLLs in one IC
Phase adjustment resolution	<20 ps error over ±45 ns range-supports fine PCB trace delay compensation and setup/hold margin tuning
Jitter performance	50 ps pk-pk period jitter (typ), 75 ps max-meets stringent timing requirements for Ethernet PHYs and DDR interfaces
Supply flexibility	Core VDD: 1.8/2.5/3.3 V; per-bank VDDO: 1.8/2.5/3.3 V-simplifies mixed-voltage system integration without level shifters
Package & thermal	24-pin QFN, 4×4 mm, 0.5 mm pitch; θJA = 37 °C/W-supports high-density routing and industrial temperature operation (–40 to +85 °C)
Input options	25 or 27 MHz fundamental-mode crystal (XA/XB) or 5–200 MHz CMOS reference clock (CLKIN)-no external load caps required for crystal mode

Pinout & Package

SI5356A-B04593-GM is housed in a 24-lead QFN package (4×4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per Skyworks Rev. 1.4 datasheet.

Pin/Terminal	Circuit Role	Design Meaning
CLK0–CLK7	CMOS clock outputs (2 per bank)	Bank A (CLK0/1), B (CLK2/3), C (CLK4/5), D (CLK6/7); each bank driven by independent MultiSynth divider
VDDOA–VDDOD	Per-bank output supply rails	Enable mixed-voltage clock distribution: e.g., CLK0/1 at 1.8 V for FPGA I/O, CLK4/5 at 3.3 V for legacy peripherals
VDD	Core logic supply	Accepts 1.8 V (±5%), 2.5 V (±10%), or 3.3 V (±10%)-powers internal PLL, I²C interface, and configuration logic
XA / XB	Differential crystal input	Supports 25 or 27 MHz fundamental-mode crystals; on-chip 12 pF load capacitance eliminates external caps
CLKIN	Single-ended reference clock input	Accepts 5–200 MHz CMOS signal; requires series termination resistor (RSE/RSH) when driven from >1.3 V sources
SCL / SDA	I²C serial interface	Standard-mode (100 kHz) or fast-mode (400 kHz) compatible; supports address 0x70 or 0x71; VDDI2C = 1.71–3.63 V
INTR	Open-drain interrupt output	Asserts on LOS (loss of input clock), LOL (PLL loss of lock), or SYS_CAL (calibration active); status readable at reg 218
OEB	Output enable control	Active-low global disable; I²C register (reg230[4]) enables per-bank OEB for selective output gating
SSC_DIS	Spread spectrum disable	Active-high input; disables "triple-A" spread spectrum on all outputs when pulled high
I2C_LSB	I²C address LSB select	Connect to GND for 0x70, VDD for 0x71-allows two devices on same I²C bus
GND / PAD	Ground connections	10 dedicated GND pins + exposed thermal pad-ensures low-noise return paths and thermal dissipation

Key Features

Feature	Design Value
MultiSynth fractional-N synthesis	Four independent output paths with 0 ppm frequency error-eliminates need for multiple crystals or PLL ICs
Per-bank VDDO voltage selection	Each of 4 output banks configurable for 1.8/2.5/3.3 V-reduces BOM count in mixed-supply systems
Programmable phase offset	<20 ps accuracy over ±45 ns range-enables deterministic skew correction for high-speed SerDes and memory interfaces
Integrated crystal load capacitance	On-chip 12 pF (adjustable to 11–13 pF via registers)-removes external capacitors and simplifies layout
Factory-programmable NVM	One-time programmable OTP stores default power-up configuration-delivers valid clocks immediately after POR
Interrupt-driven status monitoring	INTR pin reports LOS, LOL, and SYS_CAL events-enables real-time system health monitoring without polling

Applications

Network Switches/Routers	Laser Printers
Use Scenario: 4-port Ethernet switch requiring synchronous 25 MHz, 125 MHz, and DDR clock domains. IC Role / Device Role / Timing Role: Primary clock generator providing eight precisely timed, voltage-matched CMOS clocks to PHYs, MAC, and memory controllers. Use Value: Replaces four discrete oscillators and eliminates inter-clock skew; 0 ppm synthesis ensures deterministic packet timing and jitter-sensitive 1000BASE-T compliance.	Use Scenario: Laser printer with separate clocks for print head, paper tray motor, touchscreen controller, and USB interface. IC Role / Device Role / Timing Role: Centralized clock source generating 35.788 MHz, 48 MHz, 66/100 MHz, and 125 MHz outputs across four voltage domains. Use Value: Single-device solution reduces board space and EMI; per-bank VDDO allows direct connection to 1.8 V FPGA I/O and 3.3 V motor drivers without level shifters.
Storage Area Networks	Servers
Use Scenario: SAS/SATA storage controller needing independent 150 MHz, 100 MHz, 75 MHz, and 50 MHz clocks for host interface, disk interface, PCIe root complex, and management MCU. IC Role / Device Role / Timing Role: High-precision clock synthesizer delivering jitter-clean, phase-aligned clocks to multiple subsystems with no shared PLL coupling. Use Value: Guarantees 50 ps pk-pk jitter across all outputs-meets SAS-3 and PCIe Gen3 jitter budgets while supporting non-integer frequency ratios.	Use Scenario: Dual-socket server motherboard requiring synchronized clocks for CPU, memory, PCIe slots, and BMC. IC Role / Device Role / Timing Role: System clock generator providing eight low-jitter CMOS clocks with programmable phase offsets for timing margin optimization. Use Value: Factory-programmed NVM delivers validated clock tree at power-up; <20 ps phase adjustment enables fine-tuning of DDR4 write leveling and PCIe eye diagrams.

Network Switches/Routers

Laser Printers

Use Scenario: 4-port Ethernet switch requiring synchronous 25 MHz, 125 MHz, and DDR clock domains.

IC Role / Device Role / Timing Role: Primary clock generator providing eight precisely timed, voltage-matched CMOS clocks to PHYs, MAC, and memory controllers.

Use Value: Replaces four discrete oscillators and eliminates inter-clock skew; 0 ppm synthesis ensures deterministic packet timing and jitter-sensitive 1000BASE-T compliance.

Use Scenario: Laser printer with separate clocks for print head, paper tray motor, touchscreen controller, and USB interface.

IC Role / Device Role / Timing Role: Centralized clock source generating 35.788 MHz, 48 MHz, 66/100 MHz, and 125 MHz outputs across four voltage domains.

Use Value: Single-device solution reduces board space and EMI; per-bank VDDO allows direct connection to 1.8 V FPGA I/O and 3.3 V motor drivers without level shifters.

Storage Area Networks

Servers

Use Scenario: SAS/SATA storage controller needing independent 150 MHz, 100 MHz, 75 MHz, and 50 MHz clocks for host interface, disk interface, PCIe root complex, and management MCU.

IC Role / Device Role / Timing Role: High-precision clock synthesizer delivering jitter-clean, phase-aligned clocks to multiple subsystems with no shared PLL coupling.

Use Value: Guarantees 50 ps pk-pk jitter across all outputs-meets SAS-3 and PCIe Gen3 jitter budgets while supporting non-integer frequency ratios.

Use Scenario: Dual-socket server motherboard requiring synchronized clocks for CPU, memory, PCIe slots, and BMC.

IC Role / Device Role / Timing Role: System clock generator providing eight low-jitter CMOS clocks with programmable phase offsets for timing margin optimization.

Use Value: Factory-programmed NVM delivers validated clock tree at power-up; <20 ps phase adjustment enables fine-tuning of DDR4 write leveling and PCIe eye diagrams.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5356A-B04588-GM	Same silicon, factory-programmed with different NVM configuration (e.g., alternate frequency plan or VDDO mapping)	Designed for identical use cases but with pre-set output frequencies-requires no I²C initialization at boot	Select when exact factory-loaded clock plan matches design; SI5356A-B04593-GM offers same hardware with distinct NVM content.
Si5356A-B04594-GM	Identical package and pinout; differs only in factory-programmed NVM data (e.g., alternate spread-spectrum settings or phase offsets)	Targeted at systems requiring specific EMI reduction profiles or custom startup timing sequences	Choose based on required NVM configuration-not electrical or mechanical compatibility.

Compared with SI5356A-B04593-GM, the Si5356A-B04588-GM and Si5356A-B04594-GM share identical silicon, package, pinout, and electrical specs-the sole difference lies in factory-programmed NVM contents, enabling drop-in replacement only when the stored configuration aligns with system requirements.

Availability

SI5356A-B04593-GM is available at Aetrix Electronics and suitable for network switches, laser printers, and storage area networks requiring stable component supply, factory-programmed timing configurations, and industrial temperature operation.

Supply support for SI5356A-B04593-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management technologies.

The SI5356A-B04593-GM belongs to Skyworks' Si5356 family of programmable clock generators, designed specifically for replacing multiple discrete timing components in high-density, multi-protocol systems such as networking, computing, and industrial equipment.

FAQ

What is the factory-programmed configuration of the SI5356A-B04593-GM?

The SI5356A-B04593-GM is shipped with a unique, one-time programmable (OTP) NVM configuration defining its default output frequencies, VDDO voltages, phase offsets, and spread-spectrum settings. This configuration is loaded automatically at power-on reset (POR), eliminating the need for I²C initialization in time-critical boot sequences. The exact values are specified in Skyworks' custom NVM file associated with this part number and can be verified using ClockBuilder Desktop software.

Does the SI5356A-B04593-GM support both crystal and external clock inputs?

Yes, the SI5356A-B04593-GM supports dual input modes: a 25 or 27 MHz fundamental-mode crystal connected across XA/XB pins, or a 5–200 MHz CMOS reference clock applied to CLKIN. The crystal mode uses on-chip 12 pF load capacitance, removing external caps; the CLKIN path requires series termination (RSE/RSH) for voltage levels above 1.3 V. Both modes deliver identical 0 ppm synthesis accuracy and jitter performance.

How does the SI5356A-B04593-GM achieve 0 ppm frequency synthesis error?

The SI5356A-B04593-GM achieves 0 ppm frequency synthesis error using Skyworks' patented MultiSynth fractional-N divider architecture. Each of the four output banks employs a high-speed fractional divider that dynamically switches between adjacent integer division ratios while applying real-time phase error correction. This closed-loop technique ensures exact frequency generation without rounding error-guaranteed across all 1–200 MHz outputs, regardless of combination or reference source.

Can output banks on the SI5356A-B04593-GM operate at different supply voltages simultaneously?

Yes, the SI5356A-B04593-GM supports independent VDDO supplies for each of its four output banks (VDDOA–VDDOD), allowing simultaneous operation at 1.8 V, 2.5 V, and 3.3 V. This enables direct interfacing with mixed-voltage components-e.g., 1.8 V FPGA I/O banks, 2.5 V video processors, and 3.3 V legacy peripherals-without external level shifters or voltage translators, reducing BOM cost and signal integrity risk.

What is the role of the INTR pin on the SI5356A-B04593-GM?

The INTR pin on the SI5356A-B04593-GM is an open-drain interrupt output that signals critical timing events: loss of input signal (LOS), PLL loss of lock (LOL), or ongoing system calibration (SYS_CAL). Its state is latched and readable via register 218, enabling firmware to respond deterministically-for example, halting data transfers during LOL or initiating clock recovery routines upon LOS detection-without continuous I²C polling.

SI5356A-B04593-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5356A-B04593-GM FAQ

1.How can I place an order for SI5356A-B04593-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5356A-B04593-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5356A-B04593-GM reliable?

The price and inventory of SI5356A-B04593-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5356A-B04593-GM is usually 5 days.

3.What payment methods are accepted for SI5356A-B04593-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5356A-B04593-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5356A-B04593-GM?

SI5356A-B04593-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5356A-B04593-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5356A-B04593-GM?

For technical support, including SI5356A-B04593-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5356A-B04593-GM requirements.

6.How does Aetrix verify that SI5356A-B04593-GM is sourced from the original manufacturer or authorized distributors?

All SI5356A-B04593-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5356A-B04593-GM meets industry standards.

7.What is the process for return or replacement of SI5356A-B04593-GM?

All SI5356A-B04593-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5356A-B04593-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5356A-B04593-GM part is unused and in its original packaging.

Return procedure for SI5356A-B04593-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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