Skyworks Solutions Inc. SI5395L-A-GMR

Overview

SI5395L-A-GMR from Skyworks Solutions is a 4-input, 12-output ultra-low-jitter clock multiplier and jitter attenuator with integrated crystal reference, supporting integer-only frequency synthesis up to 1028 MHz differential output, 64-LGA 9×9 mm package, and 69–85 fs RMS phase jitter performance for 56G/112G SerDes and SyncE applications.

For engineers reviewing the SI5395L-A-GMR datasheet, SI5395L-A-GMR pinout, SI5395L-A-GMR application, or SI5395L-A-GMR equivalent, this device delivers deterministic hitless switching, programmable DSPLL loop bandwidth (0.1 Hz–4 kHz), G.8262/G.8262.1 compliance, and in-circuit NVM configuration-critical for high-reliability telecom line cards and medical imaging timing systems.

Technical Context

The SI5395L-A-GMR implements fourth-generation DSPLL® architecture with Multi-Synth™ dividers to perform jitter attenuation and any-frequency multiplication. Its integrated crystal oscillator eliminates external XTAL components, reducing acoustic noise sensitivity during thermal ramping and improving board-level reliability.

It supports free-run, locked, and holdover modes with programmable 120-second frequency history averaging for holdover stability. Enhanced hitless switching (0.2 ns typical phase transient) operates across 8 kHz–750 MHz differential inputs, with independent Frequency-on-the-Fly control per MultiSynth and DCO mode offering 0.001 ppb step resolution.

Key Specifications

Pinout & Package

SI5395L-A-GMR is housed in a 64-pin LGA (Land Grid Array) package, 9×9 mm body size, 0.5 mm pitch, with exposed thermal pad. The package supports high-density routing and efficient heat dissipation in multi-layer PCBs used in line-card and server applications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator and clock multiplier applications.

Compared with SI5395L-A-GMR, SI5395P-A-GMR delivers 16 fs lower jitter but requires external TCXO integration and QFN rework, while SI5345B-A-GMR offers pin-compatible migration at the cost of 16 fs higher jitter and no integrated reference-making SI5395L-A-GMR the optimal balance of jitter, integration, and ruggedness for new SyncE and medical designs.

Availability

SI5395L-A-GMR is available at Aetrix Electronics and suitable for 56G SerDes clocking, OTN transponder timing, and Synchronous Ethernet line cards requiring stable component supply, long-term lifecycle support, and RoHS-6 compliance.

Supply support for SI5395L-A-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog technologies for infrastructure and mobility markets.

The Si5395 family is designed as an ultra-low-jitter, any-frequency clock multiplier and jitter attenuator targeting next-generation networking, optical transport, and high-end test equipment where phase noise and holdover stability are critical.

FAQ

What is the primary function of the SI5395L-A-GMR in a timing architecture?

The SI5395L-A-GMR functions as a jitter-attenuating clock multiplier that cleans and scales input reference frequencies into multiple ultra-low-jitter output clocks. It uses a DSPLL architecture with integrated crystal reference to achieve 85 fs RMS phase jitter in integer mode, enabling reliable operation in 56G/112G SerDes and ITU-T G.8262-compliant Synchronous Ethernet systems. Its role is to replace discrete PLL+VCXO solutions with a single-chip, high-integration alternative.

Does the SI5395L-A-GMR require an external crystal or oscillator?

No, the SI5395L-A-GMR does not require an external crystal or oscillator because it belongs to the J/K/L/M/E grade family with an integrated crystal reference. The internal resonator connects directly to XA/XB pins-no external load capacitors or crystals are needed. This integration reduces PCB area, lowers acoustic noise susceptibility, and improves system reliability compared to external-reference variants like SI5395P-A-GMR.

How many output clocks can the SI5395L-A-GMR generate simultaneously?

The SI5395L-A-GMR generates up to 12 differential output clocks simultaneously, each independently configurable for frequency, format (LVDS/LVPECL/CML/HCSL/LVCMOS), amplitude, and termination. All 12 outputs derive from four MultiSynth dividers with crosspoint switching, allowing flexible routing of synthesized frequencies-including simultaneous generation of 125 MHz, 156.25 MHz, 312.5 MHz, and 500 MHz clocks for multi-protocol line cards.

What is the significance of "integer-only" synthesis in the SI5395L-A-GMR?

"Integer-only" synthesis means the SI5395L-A-GMR uses only integer-N MultiSynth division (no fractional-N), resulting in lower spurious content and improved spectral purity versus fractional-mode operation. While it limits frequency flexibility compared to fractional variants, it delivers superior phase noise-85 fs RMS jitter-and avoids fractional spurs that could interfere with adjacent SerDes lanes or ADC sampling bands in sensitive applications like medical imaging.

Can the SI5395L-A-GMR operate in holdover mode, and how long does it maintain accuracy?

Yes, the SI5395L-A-GMR supports holdover mode with programmable 120-second frequency history averaging. During holdover, it calculates an averaged reference frequency from prior locked operation and maintains output stability using its integrated crystal. Accuracy depends on the crystal's stability: with a standard ±20 ppm crystal, holdover drift remains within ±20 ppm for ≥120 seconds-sufficient to meet ITU-T G.8262 Option 2 requirements when paired with proper calibration.