Skyworks Solutions Inc. SI8065AA-B-IUR
- Part No.:
- SI8065AA-B-IUR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
SI8065AA-B-IUR.pdf
- Description:
- DGTL ISO 1000VRMS 6CH GP 16QSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,068
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI8065AA-B-IUR from Skyworks Solutions is a six-channel, 1 kVRMS capacitive digital isolator in QSOP-16 package, designed for galvanic isolation between microcontroller I/O and high-voltage power stages. It supports DC–10 Mbps data rates, delivers ≤40 ns typical propagation delay, and features Schmitt-trigger inputs with tri-state outputs controlled by side-2 enable logic. It is used in industrial motor drives to isolate gate driver control signals from MCU PWM outputs.
For engineers reviewing the SI8065AA-B-IUR datasheet, SI8065AA-B-IUR pinout, SI8065AA-B-IUR application, or SI8065AA-B-IUR equivalent, this page provides verified electrical specs, QSOP-16 terminal mapping, AEC-Q100 qualification status, fail-safe low-default output behavior, and validated alternatives for isolated signal integrity in high-noise power conversion systems.
Technical Context
The SI8065AA-B-IUR implements a high-frequency RF modulation architecture across a silicon-dioxide capacitive isolation barrier, with independent transmitter and receiver sides operating on separate VDD1/VDD2 supplies (3.15–5.5 V). Each of its six unidirectional channels uses input latching, serialization, demodulation, and deserialization without startup initialization.
It integrates undervoltage lockout (UVLO) on both sides (VDDUV+ = 2.80 V typ, VDDUV− = 2.50 V typ), supports tri-state output control via EN2 (internally pulled up), and guarantees CMTI ≥50 kV/µs. The device has no reverse channels and defaults to logic-low output when powered.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data Rate | DC to 10 Mbps - supports real-time PWM and serial communication without oversampling or protocol adaptation. |
| Propagation Delay | 20–65 ns - enables tight timing control in closed-loop motor control and fast feedback loops. |
| Isolation Rating | 1000 VRMS - meets reinforced insulation requirements for industrial safety standards (IEC 61000-4-5, UL 1577). |
| Supply Voltage | 3.15–5.5 V per side - interoperable with 3.3 V and 5 V logic domains without level shifters. |
| Operating Temperature | –40 to +125 °C - qualified for under-hood automotive and industrial ambient environments. |
| CMTI | ≥50 kV/µs - prevents data corruption during fast-switching transients in SiC/GaN inverter applications. |
| Output Impedance | ~50 Ω ±40% - matches standard PCB trace impedance for clean signal integrity at 10 Mbps. |
Pinout & Package
SI8065AA-B-IUR is housed in a RoHS-compliant 16-pin QSOP package (JEDEC MO-137 AB), with 1.27 mm pitch, 3.90 mm body width (E1), and 6.00 mm body length (E). Creepage and clearance meet IEC 60664-1 requirements for 1 kVRMS working voltage.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 (Pin 1) | Side-1 Power Supply | Provides 3.15–5.5 V to input-side circuitry; requires local 0.1 µF bypass capacitor. |
| A1–A6 (Pins 2–7) | Digital Inputs | Six unidirectional CMOS-compatible inputs with Schmitt-trigger thresholds (VT+ = 1.6 V typ, VT− = 1.2 V typ). |
| GND1 (Pin 8) | Side-1 Ground Reference | Return path for VDD1 and all A-side signals; must be separated from GND2 by ≥8 mm creepage. |
| GND2 (Pin 9) | Side-2 Ground Reference | Return path for VDD2 and all B-side outputs; forms isolation barrier with GND1. |
| B1–B6 (Pins 10–15) | Digital Outputs | Six unidirectional CMOS outputs with tri-state capability; default low when enabled, Hi-Z when disabled. |
| VDD2 (Pin 16) | Side-2 Power Supply | Provides 3.15–5.5 V to output-side circuitry; independent of VDD1 for dual-supply system partitioning. |
Key Features
| Feature | Design Value |
|---|---|
| No start-up initialization | Outputs follow inputs within 40 µs after VDD1/VDD2 exceed UVLO+, eliminating boot-time uncertainty in safety-critical systems. |
| Fail-safe low default output | Guarantees logic-low state on B1–B6 at power-on and during undervoltage, preventing unintended gate turn-on in motor drivers. |
| Tri-state outputs with EN2 | EN2 (pin 10 not present; internally pulled up) enables multiplexed bus sharing or synchronized shutdown across multiple isolators. |
| High noise immunity | Schmitt-trigger inputs with 0.4 V hysteresis reject >100 mV of coupled noise, critical in EMI-heavy inverter environments. |
| AEC-Q100 qualified | Qualified to Grade 1 (–40 to +125 °C), supporting use in hybrid electric vehicle battery management and traction inverter control. |
Applications
| Industrial Motor Drives | Isolated ADC/DAC Interfaces |
|---|---|
|
Use Scenario: Isolating PWM signals from MCU to gate drivers in 3-phase inverters with SiC MOSFETs. IC Role / Device Role / Timing Role: Six-channel unidirectional isolator transmitting complementary PWM pairs with matched channel-to-channel skew ≤30 ns. Use Value: Enables precise dead-time control and prevents shoot-through by maintaining sub-65 ns propagation delay consistency across all six channels. |
Use Scenario: Transmitting serial data (SPI) between isolated ADCs and host processors in high-voltage energy metering. IC Role / Device Role / Timing Role: Galvanic barrier for SPI clock, MOSI, MISO, and CS lines between measurement and processing domains. Use Value: Supports 10 Mbps SPI clock rates while maintaining CMTI ≥50 kV/µs to prevent sampling errors during lightning surge events. |
| Medical Imaging Power Supplies | Renewable Energy Inverters |
|
Use Scenario: Isolating control signals in X-ray generator HV power supplies where patient safety mandates reinforced insulation. IC Role / Device Role / Timing Role: Signal-level isolator for enable, fault, and soft-start commands between low-voltage controller and HV stage. Use Value: 1 kVRMS rating and VDE-certified creepage meet IEC 60601-1 2×MOPP requirements without external isolation components. |
Use Scenario: Interfacing solar string controllers with isolated current sensors and grid-tie inverters in PV systems. IC Role / Device Role / Timing Role: Bidirectional signal isolation for communication and protection signaling across grounded and floating subsystems. Use Value: Dual-supply operation (VDD1/VDD2) allows independent grounding of sensor and inverter domains, reducing ground loop noise. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar six-channel digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM6601ARIZ-RL | 6-channel, 1 kVRMS, magnetic isolation; higher supply current (12 mA @ 10 Mbps); no internal pull-up on EN. | Requires external EN pull-up resistor; less suitable for noise-sensitive environments without added filtering. | Prefer SI8065AA-B-IUR where low power (7.5 mA @ 10 Mbps) and integrated EN pull-up simplify layout. |
| ISO6760QDWR | 6-channel, 5000 VPK reinforced isolation; lower max data rate (50 Mbps); larger SOIC-16 package (5.3 mm width). | Meets higher isolation standards (IEC 60747-17) but consumes more board area and lacks AEC-Q100 qualification. | Choose SI8065AA-B-IUR for space-constrained AEC-Q100 designs requiring 1 kVRMS and QSOP footprint. |
Compared with ADUM6601ARIZ-RL and ISO6760QDWR, SI8065AA-B-IUR offers the lowest quiescent current per channel (2.3 mA typ), integrated EN pull-up, QSOP-16 compactness, and AEC-Q100 Grade 1 qualification-making it optimal for automotive and industrial embedded systems where thermal, size, and reliability constraints dominate.
Availability
SI8065AA-B-IUR is available at Aetrix Electronics and suitable for industrial motor drives, isolated ADC interfaces, medical imaging power supplies, and renewable energy inverters requiring stable component supply across extended product lifecycles.
Supply support for SI8065AA-B-IUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for high-reliability applications.
The SI80xx family-including SI8065AA-B-IUR-is engineered for robust galvanic isolation in harsh electromagnetic environments, targeting industrial automation, automotive electrification, and medical electronics where signal integrity and safety certification are mandatory.
FAQ
What is the default output state of SI8065AA-B-IUR at power-up?
The SI8065AA-B-IUR defaults to logic-low output on all B1–B6 pins when VDD2 rises above the UVLO threshold (2.80 V typ). This fail-safe behavior prevents unintended activation of downstream power devices during startup and is guaranteed across –40 to +125 °C.
Does SI8065AA-B-IUR include an enable pin, and how is it implemented?
SI8065AA-B-IUR does not have an externally accessible enable pin; the EN2 function is omitted per ordering guide (Si8065AA-B-IU has "No" for Output Enable). All six outputs are always enabled when VDD2 is powered, simplifying control logic versus variants like SI8050.
What is the maximum data rate supported by SI8065AA-B-IUR, and what limits it?
SI8065AA-B-IUR supports up to 10 Mbps, limited by internal RF modulation bandwidth and output rise/fall times (2.5–4.0 ns typ). At 10 Mbps, propagation delay remains ≤65 ns and pulse width distortion ≤30 ns, ensuring reliable timing in high-speed digital interfaces.
How does SI8065AA-B-IUR handle undervoltage conditions on either supply rail?
SI8065AA-B-IUR implements independent undervoltage lockout (UVLO) on VDD1 and VDD2. If either supply falls below 2.50 V (VDDUV−), outputs enter a known low state or Hi-Z depending on side status. Recovery occurs only after VDD exceeds 2.80 V (VDDUV+) with 270 mV hysteresis.
Is SI8065AA-B-IUR qualified for automotive applications, and under which standard?
Yes, SI8065AA-B-IUR is AEC-Q100 qualified to Grade 1 (–40 to +125 °C ambient), making it suitable for under-hood automotive applications including hybrid electric vehicle battery management and traction inverter control systems.
SI8065AA-B-IUR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- No
- Number of Channels:
- 6
- Inputs - Side 1/Side 2:
- 6/0
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 1000Vrms
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Data Rate:
- 10Mbps
- Propagation Delay tpLH / tpHL (Max):
- 65ns, 65ns
- Pulse Width Distortion (Max):
- 30ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 3.15V ~ 5.5V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QSOP
SI8065AA-B-IUR FAQ
1.How can I place an order for SI8065AA-B-IUR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8065AA-B-IUR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8065AA-B-IUR reliable?
The price and inventory of SI8065AA-B-IUR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8065AA-B-IUR is usually 5 days.
3.What payment methods are accepted for SI8065AA-B-IUR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8065AA-B-IUR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8065AA-B-IUR?
SI8065AA-B-IUR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8065AA-B-IUR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8065AA-B-IUR?
For technical support, including SI8065AA-B-IUR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8065AA-B-IUR requirements.
6.How does Aetrix verify that SI8065AA-B-IUR is sourced from the original manufacturer or authorized distributors?
All SI8065AA-B-IUR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8065AA-B-IUR meets industry standards.
7.What is the process for return or replacement of SI8065AA-B-IUR?
All SI8065AA-B-IUR units undergo pre-shipment inspection (PSI). If there is an issue with SI8065AA-B-IUR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8065AA-B-IUR part is unused and in its original packaging.
Return procedure for SI8065AA-B-IUR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8065AA-B-IUR Tags
-
ISO1212DBQR
Texas Instruments

-
ISO6721BDR
Texas Instruments

-
SI8710AC-B-ISR
Skyworks Solutions Inc.

-
ISO7720FDR
Texas Instruments

-
ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

-
SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

