Skyworks Solutions Inc. SI8231BB-AS1R
- Part No.:
- SI8231BB-AS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI8231BB-AS1R.pdf
- Description:
- DGTL ISO 2.5KV 2CH GT DVR 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,351
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Product details
Overview
SI8231BB-AS1R from Skyworks Solutions is a high-side/low-side isolated gate driver IC with PWM input, 0.5 A peak output current, 2.5 kVRMS isolation rating, and SOIC-16 narrow-body package. It integrates two independent isolated channels using silicon-based RF isolation, enabling robust half-bridge MOSFET/IGBT drive in automotive onboard chargers and industrial inverters.
For engineers reviewing the SI8231BB-AS1R datasheet, SI8231BB-AS1R pinout, SI8231BB-AS1R application, or SI8231BB-AS1R equivalent, key selection factors include its 45 ns propagation delay, programmable dead time via external resistor, TTL-compatible PWM input with >400 mV hysteresis, and AEC-Q100 qualification for automotive-grade operation.
Technical Context
The SI8231BB-AS1R implements RF-based on/off keying across a semiconductor isolation barrier, delivering noise-immune signal transmission without startup initialization. Its PWM input architecture directly controls complementary high-side and low-side outputs with built-in overlap protection and user-programmable dead time (via RDT).
Each channel features independent undervoltage lockout (UVLO) monitoring-VDDI UVLO threshold is 8 V (rising), and driver-side supplies (VDDA/VDDB) also enforce local UVLO. Outputs default low during UVLO or disable assertion, ensuring fail-safe gate control in power conversion systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 2.5 kVRMS per UL1577 - enables reinforced insulation in 400 VAC mains-connected systems |
| Peak Output Current | 0.5 A - sufficient to drive medium-power MOSFETs (e.g., 10–30 nC gate charge) at ≤8 MHz switching frequency |
| Propagation Delay | 45 ns max - supports precise timing control in high-frequency half-bridge topologies |
| Input Type | PWM - single-input logic interface simplifies controller-to-driver connection in space-constrained designs |
| UVLO Threshold | 8 V (VDDI rising) - prevents erratic switching during brown-out conditions in 12 V automotive supply rails |
| Operating Temp | –40 °C to +125 °C - meets extended temperature requirements for under-hood automotive applications |
| Package | SOIC-16 narrow body - RoHS-compliant, JEDEC-standard footprint with 1.27 mm pitch and 10.3 mm × 7.5 mm outline |
Pinout & Package
SI8231BB-AS1R uses a 16-pin SOIC narrow-body package (7.5 mm × 10.3 mm, 1.27 mm pitch) with creepage/clearance optimized for 2.5 kVRMS isolation. Pin functions are validated per Skyworks Si823x datasheet Rev. 206326B.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDI | Input-side supply | Provides 4.5–24 V power to input die; powers internal oscillator and modulator |
| GNDI | Input-side ground | Reference for PWM input and internal logic; galvanically isolated from output grounds |
| PWM | Single logic input | TTL-compatible (≥2.0 V high), >400 mV hysteresis; drives complementary outputs VOA/VOB |
| DISABLE | Global shutdown control | Active-high signal forces both outputs low within tSD (≤100 ns); overrides all inputs |
| VDDA | High-side driver supply | Supplies 4.5–24 V to high-side output stage; monitored by independent UVLO |
| GNDA | High-side ground reference | Return path for VOA; floats relative to GNDI and GNDB; connects to switch node in bootstrap circuits |
| VOA | High-side gate drive output | 0.5 A source/sink capable; drives MOSFET gate high when PWM = H, low when PWM = L |
| VDDB | Low-side driver supply | Supplies 4.5–24 V to low-side output stage; independently monitored for UVLO |
| GNDB | Low-side ground reference | Return path for VOB; typically tied to system power ground |
| VOB | Low-side gate drive output | Complementary to VOA; active-low when PWM = H, active-high when PWM = L |
| DT | Dead time programming | Connects to ground via resistor RDT; sets dead time per DT = 10 × RDT (ns, RDT in kΩ) |
| NC | No connect | Pins 1, 9, 10, 15 - internally unused; must remain unconnected per datasheet |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation barrier | Eliminates LED aging and CMTI limitations of optocouplers; achieves >35 kV/µs common-mode transient immunity |
| Programmable dead time | Configurable 0–1000 ns delay between VOA/VOB transitions via single external resistor, preventing shoot-through |
| Independent UVLO per side | Ensures safe output behavior when either input or driver supply drops below 8 V, critical for fault-tolerant power stages |
| AEC-Q100 qualified | Validated for automotive use (Grade 1: –40 °C to +125 °C), including PPAP documentation and IMDS/CAMDS compliance |
| TTL-compatible PWM input | Accepts standard microcontroller or PWM controller outputs without level-shifting; >400 mV hysteresis rejects noise on long traces |
Applications
| Onboard Charger (OBC) | Battery Management System (BMS) |
|---|---|
Use Scenario: Isolated half-bridge driving in 3.3 kW AC/DC stage of EV onboard charger. IC Role / Device Role / Timing Role: SI8231BB-AS1R provides PWM-controlled, shoot-through-protected gate drive to high-side/low-side SiC MOSFETs in interleaved LLC resonant converter. Use Value: 45 ns propagation delay enables tight timing control at 300–500 kHz switching; 2.5 kVRMS isolation meets IEC 62109 safety requirements for EV charging interfaces. | Use Scenario: Active cell balancing and contactor control in high-voltage battery packs (400–800 V). IC Role / Device Role / Timing Role: SI8231BB-AS1R drives isolated MOSFET switches for passive/active balancing circuits and precharge/disconnect relays. Use Value: AEC-Q100 qualification ensures reliability over 15+ year vehicle lifetime; independent UVLO prevents misfiring during pack voltage transients. |
| Solar Inverter DC/DC Stage | Traction Inverter Gate Drive Interface |
Use Scenario: Isolated gate drive for boost converter MOSFETs in string-level solar optimizer modules. IC Role / Device Role / Timing Role: SI8231BB-AS1R delivers synchronized, overlap-protected drive signals to high-side/low-side FETs in non-isolated DC/DC converters. Use Value: SOIC-16 narrow-body footprint saves PCB area in compact optimizer housings; 0.5 A output sustains 10–20 ns rise/fall times into 1 nF gate loads. | Use Scenario: Secondary-side gate drive interface between MCU and IGBT/SiC half-bridge in traction inverter submodules. IC Role / Device Role / Timing Role: SI8231BB-AS1R translates MCU PWM commands into isolated, dead-time-controlled gate signals for motor phase legs. Use Value: Programmable dead time (via RDT) allows tuning to match IGBT turn-on/turn-off asymmetry; 125 °C operation supports under-hood mounting near power modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8231BD-AS | 5.0 kVRMS isolation, SOIC-16 wide-body package, same 0.5 A output and PWM input | Required where reinforced insulation per UL62368-1 or 2 MOPP per IEC60601-1 is mandated | Select Si8231BD-AS when higher isolation voltage is needed for medical or industrial safety standards |
| UCC5390ECDR | TI device with 5.7 kVRMS isolation, 4 A peak output, and integrated Miller clamp; no programmable dead time | Targets higher-power inverters requiring stronger drive and active Miller clamping | Choose UCC5390ECDR for >1 kW motor drives needing enhanced short-circuit protection and higher current capability |
Compared with Si8231BD-AS, SI8231BB-AS1R trades isolation margin for smaller SOIC-16 narrow-body footprint and lower cost-ideal for space-constrained automotive OBCs. Against UCC5390ECDR, it offers simpler dead-time configuration and lower gate drive strength, better matching medium-power solar and BMS applications.
Availability
SI8231BB-AS1R is available at Aetrix Electronics and suitable for automotive onboard chargers, battery management systems, and solar inverter DC/DC stages requiring stable component supply, AEC-Q100 compliance, and 2.5 kVRMS isolation.
Supply support for SI8231BB-AS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, mobile, infrastructure, and precision analog components for high-reliability applications.
The Si823x family was designed specifically for isolated gate driving in automotive and industrial power conversion, emphasizing robustness, programmable timing control, and AEC-Q100 qualification from wafer fabrication through final test.
FAQ
What is the isolation voltage rating of the SI8231BB-AS1R?
The SI8231BB-AS1R has a certified 2.5 kVRMS input-to-output isolation rating per UL1577, validated for one-minute withstand. This rating applies to the SOIC-16 narrow-body package variant and supports reinforced insulation in systems up to 400 VAC working voltage, such as EV onboard chargers and industrial inverters.
Does the SI8231BB-AS1R support programmable dead time?
Yes, the SI8231BB-AS1R supports user-programmable dead time via an external resistor (RDT) connected from the DT pin to ground. Dead time is calculated as DT = 10 × RDT (ns, with RDT in kΩ), enabling precise adjustment from ~0 ns to 1000 ns to prevent shoot-through in half-bridge configurations.
What is the function of the DISABLE pin on the SI8231BB-AS1R?
The DISABLE pin on the SI8231BB-AS1R is an active-high control that forces both VOA and VOB outputs low within ≤100 ns (tSD), overriding all input states including PWM and UVLO conditions. It resumes normal operation within tRESTART after being pulled low, providing fast, deterministic fault shutdown in safety-critical power stages.
Is the SI8231BB-AS1R qualified for automotive applications?
Yes, the SI8231BB-AS1R is AEC-Q100 qualified (Grade 1: –40 °C to +125 °C) and designated as an automotive-grade part (suffix "-AS"). It is manufactured using automotive-specific process flows, supported by AIAG-compliant PPAP documentation, and listed in IMDS and CAMDS for full material traceability in vehicle programs.
What are the UVLO thresholds for the SI8231BB-AS1R?
The SI8231BB-AS1R features independent UVLO monitoring: VDDI UVLO rising threshold is 8 V (±0.3 V), with hysteresis of 0.5 V. Driver-side supplies VDDA and VDDB each have identical 8 V UVLO thresholds. Outputs remain low until all monitored supplies exceed their respective UVLO+ levels, ensuring fail-safe startup and shutdown behavior.
SI8231BB-AS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Number of Channels:
- 2
- Voltage - Isolation:
- 2500Vrms
- Common Mode Transient Immunity (Min):
- 20kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 45ns, 45ns
- Pulse Width Distortion (Max):
- 5.6ns
- Rise / Fall Time (Typ):
- 20ns, 20ns (Max)
- Current - Output High, Low:
- 250mA, 500mA
- Current - Peak Output:
- 500mA
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 6.5V ~ 24V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
- Approval Agency:
- CQC, CSA, UL, VDE
SI8231BB-AS1R FAQ
1.How can I place an order for SI8231BB-AS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8231BB-AS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8231BB-AS1R reliable?
The price and inventory of SI8231BB-AS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8231BB-AS1R is usually 5 days.
3.What payment methods are accepted for SI8231BB-AS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8231BB-AS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8231BB-AS1R?
SI8231BB-AS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8231BB-AS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8231BB-AS1R?
For technical support, including SI8231BB-AS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8231BB-AS1R requirements.
6.How does Aetrix verify that SI8231BB-AS1R is sourced from the original manufacturer or authorized distributors?
All SI8231BB-AS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8231BB-AS1R meets industry standards.
7.What is the process for return or replacement of SI8231BB-AS1R?
All SI8231BB-AS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI8231BB-AS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8231BB-AS1R part is unused and in its original packaging.
Return procedure for SI8231BB-AS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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