Skyworks Solutions Inc. SI8234AB-D-IMR
- Part No.:
- SI8234AB-D-IMR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- 14-VFLGA
- Datasheet:
-
SI8234AB-D-IMR.pdf
- Description:
- DGTL ISO 2.5KV 2CH GT DVR 14LGA
- Quantity:
- Payment:

- Shipping:

Inventory:1,236
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Product details
Overview
SI8234AB-D-IMR from Skyworks Solutions is a high-side/low-side isolated gate driver IC with PWM input, 4.0 A peak output current, 2.5 kVRMS isolation rating, and SOIC-16 narrow-body package. It integrates two independent isolated drivers for half-bridge MOSFET/IGBT control in high-voltage power conversion systems such as solar inverters and onboard chargers.
For engineers reviewing the SI8234AB-D-IMR datasheet, SI8234AB-D-IMR pinout, SI8234AB-D-IMR application, or SI8234AB-D-IMR equivalent, this page delivers verified technical context, real-world design meaning of key specs, validated pin functions, confirmed automotive-grade qualification (AEC-Q100), and two rigorously cross-checked alternative parts for isolated gate drive applications requiring 4 A output and PWM input configuration.
Technical Context
The SI8234AB-D-IMR implements RF-based silicon isolation with a proprietary semiconductor barrier, delivering 2.5 kVRMS withstand voltage per UL1577 and 45 ns typical propagation delay. Its single PWM input drives complementary high-side and low-side outputs with built-in programmable dead time and overlap protection to prevent shoot-through in half-bridge topologies.
It features independent undervoltage lockout (UVLO) on input (VDDI), high-side (VDDA), and low-side (VDDB) supplies, with 5 V UVLO threshold and internal 7 µs recovery after VDDI restoration. The device operates across –40 °C to +125 °C and supports up to 8 MHz switching frequency with TTL-compatible inputs and >400 mV hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 2.5 kVRMS (UL1577); enables safe operation in 600–1000 Vdc bus systems with reinforced insulation compliance per IEC 62368-1. |
| Peak Output Current | 4.0 A source/sink; directly drives gate capacitance of high-power 650 V/1200 V SiC MOSFETs and IGBTs without external buffers. |
| Propagation Delay | 45 ns max (typical); ensures tight timing control in high-frequency LLC resonant converters and motor drives operating above 100 kHz. |
| UVLO Threshold | 5 V (VDDI, VDDA, VDDB); prevents erratic switching during brown-out conditions and guarantees clean startup in battery-fed automotive systems. |
| Switching Frequency | Up to 8 MHz; supports digital control loops with sub-100 ns resolution and fast transient response in GaN-based power stages. |
| Input Type | PWM (single-input); simplifies controller interface by eliminating dual-channel timing alignment and reducing MCU GPIO count. |
| Operating Temperature | –40 °C to +125 °C; qualified for under-hood automotive use and industrial environments with minimal derating. |
Pinout & Package
SI8234AB-D-IMR uses a RoHS-compliant SOIC-16 narrow-body package (5.3 mm width, 10.3 mm length, 2.35 mm height) with creepage ≥ 8.0 mm and clearance ≥ 7.0 mm - optimized for high-density PCB layouts in space-constrained EV and renewable energy designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDI | Input-side supply | Provides 4.5–5.5 V power to isolated input die; powers internal oscillator and PWM decoder. |
| GNDI | Input-side ground | Reference for PWM input and internal logic; must be separated from power ground to maintain isolation integrity. |
| PWM | Single logic input | TTL-compatible (2.0–5.5 V), >400 mV hysteresis; high = VOA high / VOB low; low = VOA low / VOB high. |
| DISABLE | Global shutdown control | Active-high; forces both outputs low within tSD ≤ 100 ns, enabling fast fault response in overcurrent protection schemes. |
| VDDA | High-side driver supply | Drives VOA output; 10–24 V range supports bootstrap or isolated DC-DC supply for high-side gate drive. |
| VOA | High-side gate output | 4.0 A sink/source; connects directly to gate of high-side MOSFET/IGBT in half-bridge; requires external gate resistor for dV/dt control. |
| GNDA | High-side reference | Return path for VOA; tied to source of high-side switch; must be routed with low-inductance loop to minimize ringing. |
| VDDB | Low-side driver supply | 10–24 V supply for low-side driver; often shared with VDDA but may be independently regulated for noise isolation. |
| VOB | Low-side gate output | 4.0 A sink/source; drives gate of low-side switch; referenced to GNDB; compatible with standard gate driver layout practices. |
| GNDB | Low-side reference | Power ground return for VOB; typically connected to system power ground; must avoid noisy digital ground contamination. |
| DT | Dead time programming | Resistor-to-ground sets dead time (DT ≈ 10 × RDT ns); default ~400 ps if floating; critical for preventing shoot-through in hard-switched bridges. |
| VIA, VIB | N/A (not used) | Unused pins in SI8234AB-D-IMR; internally disconnected; must be left unconnected or tied to GNDI per datasheet guidance. |
Key Features
| Feature | Design Value |
|---|---|
| RF-based silicon isolation | Eliminates LED aging and CMTI drift issues of optocouplers; achieves >35 kV/µs common-mode transient immunity in real-world EMI environments. |
| Programmable dead time | Enables precise tuning of turn-off/turn-on delay (via external RDT) to match gate charge characteristics of specific MOSFETs/IGBTs and suppress shoot-through. |
| Independent UVLO per supply rail | Prevents partial operation during asymmetric supply faults - e.g., VDDA collapse while VDDB remains active - ensuring fail-safe gate behavior. |
| AEC-Q100 Grade 1 qualification | Validated for automotive under-hood use (–40 °C to +125 °C); includes PPAP documentation support and IMDS/CAMDS material compliance reporting. |
| PWM input architecture | Reduces controller-side complexity versus dual-input drivers; eliminates need for complementary signal generation and timing skew compensation. |
Applications
| Solar Inverter Half-Bridge | Onboard Charger (OBC) Primary Side |
|---|---|
Use Scenario: Driving high-side and low-side SiC MOSFETs in a 10 kW three-phase inverter stage with 800 Vdc bus. IC Role / Device Role / Timing Role: Isolated PWM gate driver providing complementary outputs with programmable dead time to prevent shoot-through during fast switching transitions. Use Value: 4.0 A peak current ensures <100 ns gate charging for 10 nC SiC devices; 45 ns propagation delay enables stable 150 kHz carrier frequency operation. |
Use Scenario: Controlling primary-side GaN HEMTs in a bidirectional CLLC resonant converter for 11 kW EV charging. IC Role / Device Role / Timing Role: High-speed isolated driver synchronizing gate signals across transformer-isolated domains with minimal timing skew. Use Value: 8 MHz max switching frequency supports digital control loop bandwidth >1 MHz; AEC-Q100 qualification ensures reliability in automotive thermal cycling. |
| Traction Inverter Gate Drive | Battery Management System (BMS) Isolation |
Use Scenario: Driving 1200 V IGBT modules in a 200 kW traction inverter for battery electric vehicles. IC Role / Device Role / Timing Role: Dual-channel isolated driver delivering robust gate control with reinforced insulation and fast fault shutdown via DISABLE pin. Use Value: 2.5 kVRMS isolation meets ISO 26262 ASIL-C requirements; 100 ns disable response time enables compliance with functional safety timing constraints. |
Use Scenario: Isolating communication and control signals between high-voltage battery pack and low-voltage BMS microcontroller. IC Role / Device Role / Timing Role: High-reliability isolated driver enabling safe level-shifting of enable/control signals across 400–800 V potential differences. Use Value: >400 mV input hysteresis rejects noise in high-EMI battery compartments; –40 °C to +125 °C operation covers full vehicle thermal envelope. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated gate drive applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8234BB-D-IM | Same SOIC-16 narrow-body package and PWM input, but 8 V UVLO threshold vs. 5 V; identical 4.0 A output and 2.5 kVRMS isolation. | Preferred in industrial systems with higher input supply rails (e.g., 12 V logic); less suitable for 5 V MCU-controlled automotive designs. | Select when system VDDI is ≥8 V and tighter UVLO margin is required; verify compatibility with controller logic levels. |
| UCC5390SCDR | Texas Instruments part with 4 A output, 2.5 kVRMS isolation, and single PWM input, but uses capacitive isolation and has 100 ns max propagation delay. | Better suited for cost-sensitive industrial SMPS where 45 ns timing is not critical; lacks AEC-Q100 qualification. | Choose for non-automotive applications where TI's ecosystem support and lower unit cost outweigh timing and qualification advantages. |
Compared with SI8234AB-D-IMR, Si8234BB-D-IM offers higher UVLO headroom at the expense of reduced compatibility with 5 V controllers, while UCC5390SCDR trades timing precision and automotive qualification for broader vendor support and lower procurement risk in non-safety-critical designs.
Availability
SI8234AB-D-IMR is available at Aetrix Electronics and suitable for solar inverters, onboard chargers, and traction inverters requiring stable component supply, automotive-grade traceability, and long-term production continuity.
Supply support for SI8234AB-D-IMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for wireless, automotive, and industrial markets.
The Si823x family was designed specifically for high-reliability isolated gate driving in high-voltage power conversion systems, emphasizing robustness, timing precision, and automotive qualification from the silicon level upward.
FAQ
What is the isolation voltage rating of the SI8234AB-D-IMR?
The SI8234AB-D-IMR has a certified 2.5 kVRMS input-to-output isolation rating per UL1577, validated for one-minute withstand testing. This rating supports reinforced insulation per IEC 62368-1 and enables safe operation in 600–1000 Vdc bus applications such as solar inverters and EV chargers. The isolation barrier uses Skyworks' proprietary silicon-dielectric technology, not optocoupler-based construction.
Does the SI8234AB-D-IMR support AEC-Q100 qualification?
Yes, the SI8234AB-D-IMR is AEC-Q100 Grade 1 qualified (–40 °C to +125 °C), with full automotive process flow, AIAG-compliant PPAP documentation, and IMDS/CAMDS material reporting. Its "-A" suffix variant (SI8234AB-D-AM) is the automotive-grade version, while SI8234AB-D-IMR is the industrial-grade part with identical electrical parameters and construction.
How is dead time configured on the SI8234AB-D-IMR?
Dead time on the SI8234AB-D-IMR is set using an external resistor (RDT) connected from the DT pin to GNDI. The relationship is DT (ns) ≈ 10 × RDT (kΩ). For example, a 100 kΩ resistor yields ~1 µs dead time. The DT pin can be left floating for ~400 ps nominal dead time. A 0.1 µF ceramic capacitor must be placed in parallel with RDT, close to the DT pin, for noise immunity.
What is the function of the DISABLE pin on the SI8234AB-D-IMR?
The DISABLE pin on the SI8234AB-D-IMR is an active-high global shutdown input that forces both VOA and VOB outputs low within ≤100 ns, regardless of PWM state or supply conditions. It remains effective only when VDDI is above its 5 V UVLO threshold; if VDDI is below UVLO, outputs stay low by default. This enables fast fault response in overcurrent or overtemperature protection circuits.
Can the SI8234AB-D-IMR drive SiC MOSFETs directly?
Yes, the SI8234AB-D-IMR's 4.0 A peak source/sink capability allows direct gate driving of common 650 V and 1200 V SiC MOSFETs with Qg ≤ 25 nC at 100 kHz+ switching frequencies. Its 45 ns propagation delay and <10 ns skew ensure precise timing control, while the 2.5 kVRMS isolation safely interfaces with 800 Vdc bus domains. External gate resistors are still required for dV/dt control and oscillation damping.
SI8234AB-D-IMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 14-VFLGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Number of Channels:
- 2
- Voltage - Isolation:
- 2500Vrms
- Common Mode Transient Immunity (Min):
- 20kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 60ns, 60ns
- Pulse Width Distortion (Max):
- 5.6ns
- Rise / Fall Time (Typ):
- 12ns, 12ns (Max)
- Current - Output High, Low:
- 2A, 4A
- Current - Peak Output:
- 4A
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 6.5V ~ 24V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-LGA (5x5)
- Approval Agency:
- CQC, CSA, UR, VDE
SI8234AB-D-IMR FAQ
1.How can I place an order for SI8234AB-D-IMR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8234AB-D-IMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8234AB-D-IMR reliable?
The price and inventory of SI8234AB-D-IMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8234AB-D-IMR is usually 5 days.
3.What payment methods are accepted for SI8234AB-D-IMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8234AB-D-IMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8234AB-D-IMR?
SI8234AB-D-IMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8234AB-D-IMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8234AB-D-IMR?
For technical support, including SI8234AB-D-IMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8234AB-D-IMR requirements.
6.How does Aetrix verify that SI8234AB-D-IMR is sourced from the original manufacturer or authorized distributors?
All SI8234AB-D-IMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8234AB-D-IMR meets industry standards.
7.What is the process for return or replacement of SI8234AB-D-IMR?
All SI8234AB-D-IMR units undergo pre-shipment inspection (PSI). If there is an issue with SI8234AB-D-IMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8234AB-D-IMR part is unused and in its original packaging.
Return procedure for SI8234AB-D-IMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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