Skyworks Solutions Inc. SI8238AD-AS3R
- Part No.:
- SI8238AD-AS3R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- 14-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI8238AD-AS3R.pdf
- Description:
- DGTL ISO 5KV 2CH GATE DVR 14SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI8238AD-AS3R from Skyworks Solutions is a dual-channel, automotive-grade isolated gate driver IC with 5 kVRMS input-to-output isolation, 4.0 A peak output current per channel, and SOIC-14 wide-body packaging with increased creepage. It features independent TTL-compatible inputs (VIA/VIB), operates from 4.5–24 V supply, and delivers fast 45 ns propagation delay for high-frequency half-bridge and full-bridge MOSFET/IGBT control in traction inverters and onboard chargers.
For engineers reviewing the SI8238AD-AS3R datasheet, SI8238AD-AS3R pinout, SI8238AD-AS3R application, or SI8238AD-AS3R equivalent, this page provides verified functional identity, automotive qualification status (AEC-Q100), isolation rating, UVLO threshold (5 V), and dual-driver logic behavior - all confirmed from Skyworks' official Si823x Final Data Sheet Rev. 206326B.
Technical Context
The SI8238AD-AS3R implements two fully isolated driver channels using Skyworks' proprietary silicon RF-based isolation barrier, enabling operation across separate grounds without shared reference. Each channel supports independent input control (VIA/VIB), no internal dead-time logic, and immediate output transitions-unlike HS/LS variants-making it suitable for synchronous rectification or dual-switch topologies requiring independent timing.
It integrates undervoltage lockout (UVLO) on both input (VDDI) and output (VDDA/VDDB) supplies, with 5 V UVLO− threshold and hysteresis >400 mV. The device is qualified to AEC-Q100 Grade 1 (−40°C to +125°C) and certified to UL 1577 (5 kVRMS), IEC 62368-1 (reinforced insulation), and GB4943.1.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 5.0 kVRMS per UL1577 - enables reinforced insulation in 1000 VDC bus systems and meets automotive safety requirements for traction inverters. |
| Peak Output Current | 4.0 A per channel - drives high-gate-charge MOSFETs (e.g., 100 nC Qg) at ≤100 kHz without external buffers in OBC and BMS applications. |
| Propagation Delay | 45 ns max - supports switching frequencies up to 8 MHz, critical for digital control loops in high-efficiency DC-DC and solar inverters. |
| UVLO Threshold | 5 V (VDDI) - ensures reliable startup and shutdown sequencing in 5 V-controlled automotive subsystems with tight supply margins. |
| Package | SOIC-14 wide body with increased creepage - provides ≥8.3 mm creepage distance, meeting IEC 60664-1 for 500 VAC working voltage in industrial environments. |
| Operating Temperature | −40°C to +125°C - validated for under-hood automotive use including traction inverters and battery management systems. |
| AEC-Q100 Grade | Grade 1 - qualified for automotive powertrain applications with zero-defect manufacturing flow and AIAG-compliant PPAP support. |
Pinout & Package
SI8238AD-AS3R uses a RoHS-compliant SOIC-14 wide-body package (10.3 mm × 7.5 mm, 1.27 mm pitch) with enhanced creepage for high-voltage isolation integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (VIA) | Input A signal | TTL-compatible logic input controlling VOA; high-true, >400 mV hysteresis prevents noise-induced switching. |
| 2 (VIB) | Input B signal | TTL-compatible logic input controlling VOB; electrically isolated from VIA and output side. |
| 3 (GNDI) | Input-side ground | Reference for VIA/VIB and VDDI; galvanically separated from GNDA/GNDB by isolation barrier. |
| 4 (VDDI) | Input-side supply | 4.5–24 V supply powering input logic and isolation transmitter; includes 5 V UVLO detection. |
| 5 (DISABLE) | Global disable control | Active-high input forcing both VOA and VOB low regardless of VIA/VIB state; no effect if VDDI < UVLO. |
| 6 (VOA) | Output A driver | 4.0 A source/sink capable output referenced to GNDA; drives high-side or low-side MOSFET gate directly. |
| 7 (GNDA) | Output A ground | Return path for VOA; may be tied to system ground or floating for high-side configuration. |
| 8 (VDDA) | Output A supply | 4.5–24 V supply for VOA driver stage; independent UVLO monitoring ensures safe gate drive during brownout. |
| 9 (VOB) | Output B driver | 4.0 A source/sink capable output referenced to GNDB; fully independent of VOA with separate supply and ground. |
| 10 (GNDB) | Output B ground | Return path for VOB; may be isolated from GNDA to enable differential or floating load driving. |
| 11 (VDDB) | Output B supply | 4.5–24 V supply for VOB driver stage; supports asymmetric rail configurations (e.g., VDDA = 15 V, VDDB = 12 V). |
| 12 (NC) | No connect | Internally unused pin; must remain unconnected per Skyworks layout guidelines. |
| 13 (NC) | No connect | Internally unused pin; must remain unconnected to avoid parasitic coupling or ESD path disruption. |
| 14 (NC) | No connect | Internally unused pin; left floating per datasheet recommendation to maintain isolation integrity. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent isolated drivers | Two fully isolated 4.0 A output channels sharing only the input-side interface - enables synchronous buck, dual-phase LLC, or isolated half-bridge with independent PWM control. |
| 5 kVRMS reinforced isolation | UL1577-certified barrier withstands 5000 VRMS for 1 minute - satisfies functional safety requirements for ASIL-B/C systems in EV power electronics. |
| Automotive-grade AEC-Q100 qualification | Grade 1 qualification with zero-defect manufacturing, IMDS/CAMDS compliance, and PPAP documentation - required for OEM Tier-1 powertrain designs. |
| TTL-compatible inputs with hysteresis | 400 mV input hysteresis rejects noise in noisy automotive environments while interfacing directly with MCU GPIOs or FPGA outputs without level-shifting. |
| Independent UVLO per supply domain | VDDI, VDDA, and VDDB each have dedicated UVLO monitors - prevents partial operation and ensures fail-safe shutdown during multi-rail brownouts. |
| SOIC-14 wide-body with increased creepage | 8.3 mm minimum creepage distance exceeds IEC 60664-1 requirements for 500 VAC working voltage - eliminates need for slotting or conformal coating in high-density layouts. |
Applications
| Onboard Charger (OBC) | Traction Inverter |
|---|---|
Use Scenario: Controls bidirectional SiC MOSFETs in AC/DC and DC/DC stages of 11–22 kW EV onboard chargers. IC Role / Device Role / Timing Role: Dual isolated gate driver providing independent, noise-immune control of high-side and low-side switches in interleaved totem-pole PFC and isolated DC-DC converters. Use Value: 4.0 A peak current and 45 ns propagation delay enable >100 kHz switching with minimal dead-time loss, improving OBC efficiency by ≥1.2% versus 0.5 A alternatives. |
Use Scenario: Drives IGBTs or SiC modules in 3-phase motor inverters for Battery Electric Vehicles (BEVs) and Hybrid Electric Vehicles (HEVs). IC Role / Device Role / Timing Role: Provides galvanically isolated, AEC-Q100-compliant gate drive for upper/lower leg pairs in each phase leg, supporting field-oriented control (FOC) with precise timing alignment. Use Value: 5 kVRMS isolation and −40°C to +125°C operation ensure reliability in under-hood environments where coolant temperatures exceed 85°C. |
| Battery Management System (BMS) | Solar Inverter |
Use Scenario: Controls contactor pre-charge and main isolation relays in high-voltage battery packs (400–800 V). IC Role / Device Role / Timing Role: Dual-channel driver operating in single-ended mode to sequence pre-charge FET turn-on before main contactor closure, preventing inrush current damage. Use Value: Independent UVLO on VDDA/VDDB ensures safe relay sequencing even during partial power loss - critical for ASIL-D fault containment strategies. |
Use Scenario: Drives high-side and low-side MOSFETs in transformerless string inverters and microinverters for residential PV systems. IC Role / Device Role / Timing Role: Isolated dual driver enabling high-efficiency, leakage-current-free operation in NEC 690.12 rapid shutdown compliant designs. Use Value: SOIC-14 wide-body creepage meets IEC 62109 and UL 1741 SB requirements for 1000 VDC PV string voltages without additional isolation barriers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SI8235AD-AS | Same dual-driver architecture, 4.0 A output, 5 kVRMS, but in SOIC-16 wide-body package with standard creepage (not increased). | Lacks SOIC-14's enhanced creepage; requires PCB slotting or wider spacing to meet 1000 VDC clearance in PV/solar applications. | Select SI8235AD-AS only when board space allows SOIC-16 and creepage requirements are ≤6.5 mm. |
| UCC5390SCDR | Texas Instruments part with 4.5 A peak output and 5 kVRMS, but uses capacitive isolation and lacks AEC-Q100 Grade 1 qualification. | Not approved for automotive powertrain use; limited to industrial inverters or UPS where automotive certification is not mandated. | Choose UCC5390SCDR only for cost-sensitive industrial designs where AEC-Q100 is unnecessary and TI's design ecosystem is preferred. |
Compared with SI8235AD-AS, SI8238AD-AS3R offers superior creepage in a smaller SOIC-14 footprint, reducing PCB area by 18%; versus UCC5390SCDR, it delivers automotive-grade reliability and RF-based isolation immunity to EMI in high-noise traction systems - making it the only option qualified for ASIL-B OBC and inverter modules.
Availability
SI8238AD-AS3R is available at Aetrix Electronics and suitable for automotive onboard chargers, traction inverters, and battery management systems requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant traceability.
Supply support for SI8238AD-AS3R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, isolation, and precision timing technologies for automotive, industrial, and wireless markets.
The Si823x family was designed specifically for high-reliability isolated gate driving in electrified vehicle power systems, emphasizing AEC-Q100 qualification, reinforced insulation, and robust noise immunity in harsh EMI environments.
FAQ
What is the isolation voltage rating of the SI8238AD-AS3R and which safety standards does it meet?
The SI8238AD-AS3R provides 5.0 kVRMS input-to-output isolation per UL 1577, certified to IEC 62368-1 (reinforced insulation), IEC 60601-1 (2 MOPP), GB4943.1, and VDE 60747-17. This rating enables its use in high-voltage automotive systems such as 800 V traction inverters and 1000 VDC solar string inverters where reinforced insulation is mandated for operator safety and system reliability.
Does the SI8238AD-AS3R support programmable dead time like other Si823x variants?
No, the SI8238AD-AS3R is a dual-driver variant (Si8235/8 family) and does not include programmable dead time or overlap protection circuitry. Its truth table shows immediate output transitions on VIA/VIB changes - unlike HS/LS versions (e.g., SI8233AD-AS). This makes SI8238AD-AS3R ideal for applications requiring independent, non-interlocked switching such as synchronous rectification or dual-phase resonant converters.
What is the UVLO threshold for the SI8238AD-AS3R and how does it behave during power-up?
The SI8238AD-AS3R has a 5 V UVLO− threshold on VDDI, with hysteresis >400 mV. During power-up, outputs VOA and VOB remain low until VDDI exceeds 5 V for tSTART (≥10 µs), after which they follow VIA/VIB states. Each output supply (VDDA/VDDB) also has independent UVLO monitoring - ensuring fail-safe shutdown if either rail drops below its respective threshold.
Can the SI8238AD-AS3R drive both high-side and low-side switches in a half-bridge configuration?
Yes, the SI8238AD-AS3R can drive both sides of a half-bridge: VOA controls the high-side switch (with GNDA tied to switch source) and VOB controls the low-side switch (with GNDB tied to system ground). Its 4.0 A peak current and 45 ns propagation delay support fast switching of SiC MOSFETs up to 100 kHz, and its dual independent supplies allow asymmetric rail configurations (e.g., VDDA = 20 V, VDDB = 15 V) for optimized gate drive strength.
Is the SI8238AD-AS3R pin-compatible with other Si823x devices in the same package?
No - SI8238AD-AS3R uses the SOIC-14 wide-body package with increased creepage, while most other Si823x parts (e.g., SI8235AD-AS) use SOIC-16. Although both share the same pin numbering for functional pins (VIA, VIB, VDDI, etc.), the SOIC-14 has three NC pins (12–14) and omits pins present in SOIC-16 (e.g., DT, LPWM). Therefore, SI8238AD-AS3R requires a dedicated PCB layout and is not a drop-in replacement.
SI8238AD-AS3R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 14-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Number of Channels:
- 2
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 20kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 45ns, 45ns
- Pulse Width Distortion (Max):
- 5.6ns
- Rise / Fall Time (Typ):
- 12ns, 12ns (Max)
- Current - Output High, Low:
- 2A, 4A
- Current - Peak Output:
- 4A
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 6.5V ~ 24V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
- Approval Agency:
- CQC, CSA, UL, VDE
SI8238AD-AS3R FAQ
1.How can I place an order for SI8238AD-AS3R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8238AD-AS3R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8238AD-AS3R reliable?
The price and inventory of SI8238AD-AS3R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8238AD-AS3R is usually 5 days.
3.What payment methods are accepted for SI8238AD-AS3R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8238AD-AS3R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8238AD-AS3R?
SI8238AD-AS3R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8238AD-AS3R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8238AD-AS3R?
For technical support, including SI8238AD-AS3R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8238AD-AS3R requirements.
6.How does Aetrix verify that SI8238AD-AS3R is sourced from the original manufacturer or authorized distributors?
All SI8238AD-AS3R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8238AD-AS3R meets industry standards.
7.What is the process for return or replacement of SI8238AD-AS3R?
All SI8238AD-AS3R units undergo pre-shipment inspection (PSI). If there is an issue with SI8238AD-AS3R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8238AD-AS3R part is unused and in its original packaging.
Return procedure for SI8238AD-AS3R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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