Skyworks Solutions Inc. SI82394AB4-AS1R
- Part No.:
- SI82394AB4-AS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI82394AB4-AS1R.pdf
- Description:
- DGTL ISO 2.5KV 2CH GT DVR 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,253
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI82394AB4-AS1R from Skyworks Solutions is a dual-channel isolated gate driver with PWM input architecture, designed for high-side/low-side IGBT and MOSFET control in automotive and industrial inverters. It delivers 4.0 A peak output current, supports 2.5–5.5 V input supply (VDDI), features programmable dead time (40–600 ns), integrated deglitch filtering, and enhanced UVLO with status feedback. It operates across –40 to +125 °C and is AEC-Q100 qualified.
For engineers reviewing the SI82394AB4-AS1R datasheet, SI82394AB4-AS1R pinout, SI82394AB4-AS1R application, or SI82394AB4-AS1R equivalent, key selection considerations include its single-PWM-input HS/LS topology, automotive-grade qualification, 5 kVRMS isolation rating, 100 kV/µs CMTI, and safe 1 ms delayed startup sequence - all critical for traction inverter and on-board charger designs.
Technical Context
The SI82394AB4-AS1R implements RF-based silicon isolation with on/off keying modulation, enabling robust noise immunity and eliminating optical aging concerns. Its single PWM input drives complementary outputs with programmable dead time to prevent shoot-through, while independent VDDA/VDDB supplies support asymmetric power domains.
It integrates enhanced UVLO monitoring per output channel, status feedback via RDY pin, active-high EN control with fail-safe low-default behavior during VDDI loss, and deglitch circuitry to suppress transient noise on the PWM input - all validated under AEC-Q100 stress conditions for automotive reliability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 5 kVRMS withstand voltage - enables reinforced insulation per IEC62368-1 and VDE 0884-10 for safety-critical motor drives. |
| Output Drive Current | 4.0 A peak sink/source - sufficient to directly drive high-gate-charge IGBTs and SiC MOSFETs without external buffers. |
| Input Supply Range (VDDI) | 2.5 V to 5.5 V - compatible with modern low-voltage microcontrollers and ASIL-B domain controllers. |
| Dead Time Programmability | 40–600 ns - configurable via external resistor to match switching characteristics of power devices and prevent cross-conduction. |
| CMTI | 100 kV/µs - ensures reliable operation in high-dV/dt environments like traction inverters and solar string converters. |
| Startup Delay | 1 ms typical safe initialization - guarantees monotonic output behavior during power-up, preventing unintended gate turn-on. |
| Operating Temperature | –40 °C to +125 °C - meets extended automotive junction temperature requirements for under-hood applications. |
| UVLO Threshold | 6 V (VDDA/VDDB) - enhanced UVLO with status feedback enables real-time fault detection and system-level protection coordination. |
Pinout & Package
SI82394AB4-AS1R is housed in a RoHS-compliant SOIC-16 narrow-body package (7.5 mm width), optimized for high-density automotive PCB layouts and compatible with standard JEDEC reflow profiles (260 °C peak).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Input ground reference | Input-side GND - must be connected to controller ground plane; forms isolation barrier reference for RF transmitter. |
| VIB | Input power supply | Input-side VDDI - powers internal logic and RF oscillator; range 2.5–5.5 V; requires local 1 µF + 0.1 µF decoupling. |
| PWM | Control input | Single TTL-compatible PWM signal - high = VOA high / VOB low; low = VOA low / VOB high; includes deglitch filtering. |
| EN | Enable control | Active-high enable - pulls both outputs low when deasserted; requires 100 kΩ pull-down to VIA for fail-safe default. |
| RDY | Status output | Open-drain ready indicator - goes high after valid VDDI, VDDA, VDDB, and successful startup delay; signals system controller. |
| VDDA | High-side driver supply | Power for channel A output stage - 10–24 V range; independent of VDDB to support bootstrap or isolated supplies. |
| VOA | High-side gate output | Complementary high-current output - drives gate of high-side switch; 4.0 A peak, RDS(ON) = 2.7 Ω (pull-up) / 1 Ω (pull-down). |
| GNDA | High-side ground | Driver-side ground for channel A - must be isolated from input ground and tied to high-side switch source/emitter. |
| VDDB | Low-side driver supply | Power for channel B output stage - 10–24 V range; electrically isolated from VDDA and VDDI. |
| VOB | Low-side gate output | Complementary high-current output - drives gate of low-side switch; synchronized with VOA with programmable dead time. |
| GNDB | Low-side ground | Driver-side ground for channel B - tied to low-side switch source/emitter; isolated from GNDA and VIA. |
| VDDI | Input supply | Redundant label for VIB - same net; powers input logic and isolation barrier transmitter. |
| GNDI | Input ground | Redundant label for VIA - same net; input reference for PWM and EN inputs. |
| NC | No connect | Two pins (13 & 14) are unconnected - must remain floating per datasheet; no internal connection or function. |
| NC | No connect | See above - mechanical placeholder for SOIC-16 NB footprint compatibility; no routing or termination required. |
Key Features
| Feature | Design Value |
|---|---|
| Single-PWM high-side/low-side architecture | Eliminates need for external logic or timing circuits - simplifies gate drive design and reduces component count in half-bridge systems. |
| Programmable dead time (40–600 ns) | Adjustable via external resistor to precisely match FET switching delays and prevent shoot-through without firmware intervention. |
| Enhanced UVLO with RDY feedback | Provides real-time fault indication to host controller - enables coordinated shutdown before power device damage occurs. |
| Deglitch filtering on PWM input | Rejects sub-50 ns noise transients - prevents false triggering in EMI-heavy environments like EV powertrains and industrial motor drives. |
| Fail-safe low-default outputs | Guarantees both VOA and VOB go low during VDDI loss or EN deassertion - prevents uncontrolled power device conduction. |
| AEC-Q100 qualified (Grade 1) | Validated for automotive use up to +125 °C ambient - supports OBC, traction inverter, and battery management applications. |
Applications
| On-Board Charger (OBC) | Traction Inverter |
|---|---|
|
Use Scenario: Bidirectional AC/DC and DC/DC conversion in EV charging systems requiring galvanic isolation between grid and battery domains. IC Role / Device Role / Timing Role: High-side/low-side gate driver for SiC MOSFET half-bridges in isolated DC-DC stages and PFC front-ends. Use Value: 5 kVRMS isolation and 100 kV/µs CMTI ensure reliable operation across 1000 V+ battery systems while meeting IEC 62109 and UL 62368-1. |
Use Scenario: Motor phase-leg control in battery electric vehicles, where precise timing and fault resilience are critical for torque accuracy and functional safety. IC Role / Device Role / Timing Role: Isolated gate driver for IGBT/SiC modules in three-phase inverter legs, coordinating complementary switching with programmable dead time. Use Value: AEC-Q100 qualification, –40 to +125 °C operation, and RDY status feedback support ASIL-C system-level diagnostics and ISO 26262 compliance. |
| Battery Management System (BMS) | Solar String Inverter |
|
Use Scenario: Cell balancing and contactor control in high-voltage battery packs, requiring isolation between low-voltage MCU and 400–800 V battery rails. IC Role / Device Role / Timing Role: Gate driver for high-side N-channel MOSFETs used in active cell balancing switches and main contactor pre-charge circuits. Use Value: 2.5 V VDDI compatibility enables direct interface with 3.3 V MCUs; 1 ms safe startup prevents spurious turn-on during cold boot sequences. |
Use Scenario: MPPT and grid-tie stages in residential/commercial solar inverters, where high dv/dt noise and long cable runs demand robust isolation. IC Role / Device Role / Timing Role: Isolated driver for high-frequency SiC half-bridges in DC-AC conversion stages operating at >50 kHz switching frequencies. Use Value: 4.0 A peak drive current and <30 ns propagation delay minimize switching losses; deglitch filtering suppresses EMI from PV array transients. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-side/low-side isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si82394AD4-AS | Same PWM-input HS/LS architecture, identical 4.0 A drive and 40–600 ns dead time, but in SOIC-16 wide-body (WB) package (10.3 mm width). | Requires larger PCB footprint; better thermal performance due to wider copper exposure; not pin-compatible with SI82394AB4-AS1R's narrow-body layout. | Select for higher thermal margin in space-tolerant designs; avoid if board area is constrained or legacy SOIC-16 NB footprint must be maintained. |
| UCC5390SCDWR | Texas Instruments' 4-A isolated dual-channel driver with single PWM input, but uses capacitive isolation (not RF), lower CMTI (35 kV/µs), and no deglitch feature. | Lacks integrated deglitch and enhanced UVLO status feedback; requires external components for noise filtering and fault reporting. | Choose only if TI ecosystem alignment or capacitive-isolation preference outweighs need for 100 kV/µs noise immunity and built-in diagnostic capability. |
Compared with SI82394AB4-AS1R, Si82394AD4-AS offers identical electrical functionality in a thermally superior but physically larger package, while UCC5390SCDWR provides a vendor-diverse alternative with reduced noise immunity and no integrated deglitch - making SI82394AB4-AS1R optimal for compact, high-reliability automotive inverters.
Availability
SI82394AB4-AS1R is available at Aetrix Electronics and suitable for on-board chargers, traction inverters, and battery management systems requiring stable component supply, automotive-grade traceability, and long-term production continuity.
Supply support for SI82394AB4-AS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for high-reliability applications.
The Si8239x family was engineered specifically for automotive and industrial isolated gate driving - replacing optocouplers with RF-based silicon isolation to deliver higher CMTI, longer life, and tighter parameter matching across temperature and lifetime.
FAQ
What is the isolation voltage rating of the SI82394AB4-AS1R?
The SI82394AB4-AS1R is rated for 5 kVRMS isolation withstand voltage per UL 1577 and VDE 0884-10 standards. This reinforced insulation rating is validated for 1 minute and supports safety-critical applications including automotive traction inverters and isolated DC-DC converters where galvanic separation between control and power domains is mandatory. The isolation barrier uses Skyworks' proprietary RF-based silicon technology.
Does the SI82394AB4-AS1R support bootstrap power supply configurations?
No, the SI82394AB4-AS1R does not support bootstrap power for VDDA or VDDB. Its enhanced UVLO architecture requires independent, isolated supplies for each driver channel to ensure accurate fault detection and status feedback. Using a bootstrap circuit would violate the independent supply requirement and disable the UVLO status reporting function. External isolated DC-DC converters or dedicated bias supplies are required.
How is dead time configured on the SI82394AB4-AS1R?
Dead time on the SI82394AB4-AS1R is set externally using a single resistor connected between the DT pin and GNDB. The value selects one of two ranges: 40–600 ns (with deglitch enabled, as in SI82394AB4-AS1R) or 10–200 ns (without deglitch). For this part number, the 40–600 ns range is fixed by internal configuration; the resistor value fine-tunes the exact duration within that span per the datasheet's DT resistor table.
What is the purpose of the RDY pin on the SI82394AB4-AS1R?
The RDY pin on the SI82394AB4-AS1R is an open-drain status output that transitions high only after all supply rails (VDDI, VDDA, VDDB) are valid, UVLO thresholds are met, and the 1 ms safe startup delay has completed. It signals to the system controller that the SI82394AB4-AS1R is fully initialized and outputs are ready for valid PWM commands - enabling synchronized system-level power sequencing and fault-aware startup.
Is the SI82394AB4-AS1R pin-compatible with other Si8239x variants?
No, the SI82394AB4-AS1R is not universally pin-compatible across the Si8239x family. While it shares the SOIC-16 narrow-body footprint with variants like SI82394BB4-AS1R and SI82394CB4-AS1R, it differs from SOIC-14 WB and SOIC-16 WB variants in pin count and assignment. Specifically, pins 13 and 14 are NC in SI82394AB4-AS1R but functional in some wide-body versions - requiring careful layout verification against the specific variant's datasheet.
SI82394AB4-AS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Number of Channels:
- 2
- Voltage - Isolation:
- 2500Vrms
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 135ns, 95ns
- Pulse Width Distortion (Max):
- 5.6ns
- Rise / Fall Time (Typ):
- 12ns, 12ns (Max)
- Current - Output High, Low:
- 2A, 4A
- Current - Peak Output:
- 4A
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 6.5V ~ 24V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
- Approval Agency:
- CQC, CSA, UL, VDE
SI82394AB4-AS1R FAQ
1.How can I place an order for SI82394AB4-AS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82394AB4-AS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82394AB4-AS1R reliable?
The price and inventory of SI82394AB4-AS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82394AB4-AS1R is usually 5 days.
3.What payment methods are accepted for SI82394AB4-AS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82394AB4-AS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82394AB4-AS1R?
SI82394AB4-AS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82394AB4-AS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82394AB4-AS1R?
For technical support, including SI82394AB4-AS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82394AB4-AS1R requirements.
6.How does Aetrix verify that SI82394AB4-AS1R is sourced from the original manufacturer or authorized distributors?
All SI82394AB4-AS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82394AB4-AS1R meets industry standards.
7.What is the process for return or replacement of SI82394AB4-AS1R?
All SI82394AB4-AS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI82394AB4-AS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82394AB4-AS1R part is unused and in its original packaging.
Return procedure for SI82394AB4-AS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI82394AB4-AS1R Tags
-
TLP152(TPL,E
Toshiba Semiconductor and Storage

-
HT0740LG-G
Microchip Technology

-
FOD8314TR2
onsemi

-
1EDI60N12AFXUMA1
Infineon Technologies

-
1EDB7275FXUMA1
Infineon Technologies

-
UCC5350MCDR
Texas Instruments

-
2EDB7259KXUMA1
Infineon Technologies

-
UCC5304DWVR
Texas Instruments

-
SI8261BBC-C-ISR
Skyworks Solutions Inc.

-
HT0440LG-G
Microchip Technology

-
HCPL-0302-500E
Broadcom Limited

-
STGAP2HSCMTR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
