Skyworks Solutions Inc. SI82394BB4-AS1R
- Part No.:
- SI82394BB4-AS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI82394BB4-AS1R.pdf
- Description:
- DGTL ISO 2.5KV 2CH GT DVR 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI82394BB4-AS1R from Skyworks Solutions is an automotive-grade, high-side/low-side isolated gate driver IC with single PWM input, 4.0 A peak output current, 8 V output UVLO threshold, and programmable dead time (40–600 ns). It integrates two reinforced-isolated drivers in a SOIC-16 narrow-body package and is designed for traction inverters and on-board chargers requiring fail-safe operation under undervoltage conditions.
For engineers reviewing the SI82394BB4-AS1R datasheet, SI82394BB4-AS1R pinout, SI82394BB4-AS1R application, or SI82394BB4-AS1R equivalent, key selection criteria include its AEC-Q100 qualification, enhanced UVLO status feedback, deglitch-enabled noise immunity, 1 ms safe startup delay, and compatibility with IGBTs and SiC MOSFETs in high-reliability EV power stages.
Technical Context
The SI82394BB4-AS1R implements RF-based silicon isolation with 5 kVRMS withstand voltage and 100 kV/µs CMTI, enabling robust operation in noisy high-dv/dt motor drive environments. Its single PWM input architecture generates complementary high-side/low-side outputs with programmable dead time to prevent shoot-through in half-bridge configurations.
It features independent UVLO monitoring per driver supply (VDDA/VDDB), status feedback via RDY pin, EN pin for active-high safety shutdown, and fail-safe default-low outputs during VDDI power-down - all supporting ISO 26262 ASIL-B–capable system design without external supervision logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 5 kVRMS reinforced insulation per UL 1577 and VDE 0884-10, enabling direct interface with 600 V+ DC bus systems |
| Peak Output Current | 4.0 A sink/source, sufficient to drive 1200 V SiC MOSFETs with <100 nC gate charge at 100 kHz switching |
| Output UVLO Threshold | 8 V (VDDA/VDDB), ensuring gate drive remains disabled until driver supplies stabilize above minimum FET enhancement voltage |
| Dead Time Range | 40–600 ns programmable, allowing precise tuning to match gate driver propagation skew and FET turn-on/turn-off delays |
| Startup Delay | 1 ms typical safe initialization, guaranteeing monotonic output behavior before controller enables PWM |
| Operating Temperature | –40 °C to +125 °C ambient, validated for under-hood automotive locations per AEC-Q100 Grade 1 |
| CMTI | 100 kV/µs minimum, preventing false triggering in high-di/dt inverter legs with fast-switching wide-bandgap devices |
Pinout & Package
SI82394BB4-AS1R is housed in a RoHS-compliant SOIC-16 narrow-body package (7.5 mm × 10.3 mm, 1.0 mm height) with creepage/clearance ≥8.0 mm, optimized for high-voltage PCB layout and automated assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Input ground reference | Input-side GND; must be connected to controller ground plane, isolated from power ground |
| VIB | Input power supply | 2.5–5.5 V input VDDI; decoupled with 1 µF + 0.1 µF capacitors placed adjacent to pin |
| PWM | Single logic input | TTL-compatible PWM signal; high = VOA high / VOB low; low = VOA low / VOB high |
| EN | Enable control | Active-high safety disable; pulled low via 100 kΩ resistor to VIA when unused |
| RDY | Status output | Open-drain ready indicator; goes high after 1 ms startup delay and valid VDDA/VDDB |
| GND1 | Driver A ground | High-side driver return; tied to source of high-side FET or bootstrap capacitor negative |
| VDDA | Driver A supply | 10–24 V high-side gate drive supply; monitored for 8 V UVLO |
| VOA | High-side output | 4 A capable push-pull output; drives gate of high-side IGBT/SiC MOSFET |
| GND2 | Driver B ground | Low-side driver return; tied to system power ground |
| VDDB | Driver B supply | 10–24 V low-side gate drive supply; independently monitored for 8 V UVLO |
| VOB | Low-side output | 4 A capable push-pull output; drives gate of low-side IGBT/SiC MOSFET |
| NC | No connect | Pins 1, 2, 15, 16 are internally unused; must remain unconnected per datasheet |
Key Features
| Feature | Design Value |
|---|---|
| Enhanced UVLO with status feedback | Independent 8 V UVLO per driver supply plus RDY pin confirms both VDDA and VDDB are valid before enabling outputs |
| Programmable dead time | 40–600 ns range set by external resistor, eliminating need for external dead-time generator IC in half-bridge designs |
| Deglitch filtering | Integrated noise rejection on PWM input, suppressing sub-50 ns transients that could cause unintended switching |
| Fail-safe default-low outputs | VOA and VOB drive low when VDDI is absent or EN is low, preventing uncontrolled FET conduction during power loss |
| AEC-Q100 Grade 1 qualification | Validated for automotive under-hood operation at –40 °C to +125 °C ambient, with zero-defect manufacturing flow |
Applications
| Motor Drive Half-Bridge | Traction Inverter Stage |
|---|---|
Use Scenario: Driving complementary IGBTs in a 400 V battery-fed motor inverter for electric power steering. IC Role / Device Role / Timing Role: High-side/low-side gate driver with synchronized dead time to prevent shoot-through during PWM commutation. Use Value: 4.0 A peak drive current ensures fast SiC MOSFET switching (<50 ns rise/fall), reducing conduction losses while 100 kV/µs CMTI prevents false triggering from motor phase crosstalk. | Use Scenario: Controlling dual 1200 V SiC modules in a rear-axle traction inverter for BEV propulsion. IC Role / Device Role / Timing Role: Isolated PWM-to-complementary-output translator with fault-aware UVLO and RDY handshake to MCU. Use Value: 8 V output UVLO prevents partial gate drive during DC-link capacitor charging; RDY signal enables safe PWM enable sequence after full power-up. |
| On-Board Charger (OBC) | Battery Management System (BMS) Isolation |
Use Scenario: Gate driving interleaved totem-pole PFC switches in a 6.6 kW automotive OBC. IC Role / Device Role / Timing Role: High-frequency half-bridge driver with deglitch filtering to reject EMI from AC line harmonics and transformer ringing. Use Value: 40–600 ns programmable dead time accommodates variable gate charge across temperature, maintaining ZVS across 100–250 kHz operating range. | Use Scenario: Providing isolated gate drive for precharge/disconnect MOSFETs between HV battery pack and inverter DC link. IC Role / Device Role / Timing Role: Fail-safe isolated driver with EN-controlled shutdown and VDD-supply monitoring for functional safety compliance. Use Value: Default-low outputs ensure open-circuit disconnect during BMS fault or 12 V supply brownout; EN pin allows centralized safety shutdown without software intervention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-side/low-side isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SI82394BD4-AS | SOIC-16 wide-body package (10.3 mm × 10.3 mm); identical electrical specs and pinout except NC pin count differs | Requires larger PCB footprint; better creepage for >800 V systems but incompatible with narrow-body land pattern | Select when higher isolation margin or legacy wide-body layout reuse is required |
| UCC5390SCDR | Texas Instruments part with 4 A drive, 8 V UVLO, and 100 kV/µs CMTI; no integrated RDY pin or deglitch; requires external dead-time circuit | Lacks status feedback and noise filtering; needs additional components for functional safety monitoring | Choose only if TI ecosystem alignment outweighs added BOM cost and design complexity |
Compared with SI82394BD4-AS, SI82394BB4-AS1R saves board space in compact OBC modules; versus UCC5390SCDR, it reduces system-level validation effort via integrated RDY, deglitch, and programmable dead time - critical for ASIL-B–compliant automotive power stages.
Availability
SI82394BB4-AS1R is available at Aetrix Electronics and suitable for traction inverters, on-board chargers, and battery management systems requiring stable component supply with automotive-grade traceability and long-term lifecycle support.
Supply support for SI82394BB4-AS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for high-reliability applications.
The Si8239x product line was developed to replace optocoupled gate drivers in automotive and industrial power systems, delivering higher reliability, tighter timing accuracy, and integrated safety features like UVLO feedback and fail-safe startup.
FAQ
What is the isolation voltage rating of the SI82394BB4-AS1R?
The SI82394BB4-AS1R provides 5 kVRMS reinforced insulation per UL 1577 and VDE 0884-10 standards, verified for 1 minute at rated voltage. This isolation barrier supports direct connection to 600 V DC bus systems in automotive traction inverters and meets IEC 62368-1 requirements for reinforced insulation in end equipment.
Does the SI82394BB4-AS1R support both IGBTs and SiC MOSFETs?
Yes, the SI82394BB4-AS1R supports both device types: its 4.0 A peak output current and <30 ns propagation delay enable fast switching of 1200 V SiC MOSFETs with gate charges up to 100 nC, while its 24 V max VDDA/VDDB and robust CMTI make it equally suitable for 650 V/1200 V IGBTs in motor drives and inverters.
How does the RDY pin function in the SI82394BB4-AS1R?
The RDY pin on the SI82394BB4-AS1R is an open-drain status output that transitions high only after the 1 ms safe startup delay completes and both VDDA and VDDB exceed their 8 V UVLO thresholds. This provides hardware-confirmed readiness to the MCU, eliminating software polling and enabling deterministic PWM enable sequencing in ASIL-B systems.
Can the SI82394BB4-AS1R be used with bootstrap gate drive circuits?
No - the SI82394BB4-AS1R is not compatible with bootstrap configurations for VDDA. Its UVLO monitoring and fail-safe logic assume independent, regulated VDDA and VDDB supplies. Using a bootstrap circuit risks violating the independent supply requirement and disabling UVLO feedback; a dedicated isolated DC-DC converter is required for VDDA in high-side applications.
What is the purpose of the deglitch feature in the SI82394BB4-AS1R?
The deglitch feature in the SI82394BB4-AS1R filters sub-50 ns noise transients on the PWM input, preventing false edge detection caused by EMI from nearby power switches or transformer ringing. This eliminates the need for external RC filters or Schmitt-trigger buffers, simplifying layout and improving reliability in high-noise automotive power stages.
SI82394BB4-AS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Number of Channels:
- 2
- Voltage - Isolation:
- 2500Vrms
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 135ns, 95ns
- Pulse Width Distortion (Max):
- 5.6ns
- Rise / Fall Time (Typ):
- 12ns, 12ns (Max)
- Current - Output High, Low:
- 2A, 4A
- Current - Peak Output:
- 4A
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 6.5V ~ 24V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
- Approval Agency:
- CQC, CSA, UL, VDE
SI82394BB4-AS1R FAQ
1.How can I place an order for SI82394BB4-AS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82394BB4-AS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82394BB4-AS1R reliable?
The price and inventory of SI82394BB4-AS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82394BB4-AS1R is usually 5 days.
3.What payment methods are accepted for SI82394BB4-AS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82394BB4-AS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82394BB4-AS1R?
SI82394BB4-AS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82394BB4-AS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82394BB4-AS1R?
For technical support, including SI82394BB4-AS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82394BB4-AS1R requirements.
6.How does Aetrix verify that SI82394BB4-AS1R is sourced from the original manufacturer or authorized distributors?
All SI82394BB4-AS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82394BB4-AS1R meets industry standards.
7.What is the process for return or replacement of SI82394BB4-AS1R?
All SI82394BB4-AS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI82394BB4-AS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82394BB4-AS1R part is unused and in its original packaging.
Return procedure for SI82394BB4-AS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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