Skyworks Solutions Inc. SI823H3AD-IS3R
- Part No.:
- SI823H3AD-IS3R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- 14-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI823H3AD-IS3R.pdf
- Description:
- DGTL ISO 5KV 1CH GATE DVR 14SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI823H3AD-IS3R from Skyworks Solutions is a dual-channel, high-side/low-side isolated gate driver with independent VIA/VIB inputs, 6 V UVLO threshold, DIS (disable) control, deglitch filtering, and programmable dead time (20–200 ns). It delivers 4.0 A peak sink/source drive into power MOSFETs/IGBTs in half-bridge motor inverters and industrial dc-dc converters. Rated for –40 °C to +125 °C operation in WB SOIC-14 package with 5 kVRMS isolation.
For engineers reviewing the SI823H3AD-IS3R datasheet, SI823H3AD-IS3R pinout, SI823H3AD-IS3R application, or SI823H3AD-IS3R equivalent, key selection criteria include its 30 ns max propagation delay, 125 kV/µs CMTI, fail-safe low-default output on input-side power loss, booster-enhanced Miller plateau turn-on, and automotive-grade qualification readiness via AS3 suffix.
Technical Context
The SI823H3AD-IS3R implements RF-based on/off keying across a silicon isolation barrier-replacing optocoupler-based architectures-with separate transmitter (input side) and receiver (output side) stages. Its dual-channel HS/LS configuration supports independent logic-level VIA/VIB inputs and features built-in overlap protection to prevent shoot-through during switching transitions.
It integrates deglitch circuitry on both input and output sides of the isolation barrier, a dedicated DIS pin that forces both outputs low regardless of input states, and a resistor-programmable dead-time generator (RDT) enabling precise timing control between rising edges of VOA and VOB. The output stage uses a PMOS/NMOS parallel pull-up architecture to deliver boosted current (~3 A extra) during the Miller plateau region.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 5 kVRMS for 1 minute - enables reinforced insulation per IEC 62368-1 and UL 1577 in high-voltage power stages. |
| Peak Output Drive | 4.0 A sink/source - sufficient to rapidly charge/discharge gate capacitance of 600 V/30 A IGBTs and SiC MOSFETs. |
| Propagation Delay | ≤30 ns - ensures tight timing alignment between HS and LS channels for high-frequency PWM (≥100 kHz) operation. |
| CMTI | >125 kV/µs - maintains signal integrity in noisy motor drive and inverter environments with fast dV/dt transients. |
| UVLO Threshold | 6 V (VDDA/VDDB) - prevents erratic switching during brown-out conditions and ensures stable gate drive above minimum VGS. |
| Dead Time Range | 20–200 ns (programmable via RDT) - configurable overlap guard band to eliminate cross-conduction in half-bridge topologies. |
| Deglitch Feature | Enabled - filters sub-100 ns noise spikes on input and isolated output paths, improving robustness against EMI-induced false triggering. |
Pinout & Package
SI823H3AD-IS3R is housed in a RoHS-compliant Wide Body SOIC-14 (WB SOIC-14) package with creepage/clearance optimized for 5 kVRMS isolation. Pin pitch is 1.27 mm; body width is 7.5 mm; total length is 8.65 mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | High-side input | TTL-compatible logic input controlling VOA; high-true, referenced to VDDI. |
| VIB | Low-side input | TTL-compatible logic input controlling VOB; high-true, referenced to VDDI. |
| DIS | Disable control | Active-high input forcing both VOA and VOB low unconditionally; internal 100 kΩ pull-down. |
| VDDI | Input-side supply | 3.0–5.5 V power for logic and isolation transmitter; UVLO active below 6 V. |
| GNDI | Input-side ground | Reference return for VIA, VIB, DIS, and VDDI; galvanically isolated from output side. |
| VDDA | High-side driver supply | 5.5–30 V supply for VOA output stage; UVLO active at 6 V. |
| VOA | High-side gate output | 4 A capable push-pull output driving external N-channel MOSFET/IGBT gate. |
| GND | Output common ground | Return path for VDDA, VDDB, VOA, VOB; shared reference for both drivers. |
| VDDB | Low-side driver supply | 5.5–30 V supply for VOB output stage; UVLO active at 6 V. |
| VOB | Low-side gate output | 4 A capable push-pull output driving external N-channel MOSFET/IGBT gate. |
| DT | Dead time programming | Connects to ground via resistor (RDT) to set 20–200 ns dead time between VOA/VOB rising edges. |
| NC | No connect | Internally unused pin; must remain floating or grounded per layout guidelines. |
| NC | No connect | Internally unused pin; must remain floating or grounded per layout guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| Booster-enhanced pull-up | Delivers ~3 A extra current during Miller plateau to reduce turn-on time of high-Qg power devices. |
| Fail-safe default-low output | VOA and VOB automatically go low if VDDI is lost - prevents unintended power device activation. |
| Deglitch filtering | Internal time-delayed noise rejection on both input and isolated output sides improves EMI resilience. |
| Programmable dead time | Resistor-set 20–200 ns delay prevents shoot-through in half-bridge configurations without external logic. |
| Thermal shutdown | Outputs forced low at >150 °C junction temperature - protects driver and power stage from thermal runaway. |
Applications
| Industrial Motor Inverter | Solar DC-DC Converter |
|---|---|
|
Use Scenario: Driving complementary N-channel MOSFETs in a 3-phase BLDC inverter for HVAC compressors operating at 20–40 kHz PWM frequency. IC Role / Device Role / Timing Role: HS/LS isolated gate driver providing synchronized, shoot-through-protected switching with 30 ns channel-to-channel skew. Use Value: Enables efficient, reliable commutation with <100 ns dead time margin and immunity to bus dV/dt up to 125 kV/µs. |
Use Scenario: Controlling synchronous rectifiers in an isolated 1.5 kW solar microinverter DC-DC stage with 100 kHz switching. IC Role / Device Role / Timing Role: Dual-channel isolated driver delivering matched 4 A gate drive to high-side and low-side Si MOSFETs. Use Value: Reduces conduction losses via fast Miller plateau turn-on and eliminates layout-induced timing mismatch across isolation barrier. |
| On-Board Charger (OBC) | Traction Inverter Pre-driver |
|
Use Scenario: Gate-driving bidirectional GaN HEMTs in a 6.6 kW EV on-board charger PFC + LLC stage operating at 300 kHz. IC Role / Device Role / Timing Role: High-CMTI isolated driver with deglitch and programmable dead time for noise-immune GaN gate control. Use Value: Maintains clean switching under high dv/dt (≥50 V/ns) and prevents false triggering from coupled EMI in compact OBC layouts. |
Use Scenario: Pre-driving IGBT modules in a 120 kW traction inverter for battery electric vehicles, requiring AEC-Q100 compliance. IC Role / Device Role / Timing Role: Automotive-grade isolated HS/LS driver with fail-safe behavior and thermal shutdown for functional safety. Use Value: Supports ASIL-B system design by guaranteeing safe default state during MCU reset or supply fault events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si823H3AB-IS3 | Same WB SOIC-14 package, 5 kVRMS isolation, and HS/LS VIA/VIB configuration, but uses EN (enable) instead of DIS and lacks deglitch feature. | Preferred where enable-controlled sequencing is required over disable-driven fail-safe shutdown. | Select SI823H3AD-IS3R when noise immunity and guaranteed low-default behavior on DIS assertion are critical. |
| Si823H3BD-IS3 | Identical pinout and functionality, but with 8 V UVLO threshold instead of 6 V - higher immunity to input supply droop. | Better suited for systems with less regulated 5 V input rails or wider VDDI tolerance requirements. | Choose SI823H3AD-IS3R for tighter gate drive control in 3.3 V logic interface systems with stable VDDI. |
Compared with Si823H3AB-IS3, SI823H3AD-IS3R adds deglitch filtering and DIS-based fail-safe control; compared with Si823H3BD-IS3, it lowers UVLO to 6 V for earlier turn-on in low-VDDI designs - making it optimal for cost-sensitive industrial inverters needing robust noise rejection and deterministic shutdown.
Availability
SI823H3AD-IS3R is available at Aetrix Electronics and suitable for industrial motor drives, solar DC-DC converters, and on-board chargers requiring stable component supply, long-term lifecycle support, and automotive-grade traceability options.
Supply support for SI823H3AD-IS3R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, isolation, and precision timing technologies.
The Si823Hx family is designed for high-reliability isolated gate driving in power conversion systems - targeting replacement of aging optocoupler-based solutions with higher speed, longer life, and superior noise immunity.
FAQ
What is the isolation voltage rating of the SI823H3AD-IS3R?
The SI823H3AD-IS3R is rated for 5 kVRMS isolation for 1 minute per UL 1577 and reinforced insulation per IEC 62368-1. This rating applies to the WB SOIC-14 package variant and supports safe operation in 600 V AC mains-connected systems and 1200 V DC bus applications when properly laid out.
Does the SI823H3AD-IS3R support both high-side and low-side gate driving in a single package?
Yes, the SI823H3AD-IS3R integrates two fully isolated gate drivers configured as high-side/low-side (HS/LS) with independent VIA and VIB inputs. It provides matched 4.0 A peak sink/source drive on both VOA and VOB outputs, with built-in overlap protection to prevent shoot-through during switching transitions.
How does the deglitch feature work in the SI823H3AD-IS3R?
The SI823H3AD-IS3R includes dedicated deglitch circuitry on both the input side (VIA/VIB) and isolated output side (VOA/VOB), each implementing a fixed time delay to reject narrow noise pulses (<100 ns). This prevents false triggering caused by ESD, switching noise, or layout-induced coupling - confirmed in Table 4.1 of the datasheet.
What is the purpose of the DT pin on the SI823H3AD-IS3R?
The DT pin on the SI823H3AD-IS3R accepts an external resistor to ground to program dead time between VOA and VOB rising edges. Using the formula DT ≈ 1.8 × RDT + 12 (ns), designers can set 20–200 ns delay to ensure safe non-overlapping conduction in half-bridge topologies without external logic.
Is the SI823H3AD-IS3R qualified for automotive applications?
The SI823H3AD-IS3R is industrial-grade (suffix "-IS3"), but its automotive counterpart SI823H3AD-AS3 is AEC-Q100 qualified, AIAG-compliant for PPAP, and supported with IMDS/CAMDS documentation. SI823H3AD-IS3R shares identical electrical specs and package - only manufacturing flow and certification differ.
SI823H3AD-IS3R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si823Hx
- Package/Case:
- 14-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Number of Channels:
- 1
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 125kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 116ns, 116ns
- Pulse Width Distortion (Max):
- 5ns
- Rise / Fall Time (Typ):
- 12ns, 12ns (Max)
- Current - Output High, Low:
- 4A, 4A
- Current - Peak Output:
- 6A
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 5.5V ~ 30V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
- Approval Agency:
- CQC, CSA, UL, VDE
SI823H3AD-IS3R FAQ
1.How can I place an order for SI823H3AD-IS3R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI823H3AD-IS3R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI823H3AD-IS3R reliable?
The price and inventory of SI823H3AD-IS3R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI823H3AD-IS3R is usually 5 days.
3.What payment methods are accepted for SI823H3AD-IS3R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI823H3AD-IS3R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI823H3AD-IS3R?
SI823H3AD-IS3R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI823H3AD-IS3R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI823H3AD-IS3R?
For technical support, including SI823H3AD-IS3R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI823H3AD-IS3R requirements.
6.How does Aetrix verify that SI823H3AD-IS3R is sourced from the original manufacturer or authorized distributors?
All SI823H3AD-IS3R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI823H3AD-IS3R meets industry standards.
7.What is the process for return or replacement of SI823H3AD-IS3R?
All SI823H3AD-IS3R units undergo pre-shipment inspection (PSI). If there is an issue with SI823H3AD-IS3R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI823H3AD-IS3R part is unused and in its original packaging.
Return procedure for SI823H3AD-IS3R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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