Skyworks Solutions Inc. SI823H5CD-IS3

Overview

SI823H5CD-IS3 from Skyworks is a dual-channel isolated gate driver with independent input control (VIA/VIB), 12 V output undervoltage lockout (UVLO), enable (EN) logic, and 5 kVRMS reinforced isolation in a WB SOIC-14 package. It delivers 4.0 A peak sink/source drive for power MOSFETs/IGBTs in high-reliability industrial motor drives and isolated DC-DC converters.

For engineers reviewing the SI823H5CD-IS3 datasheet, SI823H5CD-IS3 pinout, SI823H5CD-IS3 application, or SI823H5CD-IS3 equivalent, this page provides verified functional identity, confirmed WB SOIC-14 pin mapping, UVLO threshold (12 V), EN-controlled fail-safe behavior, and validated alternatives for dual-channel isolated gate driving where input-side power loss must force outputs low.

Technical Context

The SI823H5CD-IS3 implements RF-based on/off keying across a silicon isolation barrier, enabling robust noise immunity without startup initialization. Its dual-channel architecture supports independent TTL-compatible inputs (VIA/VIB) with no overlap protection-unlike HS/LS variants-and features fail-safe default-low outputs when input-side VDDI is lost.

Each channel includes dedicated undervoltage lockout monitoring (12 V UVLO+), thermal shutdown (>150 °C), and a booster-enabled pull-up stage delivering up to 4 A peak current during Miller plateau crossing. The EN pin asserts unconditional low-state output within tSD (≤100 ns) and resumes operation within tRESTART (≤1 µs) after reassertion.

Key Specifications

Pinout & Package

SI823H5CD-IS3 uses the Wide Body SOIC-14 (WB SOIC-14) package with 5.3 mm minimum creepage and clearance, supporting 5 kVRMS reinforced isolation per IEC 62368-1. Pin numbering follows standard SOIC convention (pin 1 = top-left corner, counterclockwise).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel isolated gate driver applications.

Compared with SI823H5CD-IS3, Si823H5AB-IS3 offers lower UVLO for marginal 5 V rails but lacks 12 V margin for 12 V gate supplies, while Si823H5BD-IS3 shifts control logic to active-high disable-requiring layout revision but enabling direct integration with hardware fault latches.

Availability

SI823H5CD-IS3 is available at Aetrix Electronics and suitable for industrial motor control, solar inverter half-bridge, isolated DC-DC converter, and industrial PLC output module applications requiring stable component supply, long-term lifecycle support, and automotive-grade traceability options.

Supply support for SI823H5CD-IS3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.

The Si823Hx family was designed specifically for high-reliability isolated gate driving in industrial and automotive power systems, replacing optocouplers with silicon-isolated drivers offering superior CMTI, lifetime stability, and temperature-invariant timing.

FAQ

What is the UVLO threshold for SI823H5CD-IS3, and how does it affect gate drive reliability?

The SI823H5CD-IS3 has a 12 V typical UVLO threshold on both VDDA and VDDB rails. This ensures gate drive remains disabled until output supply reaches a level sufficient to fully enhance 12 V-gated IGBTs or SiC MOSFETs-preventing partial turn-on, excessive conduction loss, or thermal stress during brown-out conditions. The SI823H5CD-IS3 UVLO hysteresis prevents oscillation near threshold, enhancing system robustness in noisy industrial environments.

Does SI823H5CD-IS3 support programmable dead time, and if not, what is its channel-to-channel timing relationship?

No, SI823H5CD-IS3 does not support programmable dead time-it is a dual independent-channel driver, not an HS/LS or PWM variant. Its channel-to-channel propagation delay matching is ≤5 ns (max), enabling tightly synchronized switching of two separate power devices. For dead-time-controlled half-bridge operation, SI823H1CD-IS3 or SI823H4CD-IS3 would be required instead of SI823H5CD-IS3.

How does the EN pin on SI823H5CD-IS3 behave during input-side power loss?

The EN pin on SI823H5CD-IS3 is only active when VDDI is powered above its UVLO threshold (~3.0 V). If VDDI drops below UVLO, the SI823H5CD-IS3 automatically forces both VOA and VOB low regardless of EN state-this fail-safe behavior is inherent to the architecture. EN assertion is therefore redundant during input power loss, but critical for controlled shutdown during normal operation.

Can SI823H5CD-IS3 drive SiC MOSFETs, and what design considerations apply?

Yes, SI823H5CD-IS3 can drive SiC MOSFETs: its 4 A peak source/sink current, 30 ns max propagation delay, and >125 kV/µs CMTI meet key requirements for 100+ kHz SiC switching. Designers must ensure VDDA/VDDB ≥15 V to fully enhance common SiC devices, verify gate resistor values to limit dV/dt-induced ringing, and use the booster feature to minimize Miller plateau time-directly reducing switching losses in the SI823H5CD-IS3 application.

What isolation certifications does SI823H5CD-IS3 hold, and which standards does it satisfy?

SI823H5CD-IS3 is UL 1577 recognized (5000 VRMS, 1 min), VDE-certified, and compliant with IEC 62368-1 and EN 62368-1 for reinforced insulation. It also meets CSA and CQC requirements, with full documentation supporting industrial safety approvals. These certifications validate its 5 kVRMS isolation barrier for use in mains-connected equipment, including Class I and Class II power supplies and motor drives requiring reinforced insulation per IEC 61800-5-1.