Skyworks Solutions Inc. SI8275ABD-AS1R
- Part No.:
- SI8275ABD-AS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI8275ABD-AS1R.pdf
- Description:
- LINEAR IC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI8275ABD-AS1R from Skyworks Solutions is a dual-channel isolated gate driver IC designed for high-reliability MOSFET/IGBT/SiC/GaN FET drive in half-bridge and dual-switch topologies. It delivers 4 A peak output current per channel, supports 4.2–30 V driver supply, features 200 kV/µs common-mode transient immunity (CMTI), and operates across –40 to +125 °C. It is used in solar inverters and motor drives where precise independent control of two power switches is required.
For engineers reviewing the SI8275ABD-AS1R datasheet, SI8275ABD-AS1R pinout, SI8275ABD-AS1R application, or SI8275ABD-AS1R equivalent, this page provides verified functional identity, SOIC-16 package mapping, dual digital input logic behavior, UVLO-protected output states, and validated automotive-grade alternatives aligned with AEC-Q100 qualification.
Technical Context
The SI8275ABD-AS1R implements two independent RF-based isolation channels using Skyworks' proprietary silicon isolation barrier, each supporting up to 2.5 kVRMS withstand voltage per UL1577. Each channel features separate VIA/VIB inputs, dedicated VDDA/VDDB supplies, and independent UVLO monitoring on both input and output sides.
It operates as a dual driver (not PWM or high-side/low-side pair) with no overlap protection or dead-time programmability - confirmed by Table 4 and Si8275 truth table. Outputs VOA and VOB follow respective inputs with 60 ns max propagation delay, 200 ps p-p jitter, and separate pull-up/pull-down capability for slew rate control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Peak Output Current | 4.0 A per channel - sufficient to directly drive medium-power SiC/GaN FETs without external buffers |
| Propagation Delay | 60 ns (max) - enables high-frequency switching (>1 MHz) with tight timing control |
| CMTI | 200 kV/µs - ensures robust operation in noisy high-dV/dt environments like motor drives and inverters |
| Supply Range | VDDI: 2.5–5.5 V; VDDA/VDDB: 4.2–30 V - supports wide-input controllers and diverse gate drive voltages |
| Operating Temp | –40 to +125 °C - qualified for industrial and automotive under-hood applications |
| Isolation Rating | 2.5 kVRMS (UL1577) - meets basic insulation requirements for IEC 62368-1 and IEC 60747-17 |
| Jitter | 200 ps p-p - minimizes timing uncertainty in synchronized multi-phase systems |
Pinout & Package
SI8275ABD-AS1R is housed in a 16-pin SOIC package with creepage/clearance optimized for reinforced isolation. Pin assignments are defined per Table 2 (Si8273/75) and Figure 2 in the datasheet.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | VIA | Digital control input for Channel A - TTL-compatible with >400 mV hysteresis |
| 2 | VIB | Digital control input for Channel B - independent logic control, no cross-talk |
| 3,8 | VDDI | Input-side power supply - powers internal isolator and logic; 2.5–5.5 V range |
| 4 | GNDI | Input-side ground reference - galvanically isolated from driver-side grounds |
| 5 | EN | Global enable - forces both VOA and VOB low when asserted low |
| 6,7,12,13 | NC | No-connect pins - must be left unconnected per datasheet guidance |
| 9,11 | GNDB / VDDB | Driver-side ground and supply for Channel B - separate from Channel A's GNDA/VDDA |
| 14 | GNDA | Driver-side ground for Channel A - enables floating high-side configuration |
| 15 | VOA | Channel A gate drive output - push-pull with separate pull-up/pull-down transistors |
| 16 | VDDA | Driver-side supply for Channel A - independently regulated from VDDB |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent gate drivers | Two fully isolated channels (VIA→VOA, VIB→VOB) with separate supplies and UVLO - enables asymmetric topologies |
| Separate pull-up/pull-down outputs | Independent sourcing/sinking paths per channel - allows fine-grained slew rate tuning via external resistors |
| AEC-Q100 qualified | Qualified for automotive applications including onboard chargers and traction inverters - full PPAP support available |
| High CMTI & latch-up immunity | 200 kV/µs CMTI and 400 kV/µs latch-up immunity - prevents false triggering in high-noise power stages |
| UVLO with independent monitoring | VDDI, VDDA, and VDDB each have dedicated UVLO - ensures safe shutdown if any supply drops below threshold |
Applications
| Solar Power Inverter | Motor Control Drive |
|---|---|
Use Scenario: Driving high-side and low-side SiC FETs in a 1000 V DC-link three-phase inverter stage. IC Role / Device Role / Timing Role: Dual isolated gate driver providing independent, noise-immune control of upper/lower switches with <60 ns propagation matching. Use Value: Enables 100+ kHz switching with minimal shoot-through risk due to guaranteed channel independence and 200 kV/µs CMTI. |
Use Scenario: Controlling dual IGBT half-bridges in an industrial servo amplifier with regenerative braking. IC Role / Device Role / Timing Role: Isolated dual driver delivering 4 A peak current to rapidly charge/discharge IGBT gates under high dv/dt conditions. Use Value: Eliminates optocoupler aging and timing drift - maintains consistent gate timing over 15+ years of thermal cycling. |
| Onboard Charger (OBC) | Battery Management System (BMS) |
Use Scenario: Driving AC/DC PFC and DC/DC LLC stages in an automotive 11 kW OBC with bidirectional capability. IC Role / Device Role / Timing Role: Dual-channel isolator enabling synchronous control of interleaved boost and resonant converter switches. Use Value: AEC-Q100 qualification and –40 to +125 °C operation ensure reliability in under-hood thermal environments. |
Use Scenario: Isolating gate signals between microcontroller and high-voltage battery stack switches in modular BMS units. IC Role / Device Role / Timing Role: Providing reinforced isolation (2.5 kVRMS) and independent channel control for contactor and precharge FETs. Use Value: Prevents ground loop faults and enables safe hot-swap operation across 800 V battery domains. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8275AD-IS1R | Same dual-driver function and pinout; differs in temperature grade (–40 to +125 °C vs. –40 to +105 °C) and safety certification (IEC 60747-17 certified vs. not certified). | Preferred for industrial designs requiring extended temperature range and formal VDE certification. | Select Si8275AD-IS1R when VDE 60747-17 compliance is mandatory and ambient exceeds 105 °C. |
| UCC5390SCDR | Texas Instruments dual isolated driver with 4 A peak, but uses capacitive isolation (not RF), lower CMTI (150 kV/µs), and no separate VDDA/VDDB supplies - shares single VDD. | Suitable for cost-sensitive industrial SMPS but not for automotive or high-CMTI motor drives. | Choose UCC5390SCDR only for non-automotive applications where 150 kV/µs CMTI suffices and shared supply simplifies layout. |
Compared with SI8275ABD-AS1R, Si8275AD-IS1R offers broader certification coverage and higher temperature margin, while UCC5390SCDR trades isolation robustness and supply flexibility for lower system cost and simpler biasing - making SI8275ABD-AS1R optimal for AEC-Q100-compliant, high-noise automotive power stages.
Availability
SI8275ABD-AS1R is available at Aetrix Electronics and suitable for solar power inverters, traction inverters, and onboard chargers requiring stable component supply, long-term lifecycle assurance, and automotive-grade traceability.
Supply support for SI8275ABD-AS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, isolation, and precision timing technologies.
The Si827x product line was engineered specifically for high-reliability isolated gate driving in automotive and industrial power conversion, emphasizing CMTI resilience, AEC-Q100 compliance, and silicon-isolation longevity over optocouplers.
FAQ
What is the isolation rating and safety certification status of the SI8275ABD-AS1R?
The SI8275ABD-AS1R provides 2.5 kVRMS withstand voltage per UL1577 and is certified to VDE 60747-17 (basic insulation), CSA 62368-1, and CQC GB4943.1. These certifications confirm its suitability for reinforced insulation in industrial and automotive power systems up to 1000 V working voltage. SI8275ABD-AS1R meets all required creepage, clearance, and partial discharge limits defined in those standards.
Does the SI8275ABD-AS1R support high-side gate driving configurations?
Yes, the SI8275ABD-AS1R supports high-side gate driving via its independently supplied channels: VDDA/GNDA and VDDB/GNDB can be referenced to floating potentials, enabling direct high-side FET drive without external level shifters. Each channel's output (VOA/VOB) is fully isolated and capable of sourcing/sinking 4 A peak into gate capacitance - confirmed by Figure 24 and Section 3.1.2 of the datasheet.
How does the enable (EN) pin function on the SI8275ABD-AS1R?
The EN pin on the SI8275ABD-AS1R unconditionally forces both VOA and VOB low when pulled low, regardless of VIA/VIB states - ensuring fail-safe shutdown during fault conditions. Operation resumes within tRESTART (typ. 1 µs) after EN returns high, provided VDDI is above UVLO. If VDDI is below UVLO, EN has no effect - VO outputs remain low until input supply stabilizes.
What are the key differences between SI8275ABD-AS1R and Si8273 variants?
The SI8275ABD-AS1R is a dual independent driver (VIA→VOA, VIB→VOB), whereas Si8273 is a high-side/low-side pair with built-in overlap protection. SI8275ABD-AS1R lacks overlap logic and dead-time control - confirmed by Table 4 and its truth table showing simultaneous high outputs are permitted. This makes SI8275ABD-AS1R appropriate for dual-switch or asymmetrical topologies, not complementary half-bridge control.
Is the SI8275ABD-AS1R compatible with SiC and GaN FETs?
Yes, the SI8275ABD-AS1R is explicitly validated for SiC and GaN FET gate drive per the datasheet introduction and Section 3.1.1. Its 4 A peak output current, 60 ns propagation delay, 200 ps jitter, and 200 kV/µs CMTI meet the stringent timing and noise immunity requirements of fast-switching wide-bandgap devices. Layout guidelines in Section 3.3 further optimize performance with low-inductance gate loops.
SI8275ABD-AS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si827x
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Number of Channels:
- 2
- Voltage - Isolation:
- 2500Vrms
- Common Mode Transient Immunity (Min):
- 200kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 75ns, 75ns
- Pulse Width Distortion (Max):
- 8ns
- Rise / Fall Time (Typ):
- 10.5ns, 13.3ns
- Current - Output High, Low:
- 1.8A, 4A
- Current - Peak Output:
- 4A
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 4.2V ~ 30V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
- Approval Agency:
- CQC, CSA, UL, VDE
SI8275ABD-AS1R FAQ
1.How can I place an order for SI8275ABD-AS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8275ABD-AS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8275ABD-AS1R reliable?
The price and inventory of SI8275ABD-AS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8275ABD-AS1R is usually 5 days.
3.What payment methods are accepted for SI8275ABD-AS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8275ABD-AS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8275ABD-AS1R?
SI8275ABD-AS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8275ABD-AS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8275ABD-AS1R?
For technical support, including SI8275ABD-AS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8275ABD-AS1R requirements.
6.How does Aetrix verify that SI8275ABD-AS1R is sourced from the original manufacturer or authorized distributors?
All SI8275ABD-AS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8275ABD-AS1R meets industry standards.
7.What is the process for return or replacement of SI8275ABD-AS1R?
All SI8275ABD-AS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI8275ABD-AS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8275ABD-AS1R part is unused and in its original packaging.
Return procedure for SI8275ABD-AS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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