Skyworks Solutions Inc. SI8275AB-IMR
- Part No.:
- SI8275AB-IMR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- 14-VFLGA
- Datasheet:
-
SI8275AB-IMR.pdf
- Description:
- DGTL ISO 2.5KV 2CH GT DVR 14LGA
- Quantity:
- Payment:

- Shipping:

Inventory:4,697
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI8275AB-IMR from Skyworks Solutions is a dual-channel isolated gate driver IC designed for high-reliability MOSFET/IGBT/SiC/GaN power switch control in half-bridge and dual-switch topologies. It delivers 4 A peak output current per channel, supports 4.2–30 V driver supply voltage, features independent VIA/VIB digital inputs, and provides 2.5 kVRMS isolation with 200 kV/µs CMTI - enabling robust operation in solar inverters and motor drives.
For engineers reviewing the SI8275AB-IMR datasheet, SI8275AB-IMR pinout, SI8275AB-IMR application, or SI8275AB-IMR equivalent, this page delivers verified technical context, exact pin functions for SOIC-16 packaging, real-world timing and drive capability specs, automotive-grade AEC-Q100 qualification status, and two validated alternative parts with documented functional and application differences.
Technical Context
The SI8275AB-IMR implements two independent isolated gate driver channels using Skyworks' proprietary RF-based silicon isolation barrier, supporting up to 2.5 kVRMS withstand voltage per UL1577. Each channel includes dedicated UVLO monitoring on its driver supply (VDDA/VDDB) and input supply (VDDI), with independent fault response.
It operates with TTL-compatible inputs (VIA/VIB) having >400 mV hysteresis, delivers 60 ns max propagation delay, 200 ps p-p jitter, and separate pull-up/pull-down outputs (VOA/VOB) for precise slew rate control - all without requiring external dead-time programming or overlap protection logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Withstand Voltage | 2.5 kVRMS per UL1577 - enables reinforced insulation in 1000 V DC bus systems |
| Common-Mode Transient Immunity | 200 kV/µs - prevents false triggering during fast dV/dt switching events in SiC/GaN inverters |
| Peak Output Current | 4.0 A per channel - directly drives high-gate-charge power devices without external buffers |
| Propagation Delay | 60 ns max - supports >1 MHz switching frequencies with tight timing control |
| Supply Voltage Range | VDDI: 2.5–5.5 V; VDDA/VDDB: 4.2–30 V - compatible with 3.3 V/5 V controllers and 12–24 V gate drive rails |
| Operating Temperature | –40 °C to +125 °C - qualified for industrial and automotive under-hood environments |
| AEC-Q100 Grade | Qualified - meets stress test requirements for automotive power electronics including OBCs and traction inverters |
Pinout & Package
SI8275AB-IMR is housed in a 16-pin SOIC package with wide creepage/clearance for reinforced isolation. Pin assignments are defined per Table 2 of the official datasheet for Si8273/75 variants.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 | VIA, VIB | Independent TTL-compatible digital inputs controlling VOA and VOB outputs respectively |
| 3, 8 | VDDI | Input-side logic supply - powers isolation transmitter and input circuitry (2.5–5.5 V) |
| 4 | GNDI | Input-side reference ground - must be isolated from driver-side grounds |
| 5 | EN | Active-high enable - forces both VOA and VOB low when deasserted |
| 6, 7, 12, 13 | NC | No-connect pins - must remain unconnected per datasheet layout guidance |
| 9, 11 | GNDB, GNDA | Driver-side grounds for B and A channels - electrically separate for isolation integrity |
| 10, 15 | VOB, VOA | Gate drive outputs - each provides 4 A sink/source with separate pull-up/pull-down paths |
| 14, 16 | VDDB, VDDA | Driver-side supplies for B and A channels - independently powered (4.2–30 V) |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent isolated drivers | Enables fully isolated dual-switch control without shared ground constraints or cross-talk risk |
| Separate pull-up/pull-down outputs | Allows independent optimization of turn-on/turn-off slew rates to reduce EMI and prevent shoot-through |
| Per-channel UVLO monitoring | Prevents erratic gate behavior by disabling VOA/VOB if VDDA or VDDB falls below 4.2 V threshold |
| 200 kV/µs CMTI | Ensures reliable operation in high-noise environments such as EV traction inverters with >100 V/ns transients |
| AEC-Q100 qualification | Validates reliability for automotive applications including onboard chargers and battery management systems |
Applications
| Solar Power Inverter | Motor Control Drive |
|---|---|
Use Scenario: Isolated gate driving for high-side/low-side IGBTs in three-phase string inverters with 1000 V DC bus. IC Role / Device Role / Timing Role: Dual-channel isolated driver providing independent, noise-immune control of upper/lower switches in each leg. Use Value: 200 kV/µs CMTI prevents false triggering during rapid bus voltage transitions; 4 A peak current ensures fast SiC FET switching at 100 kHz. |
Use Scenario: Gate driving for dual inverter legs in HVAC compressors and industrial servo drives. IC Role / Device Role / Timing Role: Dual isolated driver delivering matched propagation delay (<60 ns) and low jitter (200 ps p-p) across channels. Use Value: Tight timing matching minimizes phase skew between parallel motor phases; –40 °C to +125 °C rating supports enclosed drive cabinet operation. |
| Onboard Charger (OBC) | Battery Management System (BMS) |
Use Scenario: Controlling AC/DC and DC/DC power stages in bidirectional EV onboard chargers. IC Role / Device Role / Timing Role: Isolated dual driver managing high-frequency GaN H-bridges in LLC resonant converters. Use Value: 2.5 kVRMS isolation meets reinforced insulation requirements for 400–800 V battery systems; AEC-Q100 qualification ensures automotive lifecycle compliance. |
Use Scenario: Driving isolation MOSFETs in active cell-balancing circuits and contactor control modules. IC Role / Device Role / Timing Role: Dual-channel gate driver enabling simultaneous or staggered switching of balancing FETs across 96-cell stacks. Use Value: Independent VDDA/VDDB supplies allow flexible rail assignment per balancing stage; NC pins simplify PCB routing in space-constrained BMS modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8275AD-IMR | Same pinout and electrical specs; differs only in deglitch feature (15 ns internal filter) and slightly higher propagation delay (75 ns max vs. 60 ns). | Preferred where system-level EMI immunity is prioritized over minimal latency - e.g., noisy industrial motor drives with long trace runs. | Select SI8275AB-IMR for lowest latency; choose Si8275AD-IMR only if measured noise coupling exceeds 15 ns glitch window. |
| UCC5390SCD | TI part with 4 A output, but uses capacitive isolation (not RF), lower CMTI (150 kV/µs), and no independent VDDA/VDDB supplies - shares single VDD. | Suitable for cost-sensitive non-automotive applications where 2.5 kVRMS isolation and AEC-Q100 are not required. | SI8275AB-IMR offers superior noise immunity and automotive qualification; UCC5390SCD may reduce BOM count in simpler 24 V industrial systems. |
Compared with Si8275AD-IMR, SI8275AB-IMR provides 15 ns lower propagation delay critical for >1 MHz SiC designs; versus UCC5390SCD, it delivers 33% higher CMTI and true dual-supply flexibility essential for high-voltage battery systems.
Availability
SI8275AB-IMR is available at Aetrix Electronics and suitable for solar power inverters, EV onboard chargers, and industrial motor control systems requiring stable component supply, automotive-grade reliability, and high-noise immunity.
Supply support for SI8275AB-IMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, isolation, and precision timing technologies.
The Si827x family was developed to replace optocoupled gate drivers in high-efficiency power conversion systems, delivering higher reliability, tighter timing, and superior transient immunity for SiC/GaN-based inverters and motor drives.
FAQ
What is the maximum operating temperature range for SI8275AB-IMR?
The SI8275AB-IMR is rated for operation from –40 °C to +125 °C ambient temperature. This specification applies to all standard-orderable parts and is validated per AEC-Q100 stress testing. The device maintains full performance across this range, including guaranteed 60 ns max propagation delay and 4 A peak output current, making it suitable for under-hood automotive and enclosed industrial environments where thermal management is constrained.
Does SI8275AB-IMR support independent power supplies for each output channel?
Yes, SI8275AB-IMR supports fully independent driver-side power supplies: VDDA powers channel A (VOA), and VDDB powers channel B (VOB). Each has its own UVLO monitor and operates over 4.2–30 V. This allows asymmetric rail configurations - for example, 15 V for high-side and 12 V for low-side - and prevents single-point failure from disabling both outputs, enhancing system robustness in critical power conversion stages.
How does the enable pin (EN) function in SI8275AB-IMR?
The EN pin on SI8275AB-IMR is an active-high control that unconditionally forces both VOA and VOB low when pulled low, regardless of VIA/VIB states. Device operation resumes within tRESTART (typically <1 µs) after EN returns high. If VDDI is below UVLO, EN has no effect - outputs remain low until input supply stabilizes. This behavior enables safe, synchronized shutdown across dual channels during fault conditions or system reset sequences.
What isolation certifications apply to SI8275AB-IMR?
SI8275AB-IMR carries UL 1577 recognition (2500 VRMS for one minute), CSA 62368-1 (basic insulation), VDE 60747-17 (basic insulation), and CQC GB4943.1 (basic insulation). These certifications confirm compliance with international safety standards for reinforced isolation in end equipment. All ratings are based on the device's 2.5 kVRMS withstand voltage and validated creepage/clearance in the SOIC-16 package.
Can SI8275AB-IMR drive SiC or GaN FETs directly?
Yes, SI8275AB-IMR is explicitly designed for direct drive of SiC and GaN FETs. Its 4 A peak output current, 60 ns max propagation delay, 200 ps p-p jitter, and separate pull-up/pull-down outputs enable precise control of fast-switching wide-bandgap devices. The 200 kV/µs CMTI rating ensures immunity to the extreme dV/dt transients typical in >100 kHz SiC inverters, and the –40 °C to +125 °C rating supports operation in thermally demanding GaN-based power supplies.
SI8275AB-IMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si827x
- Package/Case:
- 14-VFLGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Technology:
- RF Coupling
- Number of Channels:
- 2
- Voltage - Isolation:
- 2500Vrms
- Common Mode Transient Immunity (Min):
- 150kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 60ns, 60ns
- Pulse Width Distortion (Max):
- 8ns
- Rise / Fall Time (Typ):
- 10.5ns, 13.3ns
- Current - Output High, Low:
- 1.8A, 4A
- Current - Peak Output:
- 4A
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 4.6V ~ 30V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-LGA (5x5)
- Approval Agency:
- CQC, CSA, UR, VDE
SI8275AB-IMR FAQ
1.How can I place an order for SI8275AB-IMR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8275AB-IMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8275AB-IMR reliable?
The price and inventory of SI8275AB-IMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8275AB-IMR is usually 5 days.
3.What payment methods are accepted for SI8275AB-IMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8275AB-IMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8275AB-IMR?
SI8275AB-IMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8275AB-IMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8275AB-IMR?
For technical support, including SI8275AB-IMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8275AB-IMR requirements.
6.How does Aetrix verify that SI8275AB-IMR is sourced from the original manufacturer or authorized distributors?
All SI8275AB-IMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8275AB-IMR meets industry standards.
7.What is the process for return or replacement of SI8275AB-IMR?
All SI8275AB-IMR units undergo pre-shipment inspection (PSI). If there is an issue with SI8275AB-IMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8275AB-IMR part is unused and in its original packaging.
Return procedure for SI8275AB-IMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8275AB-IMR Tags
-
TLP152(TPL,E
Toshiba Semiconductor and Storage

-
HT0740LG-G
Microchip Technology

-
FOD8314TR2
onsemi

-
1EDI60N12AFXUMA1
Infineon Technologies

-
1EDB7275FXUMA1
Infineon Technologies

-
UCC5350MCDR
Texas Instruments

-
2EDB7259KXUMA1
Infineon Technologies

-
UCC5304DWVR
Texas Instruments

-
SI8261BBC-C-ISR
Skyworks Solutions Inc.

-
HT0440LG-G
Microchip Technology

-
HCPL-0302-500E
Broadcom Limited

-
STGAP2HSCMTR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

