Skyworks Solutions Inc. SI8275BB-AS1
- Part No.:
- SI8275BB-AS1
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI8275BB-AS1.pdf
- Description:
- DGTL ISO 2.5KV 2CH GT DVR 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,733
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI8275BB-AS1 from Skyworks Solutions is a dual-channel isolated gate driver IC designed for high-reliability MOSFET/IGBT/SiC/GaN FET drive in half-bridge and dual-switch topologies. It delivers 4 A peak output current per channel, supports 2.5 kVRMS isolation (UL1577), achieves ≤60 ns propagation delay, and operates across –40 to +125 °C with input supply range of 2.5–5.5 V and driver supply range of 4.2–30 V.
For engineers reviewing the SI8275BB-AS1 datasheet, SI8275BB-AS1 pinout, SI8275BB-AS1 application, or SI8275BB-AS1 equivalent, this page provides verified functional identity, SOIC-16 package mapping, dual independent digital input behavior (VIA/VIB), UVLO-protected outputs, and real-world timing and isolation specs - all confirmed from Skyworks' official Si827x family documentation.
Technical Context
The SI8275BB-AS1 implements two independent RF-based isolation channels using Skyworks' proprietary silicon isolation barrier, each supporting up to 2.5 kVRMS withstand voltage and 200 kV/µs common-mode transient immunity (CMTI). Unlike optocouplers, it requires no startup initialization and features separate pull-up/pull-down outputs for precise slew rate control.
It operates with TTL-compatible inputs (>400 mV hysteresis), includes dedicated EN pin for global shutdown, and maintains output low-state during input-side undervoltage lockout (UVLO). Each channel has independent UVLO monitoring on its driver supply (VDDA/VDDB), enabling robust operation in asymmetric power rail configurations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Withstand Voltage | 2.5 kVRMS per UL1577 - enables reinforced insulation in industrial and automotive inverters |
| Peak Output Current | 4 A per channel - drives high-gate-charge SiC/GaN FETs without external buffers |
| Propagation Delay | ≤60 ns max - supports >1 MHz switching frequencies with tight timing control |
| CMTI | 200 kV/µs - prevents false triggering in noisy motor drive and solar inverter environments |
| Supply Ranges | Input: 2.5–5.5 V; Driver: 4.2–30 V - accommodates wide-range controllers and diverse gate drive rails |
| Operating Temperature | –40 to +125 °C - qualified for under-hood automotive and industrial ambient conditions |
| Output RDS(on) | ROH = 2.7 Ω, ROL = 1.0 Ω - ensures low conduction loss and fast turn-on/turn-off |
Pinout & Package
SI8275BB-AS1 is housed in a 16-pin SOIC package with creepage/clearance compliant for reinforced isolation. Pin assignments are validated per Skyworks' Si8273/75 pinout specification (Table 2, Figure 2).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | VIA | Digital control input for Channel A - TTL-compatible, >400 mV hysteresis, drives VOA high when asserted |
| 2 | VIB | Digital control input for Channel B - independent of VIA; enables dual-switch or complementary half-bridge control |
| 3,8 | VDDI | Input-side power supply - powers logic and isolation transmitter; 2.5–5.5 V range |
| 4 | GNDI | Input-side ground reference - forms isolation barrier boundary with GNDx pins |
| 5 | EN | Global enable - forces both VOA and VOB low when pulled low; active-high logic |
| 6,7,12,13 | NC | No-connect - must be left floating or tied to GNDI per layout guidelines; not internally bonded |
| 9,11 | GNDB / VDDB | Driver-side ground and supply for Channel B - electrically isolated from GNDI and GNDA |
| 10 | VOB | Channel B gate drive output - push-pull structure with separate pull-up/pull-down paths |
| 14 | GNDA | Driver-side ground for Channel A - isolated from GNDB; allows split or floating gate drive rails |
| 15 | VOA | Channel A gate drive output - independently controlled; supports high-side or low-side configuration |
| 16 | VDDA | Driver-side supply for Channel A - 4.2–30 V; monitored by independent UVLO circuit |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent gate drivers | Two fully isolated 4 A output channels (VOA/VOB) with separate VDDA/VDDB and GNDA/GNDB supplies |
| High-noise immunity architecture | RF-based isolation with 200 kV/µs CMTI and 400 kV/µs latch-up immunity - eliminates false triggering in EMI-heavy systems |
| Separate pull-up/pull-down outputs | Enables independent optimization of rise/fall times via external RC networks - critical for EMI reduction and shoot-through prevention |
| Independent UVLO per channel | VDDA and VDDB each have dedicated UVLO thresholds - ensures safe shutdown even if one driver rail fails |
| AEC-Q100 qualified | Qualified for automotive applications including onboard chargers and traction inverters - full PPAP and IMDS support available |
Applications
| Motor Control Systems | Solar Power Inverters |
|---|---|
|
Use Scenario: Driving high-voltage IGBTs in 3-phase PMSM servo drives with >10 kHz PWM frequency and >600 V DC bus. IC Role / Device Role / Timing Role: Dual isolated gate driver providing independent, jitter-free (200 ps p-p) control of upper/lower switches in each leg. Use Value: 60 ns max propagation delay and 200 kV/µs CMTI prevent timing skew and false turn-on during rapid bus transients. |
Use Scenario: Controlling SiC MOSFETs in string-level MPPT inverters operating at 1000 V DC input and 50–100 kHz switching. IC Role / Device Role / Timing Role: Isolated dual driver delivering 4 A peak current to minimize gate charge time and conduction losses. Use Value: 2.5 kVRMS isolation and –40 to +125 °C rating ensure reliability in outdoor, thermally cycling environments. |
| Onboard EV Chargers | Industrial UPS Systems |
|
Use Scenario: Bidirectional AC/DC conversion in 11 kW OBCs using GaN HEMTs with fast dV/dt edges. IC Role / Device Role / Timing Role: Dual-channel isolator enabling synchronous rectification and active clamp control with tight dead-time coordination. Use Value: Independent VDDA/VDDB supplies allow asymmetric rail design (e.g., 12 V for low-side, 18 V for high-side), improving efficiency. |
Use Scenario: Driving IGBT modules in 400 V/3-phase UPS inverters requiring fault-tolerant gate drive during grid disturbances. IC Role / Device Role / Timing Role: Robust isolated driver with UVLO-locked outputs ensuring fail-safe shutdown during brownouts. Use Value: AEC-Q100 qualification and 1500 V dc inter-channel voltage tolerance support long-life, maintenance-free operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8275AD-AS1 | Same pinout and electrical specs; differs only in AEC-Q100 stress test grade (Grade 1 vs Grade 0) and temperature range (–40 to +125 °C vs –55 to +125 °C) | Targeted at non-automotive industrial use where extended low-temp operation is unnecessary | Select SI8275BB-AS1 for automotive-grade traceability (PPAP/IMDS); Si8275AD-AS1 for cost-sensitive industrial designs |
| UCC5390SCD | TI part with 4 A output, but uses capacitive isolation (not RF), lower CMTI (150 kV/µs), and no independent VDDx UVLO per channel | Lacks dual-rail flexibility and failsafe behavior under single-rail undervoltage - unsuitable for safety-critical traction inverters | Choose SI8275BB-AS1 when system-level fault tolerance, ultra-high CMTI, or automotive compliance is required |
Compared with Si8275AD-AS1, SI8275BB-AS1 adds automotive-grade process controls and extended low-temperature capability; compared with UCC5390SCD, it delivers superior noise immunity, true dual-rail independence, and certified AEC-Q100 reliability - making it the preferred choice for EV and high-end industrial gate drive.
Availability
SI8275BB-AS1 is available at Aetrix Electronics and suitable for motor control systems, solar power inverters, onboard EV chargers, and industrial UPS systems requiring stable component supply, long-term lifecycle assurance, and automotive-grade traceability.
Supply support for SI8275BB-AS1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, isolation, and precision timing technologies.
The Si827x product line was engineered specifically for high-reliability isolated gate driving in power conversion systems - emphasizing dV/dt immunity, timing accuracy, and automotive-grade robustness for SiC/GaN adoption.
FAQ
What is the isolation rating and certification status of the SI8275BB-AS1?
The SI8275BB-AS1 provides 2.5 kVRMS isolation per UL1577, with VDE 60747-17, CSA 62368-1, and CQC GB4943.1 certifications for basic insulation. It meets reinforced insulation requirements for industrial and automotive applications, including onboard chargers and traction inverters. All certifications are explicitly listed in Skyworks' official Si827x datasheet revision 206327E.
Does the SI8275BB-AS1 support independent power supplies for each output channel?
Yes, the SI8275BB-AS1 supports fully independent driver-side supplies: VDDA/GNDA for Channel A and VDDB/GNDB for Channel B. Each supply has its own UVLO monitor, allowing asymmetric rail configurations (e.g., 12 V for low-side, 18 V for high-side) and safe operation even if one rail fails. This is confirmed in Table 2 and Section 2.5.2 of the SI8275 datasheet.
What is the function of the NC pins on the SI8275BB-AS1 SOIC-16 package?
Pins 6, 7, 12, and 13 on the SI8275BB-AS1 are designated NC (No Connect) and must remain unconnected - they are not internally bonded. Skyworks' datasheet explicitly states these pins "must be left floating or tied to GNDI" for optimal noise immunity. Routing traces or placing vias on these pins violates the isolation barrier layout rules and risks CMTI degradation.
How does the SI8275BB-AS1 behave during input-side undervoltage lockout (UVLO)?
When VDDI falls below its UVLO threshold (VDDIUV–), the SI8275BB-AS1 forces both VOA and VOB into a low-output state regardless of VIA/VIB states or driver supply status. Outputs remain low until VDDI rises above VDDIUV+, then follow input logic within tSTART (~1 µs). This behavior is defined in Section 2.5.2 and verified in Table 5's truth table for SI8275.
Is the SI8275BB-AS1 pin-compatible with other Si827x variants like SI8273 or SI8274?
No - the SI8275BB-AS1 shares the same SOIC-16 package and pinout as SI8273 (dual high-side/low-side), but differs functionally from SI8274 (PWM-input) and SI8271 (single-channel). Pin compatibility is limited to SI8273/75 family members only; SI8274 uses identical pin numbers but assigns DT and PWM differently, making direct substitution unsafe without circuit redesign.
SI8275BB-AS1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- SI827x
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- RF Coupling
- Number of Channels:
- 2
- Voltage - Isolation:
- 2500Vrms
- Common Mode Transient Immunity (Min):
- 200kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 75ns, 75ns
- Pulse Width Distortion (Max):
- 8ns
- Rise / Fall Time (Typ):
- 10.5ns, 13.3ns
- Current - Output High, Low:
- 1.8A, 4A
- Current - Peak Output:
- 4A
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 4.2V ~ 30V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
- Approval Agency:
- CQC, CSA, UL, VDE
SI8275BB-AS1 FAQ
1.How can I place an order for SI8275BB-AS1 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8275BB-AS1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8275BB-AS1 reliable?
The price and inventory of SI8275BB-AS1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8275BB-AS1 is usually 5 days.
3.What payment methods are accepted for SI8275BB-AS1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8275BB-AS1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8275BB-AS1?
SI8275BB-AS1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8275BB-AS1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8275BB-AS1?
For technical support, including SI8275BB-AS1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8275BB-AS1 requirements.
6.How does Aetrix verify that SI8275BB-AS1 is sourced from the original manufacturer or authorized distributors?
All SI8275BB-AS1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8275BB-AS1 meets industry standards.
7.What is the process for return or replacement of SI8275BB-AS1?
All SI8275BB-AS1 units undergo pre-shipment inspection (PSI). If there is an issue with SI8275BB-AS1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8275BB-AS1 part is unused and in its original packaging.
Return procedure for SI8275BB-AS1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8275BB-AS1 Tags
-
TLP152(TPL,E
Toshiba Semiconductor and Storage

-
HT0740LG-G
Microchip Technology

-
FOD8314TR2
onsemi

-
1EDI60N12AFXUMA1
Infineon Technologies

-
1EDB7275FXUMA1
Infineon Technologies

-
UCC5350MCDR
Texas Instruments

-
2EDB7259KXUMA1
Infineon Technologies

-
UCC5304DWVR
Texas Instruments

-
SI8261BBC-C-ISR
Skyworks Solutions Inc.

-
HT0440LG-G
Microchip Technology

-
HCPL-0302-500E
Broadcom Limited

-
STGAP2HSCMTR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
