Skyworks Solutions Inc. SI8285DD-ASR
- Part No.:
- SI8285DD-ASR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI8285DD-ASR.pdf
- Description:
- DGTL ISO 5KV 1CH GATE DVR 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,343
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI8285DD-ASR from Skyworks is a SiC FET–ready isolated gate driver with integrated DC-DC converter, designed for high-reliability traction inverters and on-board chargers. It delivers 4 A peak sink/source drive current, supports 13 V UVLO threshold for SiC FETs, features desaturation detection with <1 µs response, and provides reinforced isolation rated at 5.0 kVrms per UL1577.
For engineers reviewing the SI8285DD-ASR datasheet, SI8285DD-ASR pinout, SI8285DD-ASR application, or SI8285DD-ASR equivalent, this device is selected for SiC-based motor drives requiring robust fault handling, soft shutdown, Miller clamping, and isolated auxiliary supply generation without external controller ICs.
Technical Context
The SI8285DD-ASR implements a proprietary RF-based isolation barrier enabling 125 kV/µs common-mode transient immunity (CMTI) and stable timing across temperature. Its dual-output architecture separates VH (gate pull-up) and VL (gate pull-down) terminals to enable independent gate resistor tuning for SiC FET switching optimization.
It integrates a feedback-controlled DC-DC controller supporting external power switches, programmable frequency dithering for EMI reduction, soft-start, and shutdown control - all configured via SH/FC, SS, and COMP pins. The DSAT pin enables fast (<1 µs), blanked desaturation detection referenced to VMID, with fixed 7 V threshold and 220 mV hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 5.0 kVrms withstand voltage (UL1577), enabling reinforced insulation in automotive traction systems. |
| Peak Output Current | ±4 A sink/source, sufficient to drive high-Qg SiC FETs at >100 kHz switching frequencies. |
| UVLO Threshold | 13 V (VDDB–VMID), optimized for SiC FET gate bias stability and safe turn-on margin. |
| Desat Detection Speed | <1 µs response time, ensuring sub-microsecond fault reaction before destructive IGBT/SiC FET overcurrent. |
| CMTI | 125 kV/µs minimum, preventing false triggering in high-dV/dt inverter leg commutation. |
| DC-DC Efficiency | 83% typical, reducing thermal load on driver-side PCB while delivering isolated VDDB supply. |
| Operating Temp | –40 °C to +125 °C ambient, qualified per AEC-Q100 Grade 1 for under-hood automotive use. |
Pinout & Package
SI8285DD-ASR is housed in a 24-pin wide-body SOIC package (WB SOIC-24) with creepage/clearance compliant to reinforced insulation standards. Pin 1 marked by dot; exposed pad not present; RoHS-compliant, 260 °C reflow compatible.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN+, IN− | Complementary digital input pair | Enables active-high or active-low logic control; differential routing improves noise immunity in noisy inverter environments. |
| VH, VL | Separate gate drive outputs | Allows independent gate resistor selection for precise SiC FET rise/fall time control and shoot-through prevention. |
| DSAT | Desaturation sense input | Monitors switch VDS/VCE via external RDSAT/DDSAT; triggers soft shutdown within <1 µs upon overcurrent detection. |
| CLMP | Miller clamp control output | Actively pulls gate low during high dV/dt events to suppress parasitic turn-on in half-bridge configurations. |
| /FLT, /RST | Open-drain fault output & active-low reset | Provides system-level fault signaling and controlled recovery; requires external pull-up/pull-down resistors per layout guidelines. |
| RDY | Push-pull ready indicator | Signals valid VDDA and VDDB supply presence; used to synchronize MCU startup with isolated power rail stabilization. |
| SH/FC, SS, COMP | DC-DC configuration interface | Enable shutdown, frequency dithering, soft-start timing, and loop compensation tuning for external transformer-based isolated supply. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Miller Clamp | Prevents parasitic turn-on in SiC FET half-bridges by actively clamping gate during high dV/dt collector/drain transients. |
| Soft Shutdown on Fault | Discharges gate via weak pull-down path (VH + RH) to avoid destructive dV/dt during desat event recovery. |
| Programmable DC-DC Frequency | Dithering capability reduces EMI peaks in isolated auxiliary supply, easing compliance with CISPR-25 Class 5. |
| AEC-Q100 Qualified | Automotive-grade qualification ensures zero-defect manufacturing flow, PPAP support, and IMDS/CAMDS compliance. |
| Reinforced Insulation | UL1577, VDE EN62368-1, CQC GB4943.1-2011 certified - meets functional safety requirements for ASIL-B systems. |
Applications
| Industrial Motor Drives | Renewable Energy Inverters |
|---|---|
Use Scenario: High-efficiency variable-speed AC induction and PMSM motor control in HVAC compressors and industrial pumps. IC Role / Device Role / Timing Role: Isolated gate driver providing SiC FET turn-on/turn-off control with desat protection and synchronized isolated supply for gate bias. Use Value: Enables >98% system efficiency at 20–50 kHz switching with robust fault response, eliminating need for discrete protection circuitry. |
Use Scenario: String-level and central solar inverters converting DC from PV arrays into grid-synchronized AC. IC Role / Device Role / Timing Role: Dual-channel isolated driver controlling high-side/low-side SiC FETs in three-phase NPC or T-type topologies. Use Value: Delivers 125 kV/µs CMTI and 5 kVrms isolation to maintain signal integrity in high-noise, high-voltage DC-link environments. |
| Traction Inverters | On-Board Chargers (OBC) |
Use Scenario: Electric vehicle main traction inverter driving permanent magnet synchronous motors up to 250 kW. IC Role / Device Role / Timing Role: AEC-Q100 qualified isolated driver managing SiC FET switching with integrated desat, soft shutdown, and Miller clamp. Use Value: Reduces BOM count by integrating DC-DC controller and safety functions, meeting ASIL-B functional safety requirements. |
Use Scenario: Bidirectional OBCs converting AC grid power to DC battery charge and vice versa in BEVs/PHEVs. IC Role / Device Role / Timing Role: Gate driver for SiC FETs in totem-pole PFC and isolated DC-DC stages, with isolated auxiliary supply generation. Use Value: Eliminates external isolated DC-DC controller IC and discrete fault management circuitry, shortening design cycle. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SI8284DD-ASR | Same 24-pin WB SOIC package, 5 kVrms isolation, 13 V UVLO, but includes external switch DC-DC topology (Si8284) vs internal switch (Si8283). | Supports higher input voltage rails (7–24 V) and greater isolated output power than SI8285DD-ASR's internal-switch variant. | Select SI8284DD-ASR when primary-side supply exceeds 5.5 V or >1.5 W isolated output power is required. |
| UCC5870QDWJRQ1 | Texas Instruments' AEC-Q100 qualified 5.7 kVRMS isolated driver with integrated DC-DC; differs in pinout, no programmable frequency, lower CMTI (100 kV/µs). | Lacks dithering and soft-start controls; requires external Miller clamp transistor; less flexible for EMI-sensitive OBC designs. | Choose UCC5870QDWJRQ1 only if TI ecosystem alignment or specific TI reference designs dictate platform choice. |
Compared with SI8284DD-ASR, SI8285DD-ASR offers simpler external component count for 5 V input systems but lower maximum DC-DC input voltage; versus UCC5870QDWJRQ1, it delivers superior noise immunity and integrated Miller clamp functionality without external components.
Availability
SI8285DD-ASR is available at Aetrix Electronics and suitable for traction inverters, on-board chargers, and industrial motor drives requiring stable component supply, automotive-grade traceability, and long-term lifecycle support.
Supply support for SI8285DD-ASR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The SI828x product line was developed specifically for high-reliability SiC and IGBT gate driving in automotive and industrial power conversion, emphasizing integrated safety, reinforced isolation, and simplified isolated supply design.
FAQ
What is the isolation voltage rating of the SI8285DD-ASR?
The SI8285DD-ASR provides 5.0 kVrms isolation rating per UL1577, verified for 1 minute. This reinforced insulation level meets safety requirements for automotive traction inverters and industrial inverters operating at 800 V DC-link voltages. The rating applies across the full operating temperature range and is validated through production testing on every SI8285DD-ASR unit.
Does the SI8285DD-ASR support SiC FETs with 13 V gate drive requirements?
Yes, the SI8285DD-ASR features a 13 V undervoltage lockout (UVLO) threshold on the driver side (VDDB–VMID), explicitly designed for reliable SiC FET operation. This ensures gate drive remains active only when sufficient bias voltage is present, preventing partial turn-on and associated conduction losses or device stress during transient conditions.
How does the desaturation detection work on the SI8285DD-ASR?
The SI8285DD-ASR uses its DSAT pin to monitor switch VDS/VCE via an external RDSAT resistor and DDSAT diode. An internal 7 V comparator with 220 mV hysteresis detects overcurrent, triggering soft shutdown in under 1 µs. A blanking capacitor (CBL) between DSAT and VMID prevents false trips during turn-on transients, with blanking time determined by CBL and internal charging current.
Can the SI8285DD-ASR generate an isolated 15 V gate supply?
Yes, the SI8285DD-ASR's integrated DC-DC controller supports isolated output voltages including 15 V, using an external transformer and Schottky rectifiers. The output is regulated via feedback between VDDB and VSSB, and tight coupling between secondary windings enables dual-rail outputs (e.g., +15 V and –5 V) from a single transformer, as confirmed in the SI8285DD-ASR application circuits.
Is the SI8285DD-ASR qualified for automotive applications?
Yes, the SI8285DD-ASR is AEC-Q100 Grade 1 qualified (–40 °C to +125 °C), manufactured in Skyworks' automotive-specific process flow with PPAP documentation, IMDS/CAMDS compliance, and zero-defect methodology. Its top marking includes automotive manufacturing code (N–Z prefix), confirming full automotive traceability and reliability validation.
SI8285DD-ASR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Number of Channels:
- 1
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 125kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 50ns, 50ns
- Pulse Width Distortion (Max):
- 5ns
- Rise / Fall Time (Typ):
- 5.5ns, 8.5ns
- Current - Output High, Low:
- 2A, 4.1A
- Current - Peak Output:
- 4A
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 14V ~ 30V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
- Approval Agency:
- CQC, CSA, UR, VDE
SI8285DD-ASR FAQ
1.How can I place an order for SI8285DD-ASR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8285DD-ASR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8285DD-ASR reliable?
The price and inventory of SI8285DD-ASR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8285DD-ASR is usually 5 days.
3.What payment methods are accepted for SI8285DD-ASR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8285DD-ASR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8285DD-ASR?
SI8285DD-ASR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8285DD-ASR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8285DD-ASR?
For technical support, including SI8285DD-ASR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8285DD-ASR requirements.
6.How does Aetrix verify that SI8285DD-ASR is sourced from the original manufacturer or authorized distributors?
All SI8285DD-ASR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8285DD-ASR meets industry standards.
7.What is the process for return or replacement of SI8285DD-ASR?
All SI8285DD-ASR units undergo pre-shipment inspection (PSI). If there is an issue with SI8285DD-ASR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8285DD-ASR part is unused and in its original packaging.
Return procedure for SI8285DD-ASR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8285DD-ASR Tags
-
TLP152(TPL,E
Toshiba Semiconductor and Storage

-
HT0740LG-G
Microchip Technology

-
FOD8314TR2
onsemi

-
1EDI60N12AFXUMA1
Infineon Technologies

-
1EDB7275FXUMA1
Infineon Technologies

-
UCC5350MCDR
Texas Instruments

-
2EDB7259KXUMA1
Infineon Technologies

-
UCC5304DWVR
Texas Instruments

-
SI8261BBC-C-ISR
Skyworks Solutions Inc.

-
HT0440LG-G
Microchip Technology

-
HCPL-0302-500E
Broadcom Limited

-
STGAP2HSCMTR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
