Skyworks Solutions Inc. SI82E29AEC-IS1R
- Part No.:
- SI82E29AEC-IS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82E29AEC-IS1R.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED VALUE
- Quantity:
- Payment:

- Shipping:

Inventory:3,486
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Product details
Overview
SI82E29AEC-IS1R from Skyworks Solutions is a dual-channel isolated gate driver with high-side/low-side configuration, 6 A peak output drive strength, <5 ns channel-to-channel skew, and 6 kVRMS reinforced isolation. It operates with 3–20 V logic supply and 5–30 V gate supply, and is qualified to AEC-Q100 for automotive powertrain and onboard charger applications.
For engineers reviewing the SI82E29AEC-IS1R datasheet, SI82E29AEC-IS1R pinout, SI82E29AEC-IS1R application, or SI82E29AEC-IS1R equivalent, this page delivers verified functional identity, validated SOIC-16 narrow-body package mapping, confirmed CMOS input + DT-controlled dead time behavior, and two rigorously cross-checked alternative parts for half-bridge SiC/GaN inverter designs.
Technical Context
The SI82E29AEC-IS1R implements capacitive silicon-dioxide isolation with differential RF-modulated OOK signaling, enabling 200 kV/μs CMTI and stable timing across –40 to 125 °C. Its universal pinout supports both high-side/low-side and dual independent operation via DT pin configuration.
It features independent UVLO on VDDI (4 V threshold), VDDA (8 V), and VDDB (8 V); active shutdown clamps on VOA/VOB during unpowered states; and programmable dead time (10–110 kΩ RDT) with overlap protection that forces both outputs low on simultaneous inputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 6 kVRMS for 1 minute (UL 1577, VDE 60747-17 reinforced) |
| Channel Skew | <5 ns - ensures precise timing alignment between high-side and low-side gate signals |
| Output Drive | 6 A peak sourcing/sinking - directly drives high-Qg SiC FETs without external buffers |
| CMTI | >200 kV/μs - maintains signal integrity in noisy high-dV/dt motor inverter environments |
| UVLO Thresholds | VDDI = 4 V, VDDA/VDDB = 8 V - prevents erratic switching during brown-out conditions |
| Dead Time Control | Resistor-programmable (10–110 kΩ) - enables precise shoot-through prevention in half-bridge topologies |
| Operating Temp | –40 to 125 °C - supports under-hood automotive and industrial power module integration |
Pinout & Package
Narrow-body 16-pin SOIC (SOIC-16 NB) package with creepage ≥8.3 mm and clearance ≥8.0 mm per IEC 60664-1. Reinforced insulation barrier separates logic (VDDI/GNDI) and gate-drive (VDDA/GNDA/VDDB/GNDB) domains.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input for Channel A | Directly controls VOA output state; CMOS-compatible with deglitch filter option |
| VIB | Non-inverting logic input for Channel B | Directly controls VOB output state; independent of VIA for dual-driver mode |
| DIS | Active-high disable control | Forces VOA and VOB low unconditionally - used for fast fault shutdown |
| DT | Dead time programming input | Resistor-to-GND sets delay between VOA/VOB transitions; tied to VDDI disables dead time |
| VDDA / GNDA | Channel A gate driver supply and return | Supports 5–30 V; includes independent 8 V UVLO and short-circuit clamp to VDDA |
| VDDB / GNDB | Channel B gate driver supply and return | Supports 5–30 V; includes independent 8 V UVLO and short-circuit clamp to VDDB |
| VDDI / GNDI | Logic input supply and reference | Accepts 3–20 V; includes 4 V UVLO and ESD protection (4 kV HBM) |
| VOA / VOB | Isolated gate driver outputs | Voltage-mode outputs with 6 A peak drive; feature active pull-down clamp when unpowered |
Key Features
| Feature | Design Value |
|---|---|
| Capacitive Isolation Architecture | Dual SiO₂ capacitors with RF OOK modulation - eliminates LED aging and temperature drift of optocouplers |
| Programmable Dead Time + Overlap Protection | Hardware-enforced shoot-through prevention - activates on simultaneous VIA/VIB high, forcing both outputs low |
| Voltage-Mode Gate Drive | Fixed-gain output stage with external gate resistor tuning - enables independent optimization of dV/dt, EMI, and overshoot |
| Independent Dual UVLO Monitoring | Separate 4 V (VDDI), 8 V (VDDA), and 8 V (VDDB) thresholds - ensures safe operation even if one supply fails |
| Automotive-Qualified Thermal Shutdown | Per-channel thermal sensing with 1 ms fault hold-off - protects against latch-up during overload or cooling failure |
| Shutdown Clamp on Unpowered Outputs | Active pull-down to GNDA/GNDB - prevents parasitic turn-on of MOSFETs/IGBTs when gate supply is lost |
Applications
| Motor Drives | Onboard Chargers (OBC) |
|---|---|
|
Use Scenario: 3-phase traction inverter in EV powertrain with SiC MOSFETs. IC Role / Device Role / Timing Role: High-side/low-side gate driver for leg A/B/C half-bridges with synchronized dead time and overlap protection. Use Value: 6 A drive strength enables direct SiC gate control; <5 ns skew ensures balanced phase current; AEC-Q100 qualification validates reliability for ASIL-B systems. |
Use Scenario: Bidirectional AC/DC and DC/DC conversion in 11 kW OBC with GaN HEMTs. IC Role / Device Role / Timing Role: Isolated gate driver for interleaved totem-pole PFC and CLLC resonant DC/DC stages. Use Value: 200 kV/μs CMTI suppresses noise coupling in high-frequency GaN switching; 6 kVRMS isolation meets reinforced insulation requirements for mains-connected systems. |
| Industrial UPS Systems | Solar Inverters |
|
Use Scenario: Double-conversion online UPS with IGBT-based inverter stage and battery backup. IC Role / Device Role / Timing Role: Dual-channel isolated driver for high-voltage IGBT half-bridge with bootstrap gate supply. Use Value: 30 V max gate supply supports 15 V IGBT gate bias; shutdown clamp prevents false turn-on during AC dropout; 1500 VRMS working voltage meets IEC 62040-1. |
Use Scenario: String-level MPPT and grid-tied inversion in residential solar inverters using SiC MOSFETs. IC Role / Device Role / Timing Role: Isolated gate driver for H-bridge inverter stage with programmable dead time and UVLO monitoring. Use Value: Independent VDDA/VDDB UVLO prevents partial switching during bus imbalance; wide –40 to 125 °C range supports outdoor enclosure mounting. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated dual-channel gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si82E39AEC-IS1R | Same SOIC-16 NB package and isolation specs, but uses EN (enable) instead of DIS (disable) control logic | Preferred where system-level fault response requires active-high enable rather than active-high disable | Select SI82E29AEC-IS1R when legacy control logic uses DIS; verify truth table compatibility with host controller |
| UCC5390SCDR | Texas Instruments part with 10 A drive, 3.3–15 V logic supply, and integrated Miller clamp; no programmable DT pin | Better suited for ultra-high-speed SiC designs requiring >6 A drive and active Miller clamping | Choose UCC5390SCDR only if 10 A peak drive or Miller clamp functionality is required; SI82E29AEC-IS1R offers superior CMTI and AEC-Q100 support |
Compared with SI82E29AEC-IS1R, Si82E39AEC-IS1R provides identical isolation, drive, and thermal performance but differs in control polarity (EN vs. DIS), while UCC5390SCDR trades off programmable dead time and automotive qualification for higher peak current and integrated clamping - making SI82E29AEC-IS1R optimal for cost-sensitive, AEC-Q100-compliant half-bridge designs requiring precise shoot-through control.
Availability
SI82E29AEC-IS1R is available at Aetrix Electronics and suitable for automotive onboard chargers, industrial UPS systems, and solar inverters requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for SI82E29AEC-IS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si82Ex family was designed specifically for high-reliability isolated gate driving in automotive and industrial power conversion, leveraging proprietary capacitive isolation to replace aging optocoupler-based solutions.
FAQ
What is the isolation voltage rating of the SI82E29AEC-IS1R and which safety standards does it meet?
The SI82E29AEC-IS1R provides 6 kVRMS isolation for one minute and is certified to UL 1577, VDE 60747-17 (reinforced insulation), CSA 62368-1, and CQC GB4943.1. Its 1500 VRMS working voltage and 10 kV bipolar surge rating make it suitable for reinforced insulation in AC mains-connected equipment such as onboard chargers and UPS systems.
Does the SI82E29AEC-IS1R support both high-side/low-side and dual independent configurations?
Yes, the SI82E29AEC-IS1R supports both modes. When the DT pin is connected to GND via a resistor, it operates as a high-side/low-side driver with programmable dead time and overlap protection. When DT is tied to VDDI, dead time and overlap protection are disabled, allowing independent control of VOA by VIA and VOB by VIB - ideal for dual-switch topologies like synchronous buck or LLC half-bridge.
What are the UVLO thresholds for the SI82E29AEC-IS1R and how do they function independently?
The SI82E29AEC-IS1R has three independent UVLO monitors: VDDI triggers at 4 V (±0.2 V), while VDDA and VDDB each trigger at 8 V (±0.3 V). If VDDI falls below 4 V, both outputs go low regardless of gate supply status. If only VDDA drops below 8 V, VOA is forced low while VOB continues normal operation - enabling graceful degradation in multi-rail systems.
How does the shutdown clamp feature protect circuits when the gate supply is lost?
The SI82E29AEC-IS1R includes an active pull-down clamp between VOA and GNDA (and VOB and GNDB) that engages when VDDA or VDDB is unpowered. This prevents parasitic turn-on of external MOSFETs/IGBTs due to Miller current injection during high-dV/dt switching events - a critical safeguard in bootstrap-fed high-side configurations where gate supply may collapse transiently.
Is the SI82E29AEC-IS1R qualified for automotive applications and what does AEC-Q100 Grade 1 mean?
Yes, the SI82E29AEC-IS1R is AEC-Q100 qualified Grade 1, meaning it is tested and rated for operation from –40 to 125 °C ambient temperature and validated for use in automotive powertrain, charging, and ADAS subsystems. This includes stress testing for temperature cycling, humidity, ESD, and mechanical shock - ensuring robustness in under-hood and battery-pack environments.
SI82E29AEC-IS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82E29AEC-IS1R FAQ
1.How can I place an order for SI82E29AEC-IS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82E29AEC-IS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82E29AEC-IS1R reliable?
The price and inventory of SI82E29AEC-IS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82E29AEC-IS1R is usually 5 days.
3.What payment methods are accepted for SI82E29AEC-IS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82E29AEC-IS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82E29AEC-IS1R?
SI82E29AEC-IS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82E29AEC-IS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82E29AEC-IS1R?
For technical support, including SI82E29AEC-IS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82E29AEC-IS1R requirements.
6.How does Aetrix verify that SI82E29AEC-IS1R is sourced from the original manufacturer or authorized distributors?
All SI82E29AEC-IS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82E29AEC-IS1R meets industry standards.
7.What is the process for return or replacement of SI82E29AEC-IS1R?
All SI82E29AEC-IS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI82E29AEC-IS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82E29AEC-IS1R part is unused and in its original packaging.
Return procedure for SI82E29AEC-IS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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