Skyworks Solutions Inc. SI82E39ACC-IS1
- Part No.:
- SI82E39ACC-IS1
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82E39ACC-IS1.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED VALUE
- Quantity:
- Payment:

- Shipping:

Inventory:4,557
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI82E39ACC-IS1 from Skyworks Solutions is a dual-channel isolated gate driver with 6 A peak output current, universal configuration (independent VIA/VIB inputs), and active-high enable (EN) control. It delivers <5 ns channel-to-channel skew, 200 kV/µs CMTI, and 6 kVRMS reinforced isolation for driving SiC/GaN FETs in half-bridge topologies. Used in onboard chargers and motor drives where shoot-through prevention and high-noise immunity are critical.
For engineers reviewing the SI82E39ACC-IS1 datasheet, SI82E39ACC-IS1 pinout, SI82E39ACC-IS1 application, or SI82E39ACC-IS1 equivalent, key selection criteria include its universal input architecture (not PWM-only), EN-based fault shutdown, programmable dead time via external resistor, and AEC-Q100 qualification for automotive-grade reliability.
Technical Context
The SI82E39ACC-IS1 implements capacitive silicon-dioxide isolation with differential RF-modulated OOK signaling, enabling precise timing and robust noise rejection. Its dual independent CMOS inputs (VIA, VIB) feed separate isolated channels, each with dedicated UVLO monitoring on VDDA and VDDB.
Dead time is actively programmed via resistor-connected DT pin (10–110 kΩ range), with overlap protection forcing both outputs low during simultaneous high inputs. The EN pin unconditionally pulls VOA/VOB low within tDID when deasserted, supporting fast system-level fault response without relying on logic sequencing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 6 kVRMS (1 min), UL 1577 certified - enables reinforced insulation in 400–800 V DC bus systems. |
| Channel-to-Channel Skew | <5 ns - ensures matched turn-on/turn-off timing critical for minimizing cross-conduction in half-bridges. |
| CMTI | >200 kV/µs - maintains signal integrity in high-dV/dt environments like SiC inverters. |
| Peak Output Current | 6 A sourcing/sinking - directly drives high-gate-charge SiC MOSFETs (e.g., 100 nC Qg) with minimal external buffering. |
| Input Supply Range | 3–20 V (VDDI) - interfaces directly with 3.3 V, 5 V, or 15 V controller logic without level-shifting. |
| Gate Supply Range | 5–30 V (VDDA/VDDB) - supports bipolar gate drive (±15 V) or unipolar (12 V) configurations for optimal FET switching. |
| Operating Temperature | –40 to +125 °C - qualified per AEC-Q100 Grade 1 for under-hood automotive power electronics. |
Pinout & Package
Narrow-body 16-pin SOIC (NB SOIC-16) package with creepage ≥8.3 mm and clearance ≥8.0 mm - meets reinforced insulation requirements for 600 V RMS working voltage.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input for Channel A | CMOS-compatible, Schmitt-triggered input accepting 3–20 V logic; controls VOA independently of VIB. |
| VIB | Non-inverting logic input for Channel B | Independent input enabling true dual-driver operation (e.g., synchronous rectification or phase-shifted control). |
| EN | Active-high enable | Asserting EN = high enables normal operation; pulling EN low forces VOA/VOB low within 120 ns (tDID) for fail-safe shutdown. |
| DT | Dead time programming | Resistor-to-GND sets dead time (10–110 kΩ → ~17–1100 ns); connecting to VDDI disables dead time and overlap protection. |
| VDDA / GNDA | Channel A gate driver supply | Isolated 5–30 V supply for high-side or low-side FET gate drive; includes independent UVLO (4/8/12/15 V options). |
| VDDB / GNDB | Channel B gate driver supply | Separate isolated supply allows asymmetric rail voltages (e.g., +15 V/–5 V) for enhanced SiC FET control. |
| VOA / VOB | Gate driver outputs | Voltage-mode outputs with 6 A peak drive; short-circuit clamp limits VOA/B to VDDA/B +0.7 V during overcurrent events. |
| VDDI / GNDI | Logic input supply | 3–20 V digital supply; powers internal isolation modulator and input logic; UVLO threshold configurable per ordering option. |
Key Features
| Feature | Design Value |
|---|---|
| Universal input architecture | Independent VIA/VIB inputs (not PWM-shared) enable flexible control schemes including phase-shifted full-bridge or independent motor phase control. |
| Programmable dead time with overlap protection | External RDT sets precise dead time; simultaneous high inputs force both outputs low to prevent shoot-through regardless of RDT value. |
| Voltage-mode gate drive | Output behaves as controlled voltage source - gate resistor selection directly tunes dV/dt, EMI, and overshoot without loop compensation. |
| AEC-Q100 Grade 1 qualification | Validated for automotive powertrain applications including onboard chargers and traction inverters with full temperature and lifetime stress testing. |
| Shutdown clamp on unpowered outputs | Active pull-down to GNDA/GNDB prevents parasitic turn-on of FETs when VDDA/VDDB is absent - critical for safe startup/shutdown sequencing. |
Applications
| Onboard Charger (OBC) | Industrial Motor Drive |
|---|---|
Use Scenario: Bidirectional AC/DC and DC/DC conversion in EV charging systems with 400–800 V battery packs. IC Role / Device Role / Timing Role: Isolated gate driver for SiC half-bridge power stage; provides shoot-through immunity and fast fault shutdown via EN pin. Use Value: 6 kVRMS isolation and 200 kV/µs CMTI ensure reliable operation in noisy high-voltage battery domains; AEC-Q100 qualification supports OEM compliance. |
Use Scenario: Field-oriented control (FOC) of 3-phase PMSM/induction motors in HVAC compressors and industrial pumps. IC Role / Device Role / Timing Role: Dual-channel driver for inverter leg pairs; independent VIA/VIB inputs support advanced modulation techniques like space-vector PWM. Use Value: <5 ns skew enables precise phase alignment across motor phases; 6 A drive capability reduces need for external buffer stages in 10–30 kW systems. |
| Solar Microinverter | Uninterruptible Power Supply (UPS) |
Use Scenario: Single-phase transformerless grid-tied inverters with leakage current constraints and high efficiency targets. IC Role / Device Role / Timing Role: Isolated driver for H6 or HERIC topology switches; DT pin configures dead time to minimize conduction loss while preventing shoot-through. Use Value: Reinforced insulation (UL/CSA/VDE certified) eliminates need for additional isolation components; 1500 VRMS working voltage supports 600 V AC grid interface. |
Use Scenario: Online double-conversion UPS systems requiring fast transfer between utility and battery backup with zero output interruption. IC Role / Device Role / Timing Role: Gate driver for bidirectional IGBT/SiC modules in inverter and rectifier stages; EN pin enables coordinated shutdown during mode transitions. Use Value: Dual independent UVLO thresholds per channel allow staged power-up of inverter/rectifier rails; thermal shutdown protects against overload during brownout conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8239AD-IS1 | Same NB SOIC-16 package and universal VIA/VIB inputs, but uses active-high DISABLE (DIS) instead of ENABLE (EN). | Requires inverted control logic for fault shutdown; DIS assertion pulls outputs low, but lacks EN's direct enable semantics for safety-critical sequencing. | Select Si8239AD-IS1 only if existing controller firmware already implements DIS-active fault handling; otherwise SI82E39ACC-IS1 simplifies safety architecture. |
| UCC5390SCD | Texas Instruments part with 10 A peak drive, single PWM input, and integrated Miller clamp; no independent VIA/VIB or programmable DT pin. | Optimized for cost-sensitive single-input half-bridge designs; lacks universal configuration flexibility and discrete dead time tuning. | Choose UCC5390SCD for high-current, low-complexity applications where independent channel control is unnecessary; SI82E39ACC-IS1 preferred for multi-mode or phase-shifted topologies. |
Compared with Si8239AD-IS1, SI82E39ACC-IS1 offers more intuitive fault response via EN pin, while versus UCC5390SCD it provides superior design flexibility through independent inputs and field-adjustable dead time - critical for optimizing EMI and efficiency across varying load conditions.
Availability
SI82E39ACC-IS1 is available at Aetrix Electronics and suitable for onboard chargers, industrial motor drives, solar microinverters, and uninterruptible power supplies requiring stable component supply, automotive-grade reliability, and reinforced isolation certification.
Supply support for SI82E39ACC-IS1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si82Ex family was designed specifically for high-reliability isolated gate driving in automotive and industrial power electronics, leveraging proprietary capacitive isolation to replace aging optocoupler-based solutions.
FAQ
What is the isolation rating and safety certification status of the SI82E39ACC-IS1?
The SI82E39ACC-IS1 provides 6 kVRMS isolation for one minute and is UL 1577 recognized, CSA 62368-1 and 60601-1 certified, VDE 60747-17 compliant, and CQC GB4943.1 approved - all confirming reinforced insulation suitable for 400–800 V DC bus applications. Its 1500 VRMS working voltage and 10 kV bipolar surge rating meet stringent automotive and industrial safety requirements.
How does the SI82E39ACC-IS1 implement dead time control, and what is the range?
The SI82E39ACC-IS1 uses an external resistor (RDT) connected between the DT pin and GNDI to set dead time from ~17 ns to 1100 ns, calculated as tDT = 1.73 × RDT + 5.74 (RDT in kΩ). Connecting DT to VDDI disables dead time insertion and overlap protection, converting the device to a pure dual driver. This resistor-based method allows field tuning without firmware changes.
Does the SI82E39ACC-IS1 support both high-side and low-side gate driving in the same package?
Yes - the SI82E39ACC-IS1 is configured as a universal driver with independent VIA and VIB inputs, allowing it to drive two low-side FETs, two high-side FETs (with isolated supplies), or one high-side and one low-side FET in a half-bridge. Its dual isolated supplies (VDDA/GNDA and VDDB/GNDB) enable true galvanic separation for each channel's gate loop.
What UVLO thresholds are available on the SI82E39ACC-IS1, and how are they selected?
The SI82E39ACC-IS1 offers factory-configurable UVLO thresholds of 4 V, 8 V, 12 V, or 15 V on VDDI, VDDA, and VDDB - each independently selectable per ordering option. These thresholds prevent erroneous switching during brownout or startup by holding VOA/VOB low until respective supplies exceed their UVLO+ level, with hysteresis ensuring clean exit from undervoltage state.
Is the SI82E39ACC-IS1 pin-compatible with other Si82Ex family members like SI82E29 or SI82E89?
No - the SI82E39ACC-IS1 uses the universal input configuration with VIA/VIB and EN pins, whereas SI82E29x has VIA/VIB and DIS, SI82E89x uses PWM/EN, and SI82E99x uses PWM/DIS. Pinouts differ across variants (e.g., DIS vs. EN placement, NC locations), so PCB layout is not interchangeable; refer to Figures 1–4 in the datasheet for exact NB SOIC-16 mappings.
SI82E39ACC-IS1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82E39ACC-IS1 FAQ
1.How can I place an order for SI82E39ACC-IS1 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82E39ACC-IS1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82E39ACC-IS1 reliable?
The price and inventory of SI82E39ACC-IS1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82E39ACC-IS1 is usually 5 days.
3.What payment methods are accepted for SI82E39ACC-IS1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82E39ACC-IS1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82E39ACC-IS1?
SI82E39ACC-IS1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82E39ACC-IS1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82E39ACC-IS1?
For technical support, including SI82E39ACC-IS1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82E39ACC-IS1 requirements.
6.How does Aetrix verify that SI82E39ACC-IS1 is sourced from the original manufacturer or authorized distributors?
All SI82E39ACC-IS1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82E39ACC-IS1 meets industry standards.
7.What is the process for return or replacement of SI82E39ACC-IS1?
All SI82E39ACC-IS1 units undergo pre-shipment inspection (PSI). If there is an issue with SI82E39ACC-IS1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82E39ACC-IS1 part is unused and in its original packaging.
Return procedure for SI82E39ACC-IS1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI82E39ACC-IS1 Tags
-
TLP152(TPL,E
Toshiba Semiconductor and Storage

-
HT0740LG-G
Microchip Technology

-
FOD8314TR2
onsemi

-
1EDI60N12AFXUMA1
Infineon Technologies

-
1EDB7275FXUMA1
Infineon Technologies

-
UCC5350MCDR
Texas Instruments

-
2EDB7259KXUMA1
Infineon Technologies

-
UCC5304DWVR
Texas Instruments

-
SI8261BBC-C-ISR
Skyworks Solutions Inc.

-
HT0440LG-G
Microchip Technology

-
HCPL-0302-500E
Broadcom Limited

-
STGAP2HSCMTR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
