Skyworks Solutions Inc. SI82E39ACC-IS1R
- Part No.:
- SI82E39ACC-IS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82E39ACC-IS1R.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED VALUE
- Quantity:
- Payment:

- Shipping:

Inventory:4,771
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Product details
Overview
SI82E39ACC-IS1R from Skyworks Solutions is a dual-channel isolated gate driver with 6 A peak output current, universal configuration (independent VIA/VIB inputs), and enable (EN) control. It delivers <5 ns channel-to-channel skew, 200 kV/µs CMTI, and 6 kVRMS reinforced isolation for driving SiC/GaN FETs in half-bridge topologies. Used in onboard chargers and motor drives requiring high noise immunity and precise dead-time control.
For engineers reviewing the SI82E39ACC-IS1R datasheet, SI82E39ACC-IS1R pinout, SI82E39ACC-IS1R application, or SI82E39ACC-IS1R equivalent, this page provides verified functional specifications, validated SOIC-16 pin mapping, confirmed UVLO thresholds (4 V / 8 V / 12 V / 15 V), and real-world design implications of its voltage-mode drive architecture and programmable dead time.
Technical Context
The SI82E39ACC-IS1R implements capacitive silicon-dioxide isolation with differential RF-modulated OOK signaling between logic and gate-drive domains, enabling robust timing performance across temperature and lifetime. Its universal input architecture accepts independent non-inverting signals on VIA and VIB, with EN enabling synchronous operation of both channels.
Dead time is resistor-programmable via the DT pin (10–110 kΩ range), generating up to ~200 ns typical delay; connecting DT to VDDI disables dead time and overlap protection, converting it to a dual independent driver. UVLO monitors VDDI, VDDA, and VDDB independently with hysteresis, ensuring safe startup/shutdown sequencing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 6 kVRMS for 1 minute - meets UL 1577, CSA/IEC 62368-1, VDE 60747-17 reinforced insulation requirements. |
| Channel-to-Channel Skew | <5 ns - enables precise timing alignment critical for high-frequency half-bridge switching without shoot-through risk. |
| CMTI | >200 kV/µs - prevents false triggering in noisy high-dV/dt environments like SiC/GaN inverters. |
| Peak Output Current | 6 A sourcing/sinking - supports fast gate charging of high-Qg SiC MOSFETs and GaN HEMTs. |
| Input Supply Range | 3–20 V - compatible with 3.3 V, 5 V, and 15 V controller logic without level-shifting. |
| Gate Supply Range | 5–30 V - allows flexible biasing for 12 V or 15 V gate drive, supporting both unipolar and bipolar configurations. |
| UVLO Thresholds | 4 V / 8 V / 12 V / 15 V options - selectable per device variant to match system rail stability and fault margin requirements. |
| Operating Temperature | –40 to +125 °C - qualified per AEC-Q100 Grade 1, suitable for under-hood automotive and industrial ambient conditions. |
Pinout & Package
Narrow-body 16-pin SOIC package (SOIC-16 NB) with creepage-enhanced layout for reinforced isolation. Pin 1 marked with dot; pins 12 and 13 are NC (no connection).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input for Channel A | Directly controls VOA output state; high = VOA high, low = VOA low (when enabled). |
| VIB | Non-inverting logic input for Channel B | Directly controls VOB output state; high = VOB high, low = VOB low (when enabled). |
| EN | Active-high enable input | Drives both VOA and VOB low when deasserted; enables normal operation when asserted (logic high). |
| DT | Dead time programming input | Resistor-to-GND sets dead time (10–110 kΩ → ~20–200 ns); tied to VDDI disables dead time and overlap protection. |
| VDDI | Logic input supply | 3–20 V power for internal digital circuitry and isolation modulator; monitored by UVLO. |
| GNDI | Logic input ground | Reference for all logic inputs (VIA, VIB, EN, DT); galvanically isolated from GNDA/GNDB. |
| VDDA | Gate driver A supply | 5–30 V power for Channel A output stage; independent UVLO ensures safe turn-off during undervoltage. |
| GNDA | Gate driver A ground | Reference for VOA; forms isolated secondary domain with VDDA; includes shutdown clamp to GND. |
| VDDB | Gate driver B supply | 5–30 V power for Channel B output stage; independently monitored for UVLO behavior. |
| GNDB | Gate driver B ground | Reference for VOB; isolated from GNDA and GNDI; enables true floating half-bridge operation. |
| VOA | Channel A gate driver output | Voltage-mode output with 6 A peak drive; includes short-circuit clamp to VDDA and shutdown clamp to GNDA. |
| VOB | Channel B gate driver output | Voltage-mode output with 6 A peak drive; identical clamping and protection features as VOA. |
Key Features
| Feature | Design Value |
|---|---|
| Universal input configuration | Independent VIA/VIB control enables asymmetric PWM, phase-shifted topologies, or dual independent switches - no fixed high-side/low-side dependency. |
| Voltage-mode gate drive | Output behaves as controlled voltage source; external gate resistors directly set dV/dt, EMI, and overshoot - no current-source complexity or thermal derating concerns. |
| Programmable dead time with overlap protection | Resistor-set dead time prevents shoot-through; automatic overlap detection forces both outputs low if VIA and VIB go high simultaneously - hardware-enforced safety. |
| Independent triple UVLO monitoring | VDDI, VDDA, and VDDB each have dedicated UVLO with hysteresis; ensures outputs remain low if any supply drops, eliminating unintended turn-on during brownout. |
| AEC-Q100 Grade 1 qualification | Validated for automotive applications including onboard chargers and traction inverters; includes extended temperature, HTOL, and ESD testing per automotive standards. |
| 1500 VRMS working voltage | Rated for continuous 1500 VRMS isolation barrier stress - supports 800 V DC bus systems with margin for transients and aging. |
Applications
| Onboard Charger (OBC) | Industrial Motor Drive |
|---|---|
Use Scenario: Bidirectional AC/DC and DC/DC conversion in EV charging systems using SiC half-bridges. IC Role / Device Role / Timing Role: Isolated gate driver for high-side and low-side SiC MOSFETs in interleaved totem-pole PFC and DC-DC stages. Use Value: <5 ns skew and 200 kV/µs CMTI prevent timing errors and false triggering during fast SiC switching at >100 kHz, improving efficiency and reliability. |
Use Scenario: Field-oriented control (FOC) of 3-phase PMSM/induction motors in HVAC and pump inverters. IC Role / Device Role / Timing Role: Dual-channel isolated driver controlling upper/lower IGBTs in 3-phase inverter legs with cycle-by-cycle fault response. Use Value: EN pin enables immediate shutdown during overcurrent events; independent UVLO on VDDA/VDDB avoids single-point failure in multi-rail gate supply designs. |
| Solar Microinverter | Uninterruptible Power Supply (UPS) |
Use Scenario: High-efficiency DC/AC inversion in residential solar microinverters using GaN half-bridges. IC Role / Device Role / Timing Role: Universal-input driver operating in dual independent mode for asymmetrical modulation schemes and soft-switching topologies. Use Value: DT pin disable (tied to VDDI) converts SI82E39ACC-IS1R to dual independent drivers - enabling resonant LLC or active-clamp forward control without dead-time constraints. |
Use Scenario: Online double-conversion UPS with bidirectional buck-boost and inverter stages handling 48 V–400 V DC buses. IC Role / Device Role / Timing Role: Isolated gate driver for high-voltage Si MOSFETs in battery isolation and grid-synchronization circuits. Use Value: 6 kVRMS isolation and 10 kV bipolar surge rating meet IEC 62040-1 safety requirements for medical and datacenter UPS systems with 2 MOPP compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si82E30ACC-IS1R | Same SOIC-16 package and universal configuration, but uses DISABLE (DIS) instead of ENABLE (EN) control logic. | Requires inverted enable signal generation; less intuitive for systems where fault shutdown must be active-high. | Select SI82E39ACC-IS1R when active-high enable simplifies controller interface and matches existing GPIO polarity. |
| UCC5390SCDR | Texas Instruments part with 10 A peak drive, 3.3 V logic compatibility, and integrated Miller clamp - no programmable dead time or universal input mode. | Better suited for high-current IGBTs; lacks independent UVLO per channel and resistor-programmable dead time. | Choose SI82E39ACC-IS1R when precise dead-time tuning, dual independent inputs, and triple UVLO are required over raw current capability. |
Compared with Si82E30ACC-IS1R, SI82E39ACC-IS1R offers more intuitive active-high enable control and identical timing/isolation specs; versus UCC5390SCDR, it trades higher peak current for superior configurability, isolation robustness, and automotive qualification - making it optimal for SiC/GaN-based systems demanding precision and safety.
Availability
SI82E39ACC-IS1R is available at Aetrix Electronics and suitable for onboard chargers, industrial motor drives, solar microinverters, and uninterruptible power supplies requiring stable component supply, long-term lifecycle support, and automotive-grade reliability.
Supply support for SI82E39ACC-IS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si82Ex family was designed specifically for high-reliability isolated gate driving in next-generation power electronics - targeting SiC/GaN adoption in automotive, industrial, and renewable energy systems with emphasis on CMTI, skew, and safety certification.
FAQ
What is the isolation rating and safety certification status of the SI82E39ACC-IS1R?
The SI82E39ACC-IS1R provides 6 kVRMS isolation for one minute and is certified to UL 1577, CSA/IEC 62368-1 (reinforced insulation), VDE 60747-17, and CQC GB4943.1. It supports 1500 VRMS working voltage and 10 kV bipolar surge, meeting 2 MOPP requirements per IEC 60601-1 for medical-grade isolation. These certifications are fully documented in Skyworks' safety reports for the Si82Ex family.
Does the SI82E39ACC-IS1R support both high-side/low-side and dual independent configurations?
Yes - the SI82E39ACC-IS1R is a universal-configuration device with independent VIA and VIB inputs. When the DT pin is connected to GND via a resistor, it operates as a high-side/low-side driver with programmable dead time. When DT is tied to VDDI, dead time and overlap protection are disabled, allowing true dual independent operation where VOA follows VIA and VOB follows VIB without inter-channel timing constraints.
What are the UVLO threshold options available for the SI82E39ACC-IS1R?
The SI82E39ACC-IS1R offers factory-configured UVLO thresholds of 4 V, 8 V, 12 V, or 15 V on VDDI, VDDA, and VDDB - each monitored independently. The specific threshold is fixed per orderable part number and cannot be adjusted externally. This enables precise matching to system rail stability margins, especially critical in automotive 12 V and industrial 24 V gate supply designs.
How does the SI82E39ACC-IS1R handle power supply sequencing during startup and shutdown?
The SI82E39ACC-IS1R implements independent UVLO on VDDI, VDDA, and VDDB with hysteresis. If VDDI falls below its UVLO threshold, both outputs are forced low regardless of input states. VDDA and VDDB UVLO operate independently: if VDDA drops out while VDDB remains valid, only VOA is disabled - VOB continues normal operation. This prevents unintended turn-on during partial power loss and supports flexible bootstrap or isolated supply architectures.
Is the SI82E39ACC-IS1R qualified for automotive applications?
Yes - the SI82E39ACC-IS1R is AEC-Q100 Grade 1 qualified (–40 °C to +125 °C) and manufactured using automotive-specific process flows. It is explicitly listed in Skyworks' automotive-grade OPN offerings and supports applications including onboard chargers, DC-DC converters, and auxiliary inverters in EV/HEV platforms. Full qualification test reports are available under NDA from Skyworks.
SI82E39ACC-IS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82E39ACC-IS1R FAQ
1.How can I place an order for SI82E39ACC-IS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82E39ACC-IS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82E39ACC-IS1R reliable?
The price and inventory of SI82E39ACC-IS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82E39ACC-IS1R is usually 5 days.
3.What payment methods are accepted for SI82E39ACC-IS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82E39ACC-IS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82E39ACC-IS1R?
SI82E39ACC-IS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82E39ACC-IS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82E39ACC-IS1R?
For technical support, including SI82E39ACC-IS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82E39ACC-IS1R requirements.
6.How does Aetrix verify that SI82E39ACC-IS1R is sourced from the original manufacturer or authorized distributors?
All SI82E39ACC-IS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82E39ACC-IS1R meets industry standards.
7.What is the process for return or replacement of SI82E39ACC-IS1R?
All SI82E39ACC-IS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI82E39ACC-IS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82E39ACC-IS1R part is unused and in its original packaging.
Return procedure for SI82E39ACC-IS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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