Skyworks Solutions Inc. SI82E39BEC-IS1R
- Part No.:
- SI82E39BEC-IS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82E39BEC-IS1R.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED VALUE
- Quantity:
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Inventory:2,145
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Product details
Overview
SI82E39BEC-IS1R from Skyworks Solutions is a dual-channel isolated gate driver with 6 A peak output current, universal configuration (independent VIA/VIB inputs), and enable (EN) control logic. It delivers <5 ns channel-to-channel skew, 200 kV/µs CMTI, and 6 kVRMS reinforced isolation for driving SiC/GaN FETs in half-bridge topologies. Used in onboard chargers and motor drives requiring precise timing and high noise immunity.
For engineers reviewing the SI82E39BEC-IS1R datasheet, SI82E39BEC-IS1R pinout, SI82E39BEC-IS1R application, or SI82E39BEC-IS1R equivalent, this page provides verified technical context, validated pin functions, confirmed safety certifications (UL 1577, VDE 60747-17), and real-world design implications of its voltage-mode drive, dead-time programmability, and automotive-grade AEC-Q100 qualification.
Technical Context
The SI82E39BEC-IS1R implements capacitive silicon-dioxide isolation with differential RF-modulated signal transmission, enabling robust 6 kVRMS one-minute isolation and 1500 VRMS working voltage. Its universal input architecture accepts independent non-inverting logic signals (VIA/VIB) and uses an active-high EN pin to globally force both outputs low.
It supports voltage-mode gate drive with external gate resistors, programmable dead time via DT pin resistor (10–110 kΩ), and independent UVLO thresholds (4/8/12/15 V) on VDDI, VDDA, and VDDB. Thermal shutdown (TSD+ = 150 °C) and active pull-down clamps prevent parasitic turn-on during unpowered conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 6 kVRMS for 1 minute - meets UL 1577, VDE 60747-17, and CSA 62368-1 reinforced insulation requirements. |
| Channel-to-Channel Skew | <5 ns - ensures precise synchronous switching in high-frequency half-bridge inverters without shoot-through risk. |
| CMTI | >200 kV/µs - maintains signal integrity in noisy high-dV/dt environments like SiC-based power converters. |
| Peak Output Current | 6 A sourcing/sinking - drives high-gate-charge SiC and GaN FETs with fast rise/fall times using external RG. |
| Input Supply Range | 3–20 V - compatible with 3.3 V, 5 V, and 15 V controller logic without level-shifting. |
| Operating Temperature | –40 to +125 °C - qualified per AEC-Q100 Grade 1 for under-hood automotive applications. |
| UVLO Thresholds | Configurable at 4, 8, 12, or 15 V - prevents erratic switching during brown-out by holding outputs low until stable supply is reached. |
Pinout & Package
Narrow-body 16-pin SOIC package (SOIC-16 NB) with creepage ≥8.3 mm and clearance ≥8.0 mm per IEC 60664-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input for Channel A | Accepts CMOS-level PWM or control signal; directly controls VOA with no inversion. |
| VIB | Non-inverting logic input for Channel B | Independent control of VOB; enables true dual-driver operation without cross-talk dependency. |
| EN | Active-high enable input | Drives both VOA and VOB low when deasserted; critical for system fault shutdown with <100 ns response. |
| DT | Dead time programming input | Resistor-to-GND sets dead time (10–110 kΩ → ~18–200 ns); tied to VDDI disables dead time for dual-driver mode. |
| VDDA / GNDA | Channel A gate driver supply and ground | 5–30 V isolated supply; powers high-side or low-side output stage independently. |
| VDDB / GNDB | Channel B gate driver supply and ground | Independent biasing allows asymmetric rail voltages (e.g., +15 V/–5 V) for enhanced gate control. |
| VDDI / GNDI | Logic input supply and ground | 3–20 V domain; galvanically isolated from gate supplies - eliminates ground loop coupling. |
| VOA / VOB | Gate driver A and B outputs | Voltage-source outputs with 6 A peak drive; support unipolar/bipolar configurations via external circuitry. |
Key Features
| Feature | Design Value |
|---|---|
| Voltage Mode Drive | Enables precise gate slew-rate control via external RG, balancing switching speed, EMI, and overshoot without complex current-loop compensation. |
| Programmable Dead Time | Resistor-set delay (18–200 ns typical) prevents shoot-through in half-bridge circuits while allowing overlap protection disable for dual-FET control. |
| Independent UVLO Monitoring | Separate lockout on VDDI, VDDA, and VDDB ensures safe output behavior even if only one supply fails - avoids partial conduction faults. |
| Thermal Shutdown with Hysteresis | Triggers at 150 °C (TSD+) and resets at 140 °C (TSD−); forces weak-low output during overtemperature to maintain fail-safe state. |
| Active Pull-Down Clamp | Internal clamp between VOA/VOB and GNDA/GNDB prevents parasitic turn-on when gate supplies are unpowered - eliminates need for external diodes. |
Applications
| Onboard Charger (OBC) | Industrial Motor Drive |
|---|---|
Use Scenario: Bidirectional AC/DC and DC/DC conversion in EV charging systems operating up to 100 kHz with SiC MOSFETs. IC Role / Device Role / Timing Role: Isolated gate driver for high-side/low-side half-bridge legs; manages dead time to prevent shoot-through during phase-shifted ZVS transitions. Use Value: 6 kVRMS isolation and 200 kV/µs CMTI ensure reliable operation across 1000 V DC bus transients; <5 ns skew enables tight PWM timing margins. |
Use Scenario: Field-oriented control (FOC) of 3-phase PMSM motors in HVAC compressors and industrial pumps. IC Role / Device Role / Timing Role: Dual-channel driver for inverter leg pairs; EN pin synchronizes emergency stop across all phases. Use Value: AEC-Q100 Grade 1 rating and –40 to +125 °C operation support extended lifetime in sealed motor enclosures; UVLO independence prevents single-supply faults from disabling full inverter. |
| Renewable Energy Inverter | Uninterruptible Power Supply (UPS) |
Use Scenario: Grid-tied solar inverters using 1200 V SiC modules with transformerless topologies. IC Role / Device Role / Timing Role: High-reliability isolated driver for DC-link chopper and H-bridge output stages; DT pin configured for adaptive dead time. Use Value: Reinforced insulation (VDE 60747-17, CSA 62368-1) satisfies double-insulation requirements for transformerless designs; 10 kV bipolar surge rating withstands lightning-induced surges. |
Use Scenario: Online double-conversion UPS delivering clean 230 VAC output with zero transfer time during mains failure. IC Role / Device Role / Timing Role: Gate driver for bidirectional IGBT/SiC switches in rectifier and inverter stages; DIS/EN used for coordinated soft-shutdown during battery switchover. Use Value: No unknown output states and guaranteed low outputs during UVLO ensure deterministic fail-safe behavior; 4 kV HBM ESD protects against handling damage in service environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated dual-channel gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8239BD-IS1R | Same pinout and package, but uses DISABLE (DIS) instead of ENABLE (EN) logic; identical isolation, skew, and drive specs. | Requires inverted control signal logic; not drop-in replaceable without firmware or PCB trace modification. | Select when system-level fault signaling is active-low and board layout already accommodates DIS-driven shutdown. |
| UCC5390SCDWR | TI part with 4 A peak drive, 100 kV/µs CMTI, and integrated Miller clamp; different SOIC-16 pinout and no DT pin for dead time programming. | Lacks programmable dead time and universal input flexibility; requires external dead time circuitry for half-bridge use. | Choose for cost-sensitive industrial drives where 4 A drive suffices and Miller clamping is prioritized over dead time tuning. |
Compared with SI82E39BEC-IS1R, Si8239BD-IS1R offers identical performance with inverted enable polarity, while UCC5390SCDWR trades dead time programmability and higher drive strength for integrated protection features and lower CMTI - making SI82E39BEC-IS1R optimal for high-noise, high-precision SiC/GaN systems demanding timing control and automotive reliability.
Availability
SI82E39BEC-IS1R is available at Aetrix Electronics and suitable for onboard chargers, industrial motor drives, renewable energy inverters, and uninterruptible power supplies requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant assurance.
Supply support for SI82E39BEC-IS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, isolation, and precision timing technologies.
The Si82Ex family was designed specifically for high-reliability isolated gate driving in automotive and industrial power electronics, leveraging proprietary capacitive isolation to replace aging optocoupler-based solutions with superior CMTI, longevity, and temperature stability.
FAQ
What is the isolation rating and safety certification status of the SI82E39BEC-IS1R?
The SI82E39BEC-IS1R provides 6 kVRMS one-minute isolation and is certified to UL 1577, VDE 60747-17 (reinforced), CSA 62368-1, and CQC GB4943.1. Its 1500 VRMS working voltage and 10 kV bipolar surge rating meet stringent requirements for automotive and industrial isolation barriers. These certifications are explicitly listed in the official Skyworks datasheet revision 206857C.
Does the SI82E39BEC-IS1R support both high-side/low-side and dual independent configurations?
Yes - the SI82E39BEC-IS1R is a universal-configuration device with independent VIA and VIB inputs, enabling either dual independent gate driving or high-side/low-side operation. When the DT pin is tied to VDDI, dead time and overlap protection are disabled, allowing pure dual-driver functionality. This flexibility is confirmed in Figures 2 and 13 of the SI82E29/SI82E39 datasheet.
What is the function of the EN pin on the SI82E39BEC-IS1R, and how does it behave during UVLO?
The EN pin is an active-high enable input that forces both VOA and VOB low when deasserted (logic low). During VDDI undervoltage lockout (VDDI ≤ 4 V), the EN pin is ignored and outputs remain low regardless of EN state. This behavior is documented in Table 2 (Si82E2x-3x Truth Table) and Section 4.4.2 of the datasheet.
Can the SI82E39BEC-IS1R drive SiC and GaN FETs effectively, and what design considerations apply?
Yes - the SI82E39BEC-IS1R delivers 6 A peak sourcing/sinking current and supports gate supply voltages up to 30 V, making it suitable for high-speed SiC and GaN FETs. Designers must select external gate resistors to manage dV/dt and EMI, leverage the DT pin for shoot-through prevention, and use the active pull-down clamp to avoid parasitic turn-on during bootstrap capacitor recharge cycles.
How is dead time programmed on the SI82E39BEC-IS1R, and what is the supported range?
Dead time is programmed by connecting a resistor (RDT) between the DT pin and GNDI. With RDT = 10–110 kΩ, typical dead time ranges from ~18 ns to ~200 ns, calculated per Equation 1 (tDT = 1.73 × RDT + 5.74). Placing a 0.1 µF ceramic capacitor in parallel improves noise immunity. This method and range are specified in Section 4.5 and Figure 18 of the datasheet.
SI82E39BEC-IS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
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SI82E39BEC-IS1R FAQ
1.How can I place an order for SI82E39BEC-IS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82E39BEC-IS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82E39BEC-IS1R reliable?
The price and inventory of SI82E39BEC-IS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82E39BEC-IS1R is usually 5 days.
3.What payment methods are accepted for SI82E39BEC-IS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82E39BEC-IS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82E39BEC-IS1R?
SI82E39BEC-IS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82E39BEC-IS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82E39BEC-IS1R?
For technical support, including SI82E39BEC-IS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82E39BEC-IS1R requirements.
6.How does Aetrix verify that SI82E39BEC-IS1R is sourced from the original manufacturer or authorized distributors?
All SI82E39BEC-IS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82E39BEC-IS1R meets industry standards.
7.What is the process for return or replacement of SI82E39BEC-IS1R?
All SI82E39BEC-IS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI82E39BEC-IS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82E39BEC-IS1R part is unused and in its original packaging.
Return procedure for SI82E39BEC-IS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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