Skyworks Solutions Inc. SI82E39BEE-IS3R
- Part No.:
- SI82E39BEE-IS3R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82E39BEE-IS3R.pdf
- Description:
- 6 KV 2-CHANNEL ISOLATED VALUE GA
- Quantity:
- Payment:

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Product details
Overview
SI82E39BEE-IS3R from Skyworks Solutions is a dual-channel isolated gate driver with 6 A peak output current, universal configuration (independent VIA/VIB inputs), and enable (EN) control logic. It delivers <5 ns channel-to-channel skew, 200 kV/µs CMTI, and 6 kVRMS reinforced isolation for driving SiC/GaN FETs in half-bridge topologies. Used in onboard chargers and motor drives requiring high noise immunity and shoot-through prevention.
For engineers reviewing the SI82E39BEE-IS3R datasheet, SI82E39BEE-IS3R pinout, SI82E39BEE-IS3R application, or SI82E39BEE-IS3R equivalent, key selection criteria include its NB SOIC-16 package, EN-based enable functionality, programmable dead time via DT pin, UVLO thresholds at 4/8/12/15 V, and compatibility with 3–20 V input supply and 5–30 V gate supply rails.
Technical Context
The SI82E39BEE-IS3R implements capacitive silicon-dioxide (SiO₂) isolation with differential RF-modulated OOK signaling between input and outputs, enabling robust timing performance and fault tolerance. Its universal configuration supports independent high-side/low-side control without fixed PWM pairing.
It integrates CMOS Schmitt-triggered inputs with deglitch filtering, voltage-mode drive outputs with external gate resistor tuning, and independent UVLO monitoring on VDDI, VDDA, and VDDB. Thermal shutdown (TSD+ = 150 °C) and active shutdown clamps prevent parasitic turn-on during unpowered states.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 6 kVRMS for 1 minute - meets UL 1577, VDE 60747-17, and CSA 62368-1 reinforced insulation requirements. |
| Channel-to-Channel Skew | <5 ns - ensures precise timing alignment between VOA and VOB transitions in half-bridge switching. |
| CMTI | >200 kV/µs - prevents false triggering under fast transient common-mode noise in high-dv/dt power stages. |
| Peak Output Current | 6 A sourcing/sinking - drives high-gate-charge SiC and GaN FETs with low propagation delay (typ. 40 ns). |
| Input Supply Range | 3–20 V - compatible with 3.3 V, 5 V, and 15 V controller logic without level-shifting. |
| Gate Supply Range | 5–30 V - supports bipolar gate biasing (e.g., +15 V/–5 V) and wide-range bootstrap operation. |
| UVLO Thresholds | 4 V, 8 V, 12 V, or 15 V - configurable per device variant to match gate driver supply stability margins. |
| Operating Temperature | –40 to +125 °C - qualified to AEC-Q100 Grade 1 for automotive powertrain and charging systems. |
Pinout & Package
Narrow-body 16-pin SOIC (NB SOIC-16) package with creepage ≥8.3 mm and clearance ≥8.0 mm per IEC 60664-1. Reinforced isolation barrier separates input (VDDI/GNDI) and output (VDDA/GNDA/VDDB/GNDB) sides.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input for channel A | Directly controls VOA output state; accepts CMOS-level signals with deglitch filter option. |
| VIB | Non-inverting logic input for channel B | Directly controls VOB output state; enables independent high-side/low-side gate timing. |
| EN | Active-high enable input | When low, forces both VOA and VOB low regardless of VIA/VIB; resumes operation within tEID after rising edge. |
| DT | Dead time programming terminal | Resistor-to-GND sets dead time (10–110 kΩ → ~18–210 ns); tied to VDDI disables dead time for dual-driver mode. |
| VDDA / GNDA | Channel A gate driver supply and ground | Provides isolated 5–30 V power to drive high-side FET; supports bootstrap or isolated supply configurations. |
| VDDB / GNDB | Channel B gate driver supply and ground | Independent 5–30 V rail for low-side FET; enables asymmetric gate biasing (e.g., +15 V/–5 V). |
| VOA / VOB | High-current gate drive outputs | Voltage-mode outputs delivering ±6 A peak; clamp to VDDA/VDDB during short-circuit events. |
| VDDI / GNDI | Logic input supply and ground | 3–20 V domain powering CMOS inputs; UVLO monitoring prevents erratic behavior during brownout. |
Key Features
| Feature | Design Value |
|---|---|
| Universal pinout with EN control | Supports independent VIA/VIB inputs and EN-based system-level fault shutdown - no fixed PWM dependency. |
| Programmable dead time & overlap protection | Resistor-set dead time (18–210 ns) plus automatic shoot-through prevention when both inputs go high simultaneously. |
| Voltage-mode drive architecture | Enables precise gate slew rate control via external Rg resistors - critical for EMI reduction and SiC/GaN switching optimization. |
| Robust isolation safety certifications | UL, VDE, CSA, and CQC approvals for reinforced insulation - validated for 1500 VRMS working voltage and 10 kV bipolar surge. |
| AEC-Q100 Grade 1 qualification | Validated for automotive applications including onboard chargers and traction inverters operating from –40 to +125 °C. |
| Integrated shutdown clamp | Active pull-down to GNDA/GNDB during VDDA/VDDB undervoltage prevents parasitic FET turn-on in unpowered states. |
Applications
| Onboard Chargers (OBC) | Motor Drives |
|---|---|
Use Scenario: Bidirectional AC/DC and DC/DC conversion in EV charging systems with SiC MOSFETs. IC Role / Device Role / Timing Role: Isolated dual gate driver controlling high-side/low-side half-bridge switches with programmable dead time to prevent shoot-through during phase transitions. Use Value: 6 kVRMS isolation and 200 kV/µs CMTI ensure reliable operation in noisy 800 V battery domains; EN pin enables immediate fault shutdown during overcurrent events. |
Use Scenario: Field-oriented control (FOC) of PMSM/BLDC motors in industrial automation and e-mobility. IC Role / Device Role / Timing Role: Dual-channel isolated driver delivering matched timing (<5 ns skew) to upper/lower IGBTs in three-phase inverter legs. Use Value: Independent UVLO on VDDA/VDDB prevents partial conduction during rail imbalance; thermal shutdown (150 °C) protects against overload-induced failure. |
| Power Inverters | Uninterruptible Power Supplies (UPS) |
Use Scenario: Grid-tied solar inverters using SiC FETs for high-efficiency MPPT and reactive power control. IC Role / Device Role / Timing Role: Universal-configured driver supporting flexible gate timing for asymmetrical modulation schemes and soft-switching topologies. Use Value: Voltage-mode drive allows fine-tuned dV/dt control to meet CISPR-11 Class B emissions limits; 16-pin SOIC footprint simplifies layout in space-constrained designs. |
Use Scenario: Online double-conversion UPS systems requiring fast transfer switching and battery backup integrity. IC Role / Device Role / Timing Role: Isolated gate driver for bidirectional buck-boost converters managing battery charge/discharge cycles. Use Value: AEC-Q100 qualification ensures long-term reliability under continuous thermal cycling; 4 kV HBM ESD rating withstands handling in production environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SIL1225ED-IS3R | Single-input PWM architecture; no VIA/VIB independence; fixed dead time only (no DT pin). | Limited to standard half-bridge control; cannot support independent high-side/low-side timing or custom dead time. | Select when system uses single PWM signal and requires lower cost; not suitable for universal or asymmetric drive needs. |
| UCC5390SCDR | TI part with 10 A peak drive, but only 3.75 kVRMS isolation and no AEC-Q100 qualification. | Not certified for automotive use; lower CMTI (100 kV/µs) limits suitability in high-noise SiC inverter applications. | Consider for industrial UPS where higher drive strength is needed but automotive compliance is unnecessary. |
Compared with SIL1225ED-IS3R and UCC5390SCDR, SI82E39BEE-IS3R uniquely combines universal input flexibility, AEC-Q100 qualification, 6 kVRMS isolation, and programmable dead time - making it optimal for next-generation EV chargers and automotive inverters demanding functional safety and layout adaptability.
Availability
SI82E39BEE-IS3R is available at Aetrix Electronics and suitable for onboard chargers, motor drives, and uninterruptible power supplies requiring stable component supply, automotive-grade reliability, and reinforced isolation certification.
Supply support for SI82E39BEE-IS3R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, isolation, and timing technologies.
The Si82Ex family was designed specifically for high-reliability isolated gate driving in automotive, industrial, and energy infrastructure applications - emphasizing CMTI resilience, safety certification, and SiC/GaN compatibility.
FAQ
What is the isolation voltage rating of the SI82E39BEE-IS3R?
The SI82E39BEE-IS3R is rated for 6 kVRMS isolation for one minute per UL 1577, with 1500 VRMS working voltage and 10 kV bipolar surge capability. This reinforced insulation meets VDE 60747-17, CSA 62368-1, and CQC GB4943.1 standards - essential for automotive and industrial safety-critical systems. SI82E39BEE-IS3R achieves this using dual SiO₂ capacitors with differential RF modulation.
Does the SI82E39BEE-IS3R support both high-side and low-side gate driving in a half-bridge?
Yes, the SI82E39BEE-IS3R supports high-side and low-side gate driving in half-bridge configurations via its universal pinout with independent VIA and VIB inputs. It provides separate VDDA/GNDA and VDDB/GNDB supplies, enabling asymmetric gate biasing (e.g., +15 V/–5 V). SI82E39BEE-IS3R also includes overlap protection and programmable dead time to prevent shoot-through during switching transitions.
What is the function of the DT pin on the SI82E39BEE-IS3R?
The DT pin on the SI82E39BEE-IS3R programs dead time between VOA and VOB transitions using an external resistor to GND (10–110 kΩ → 18–210 ns typical). Connecting DT to VDDI disables dead time and overlap protection, allowing SI82E39BEE-IS3R to operate as a dual independent driver. This flexibility supports both half-bridge and dual-switch topologies without hardware redesign.
Is the SI82E39BEE-IS3R qualified for automotive applications?
Yes, the SI82E39BEE-IS3R is AEC-Q100 Grade 1 qualified (–40 to +125 °C) and built using automotive-specific manufacturing flows. It includes thermal shutdown (TSD+ = 150 °C), robust ESD protection (4 kV HBM), and reinforced isolation certifications required for onboard chargers, traction inverters, and DC-DC converters in EV platforms. SI82E39BEE-IS3R meets ISO 26262 readiness requirements for ASIL-B system integration.
How does the EN pin affect the output behavior of the SI82E39BEE-IS3R?
The EN pin on the SI82E39BEE-IS3R is an active-high enable signal: when pulled low, it unconditionally forces both VOA and VOB to logic low regardless of VIA/VIB states, providing fast system-level fault shutdown. Operation resumes within tEID (~100 ns) after EN rises above VIH. SI82E39BEE-IS3R maintains this behavior even if VDDI is in UVLO, ensuring deterministic fail-safe operation in safety-critical designs.
SI82E39BEE-IS3R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82E39BEE-IS3R FAQ
1.How can I place an order for SI82E39BEE-IS3R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82E39BEE-IS3R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82E39BEE-IS3R reliable?
The price and inventory of SI82E39BEE-IS3R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82E39BEE-IS3R is usually 5 days.
3.What payment methods are accepted for SI82E39BEE-IS3R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82E39BEE-IS3R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82E39BEE-IS3R?
SI82E39BEE-IS3R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82E39BEE-IS3R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82E39BEE-IS3R?
For technical support, including SI82E39BEE-IS3R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82E39BEE-IS3R requirements.
6.How does Aetrix verify that SI82E39BEE-IS3R is sourced from the original manufacturer or authorized distributors?
All SI82E39BEE-IS3R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82E39BEE-IS3R meets industry standards.
7.What is the process for return or replacement of SI82E39BEE-IS3R?
All SI82E39BEE-IS3R units undergo pre-shipment inspection (PSI). If there is an issue with SI82E39BEE-IS3R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82E39BEE-IS3R part is unused and in its original packaging.
Return procedure for SI82E39BEE-IS3R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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