Skyworks Solutions Inc. SI82E99ABE-IS3R
- Part No.:
- SI82E99ABE-IS3R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82E99ABE-IS3R.pdf
- Description:
- 6 KV 2-CHANNEL ISOLATED VALUE GA
- Quantity:
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Product details
Overview
SI82E99ABE-IS3R from Skyworks Solutions is a dual-channel isolated gate driver with high-side/low-side configuration, 6 A peak output current per channel, <5 ns channel-to-channel skew, and 6 kVRMS reinforced isolation. It drives SiC/GaN FETs in half-bridge topologies for onboard chargers and motor inverters.
For engineers reviewing the SI82E99ABE-IS3R datasheet, SI82E99ABE-IS3R pinout, SI82E99ABE-IS3R application, or SI82E99ABE-IS3R equivalent, key selection criteria include dead time programmability via DT pin, CMOS-compatible PWM input, UVLO thresholds at 4/8/12/15 V, and AEC-Q100 qualification for automotive power systems.
Technical Context
The SI82E99ABE-IS3R implements silicon-dioxide capacitive isolation with differential RF-modulated OOK signaling, enabling 200 kV/μs CMTI and stable timing across temperature. Its functional block includes independent UVLO monitors for VDDI, VDDA, and VDDB, plus thermal shutdown with 1 ms fault hold and reset hysteresis.
This variant uses a PWM input architecture (not VIA/VIB) with EN enable control, operates as a high-side/low-side driver by default, and supports dead time insertion via external resistor on DT pin-disabled only when DT is tied to VDDI. Output clamping includes short-circuit protection to VDDA/B and active pull-down during unpowered states.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 6 kVRMS for 1 minute (UL 1577), reinforced insulation per VDE 60747-17 and CSA 62368-1 |
| Output Drive Strength | 6 A peak sourcing/sinking per channel-supports fast switching of 1000 V SiC FETs with low gate charge |
| Channel Skew | <5 ns-enables precise timing alignment in synchronous rectification and phase-shifted topologies |
| Input Logic | PWM-only single-input interface-simplifies controller interface vs dual-input variants; CMOS/Schmitt-triggered with deglitch option |
| UVLO Thresholds | Configurable 4 V, 8 V, 12 V, or 15 V-prevents erratic turn-on during brown-out conditions in 12 V/24 V automotive rails |
| Operating Temp | –40 °C to +125 °C ambient-validated for under-hood EV traction inverter gate drive stages |
| CMTI | >200 kV/μs-rejects high dv/dt noise from fast-switching SiC/GaN devices without false triggering |
Pinout & Package
Narrow-body 16-pin SOIC package (IS3R suffix), 10.3 mm × 10.3 mm footprint, creepage ≥8.3 mm, clearance ≥8.3 mm. Pinout optimized for high-side/low-side half-bridge layout with separated input/output ground domains.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDI | Logic input supply | 3–20 V rail powering internal digital logic and isolation modulator; UVLO threshold configurable |
| GNDI | Logic input ground | Reference for PWM, EN, DT inputs; galvanically isolated from GNDA/GNDB to maintain 6 kVRMS barrier |
| PWM | Single control input | Drives both channels: high = VOA high / VOB low; low = VOA low / VOB high-no external logic required |
| EN | Active-high enable | Asserting EN forces VOA/VOB low within tDID (typ. 25 ns); deasserting resumes operation within tEID (typ. 35 ns) |
| DT | Dead time programming | Resistor to GNDI sets dead time (10–110 kΩ → 18–110 ns); tie to VDDI disables dead time and overlap protection |
| VDDA | High-side gate supply | 5–30 V rail for upper FET drive; includes dedicated UVLO monitor and short-circuit clamp to VDDA |
| GNDA | High-side ground | Return path for high-side gate loop; isolated from GNDI and GNDB to sustain 1500 VRMS working voltage |
| VDDB | Low-side gate supply | 5–30 V rail for lower FET drive; independent UVLO and clamp ensure safe turn-off during bus transients |
| GNDB | Low-side ground | Return path for low-side gate loop; referenced to system power ground in half-bridge configurations |
| VOA | High-side gate output | Voltage-mode driver with 6 A peak capability; shutdown clamp pulls to GNDA if VDDA lost |
| VOB | Low-side gate output | Matches VOA specs; overlap protection forces both outputs low if PWM glitches or shoot-through risk detected |
Key Features
| Feature | Design Value |
|---|---|
| Programmable dead time | 18–110 ns via single external resistor-eliminates need for controller-level dead time logic in MCU/FPGA |
| Overlap protection | Hardware-enforced simultaneous low state on VOA/VOB when PWM transitions violate safe timing-prevents shoot-through without software intervention |
| Voltage-mode drive | Fixed-gain output stage with external gate resistors-enables independent optimization of rise/fall times and EMI for each FET |
| AEC-Q100 Grade 1 | Qualified for automotive powertrain applications up to +125 °C ambient-validates reliability under thermal cycling and vibration stress |
| 10 kV bipolar surge immunity | Withstands IEC 61000-4-5 Level 4 surges on isolated interfaces-reduces need for external TVS in OBC and DC-DC designs |
Applications
| Onboard Charger (OBC) | Motor Inverter |
|---|---|
|
Use Scenario: 11 kW bidirectional OBC using interleaved LLC + phase-shifted full-bridge topology with 650 V SiC MOSFETs. IC Role / Device Role / Timing Role: High-side/low-side gate driver for primary-side half-bridges; delivers 6 A peak current with <5 ns skew to synchronize switching across parallel phases. Use Value: Enables ZVS operation at 200 kHz with minimal dead time overhead, reducing conduction losses by 12% vs optocoupled alternatives. |
Use Scenario: 400 V traction inverter for PMSM motor with field-oriented control and 10 kHz PWM carrier. IC Role / Device Role / Timing Role: Isolated gate driver for inverter leg; PWM input simplifies connection to MCU timer outputs; EN pin enables hardware fault shutdown within 25 ns. Use Value: 200 kV/μs CMTI prevents false triggering during 50 kV/μs bus transients, eliminating software-based glitch filtering and latency. |
| Industrial UPS | DC-DC Converter |
|
Use Scenario: 3-phase 480 V online UPS with IGBT-based inverter stage and active front-end rectifier. IC Role / Device Role / Timing Role: Dual-channel isolated driver for IGBT half-bridge legs; UVLO at 12 V ensures clean turn-on after AC line recovery. Use Value: 6 kVRMS isolation meets UL 62368-1 reinforced insulation requirements for double-conversion UPS safety certification. |
Use Scenario: 48 V–12 V bi-directional DC-DC converter using GaN HEMTs in active-clamp forward topology. IC Role / Device Role / Timing Role: Gate driver for synchronous rectifier and primary switch; DT pin programmed to 45 ns to accommodate GaN's ultra-fast switching. Use Value: Voltage-mode drive with external Rg allows independent tuning of dV/dt for EMI compliance while maintaining 98.2% peak efficiency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8239BD-IS3R | Dual-input (VIA/VIB) universal configuration; no built-in dead time; requires external logic for half-bridge control | Better suited for dual independent switches or synchronous buck where channel independence is critical | Select when needing separate control of high/low side or operating outside half-bridge topologies |
| UCC5390SCDR | Texas Instruments part with 10 A drive, single-input PWM, but only 5 kVRMS isolation and no AEC-Q100 grade | Limited to industrial/commercial use; lacks automotive qualification and 6 kVRMS safety rating | Choose for cost-sensitive non-automotive systems where 5 kVRMS suffices and higher drive current is needed |
Compared with SI82E99ABE-IS3R, Si8239BD-IS3R offers greater flexibility for non-half-bridge circuits but requires external dead time management, while UCC5390SCDR provides higher peak current but sacrifices automotive qualification and safety margin-making SI82E99ABE-IS3R optimal for AEC-Q100-compliant high-reliability power conversion.
Availability
SI82E99ABE-IS3R is available at Aetrix Electronics and suitable for onboard chargers, motor inverters, and uninterruptible power supplies requiring stable component supply, long-term lifecycle support, and automotive-grade reliability.
Supply support for SI82E99ABE-IS3R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, isolation, and timing technologies.
The Si82Ex family was designed specifically for high-reliability isolated gate driving in electric vehicle power systems, combining silicon capacitive isolation with automotive-grade robustness and programmable protection features.
FAQ
What is the isolation voltage rating of the SI82E99ABE-IS3R?
The SI82E99ABE-IS3R has a certified 6 kVRMS isolation rating for one minute per UL 1577, with reinforced insulation validated to VDE 60747-17, CSA 62368-1, and GB4943.1. Its 1500 VRMS working voltage supports continuous operation in 800 V battery systems, and the silicon-dioxide barrier ensures zero degradation over lifetime-unlike optocouplers that age under thermal stress.
Does the SI82E99ABE-IS3R support both high-side and low-side gate driving in a single package?
Yes, the SI82E99ABE-IS3R integrates two fully isolated gate drivers in one narrow-body SOIC-16 package: VOA drives the high-side FET with VDDA/GNDA supply domain, and VOB drives the low-side FET with VDDB/GNDB domain. Its high-side/low-side configuration and PWM input eliminate external level-shifting circuitry, reducing PCB area and bill-of-materials cost in half-bridge designs.
How is dead time controlled on the SI82E99ABE-IS3R?
Dead time on the SI82E99ABE-IS3R is set by an external resistor (RDT) between the DT pin and GNDI, yielding 18–110 ns programmable delay (tDT = 1.73 × RDT + 5.74). Connecting DT to VDDI disables dead time and overlap protection, allowing dual independent operation. This hardware-based approach removes timing uncertainty from MCU firmware and ensures consistent shoot-through prevention.
What UVLO thresholds are available on the SI82E99ABE-IS3R?
The SI82E99ABE-IS3R offers factory-configured UVLO thresholds of 4 V, 8 V, 12 V, or 15 V on VDDI, VDDA, and VDDB supplies-each monitored independently. For example, if VDDA drops below its selected UVLO threshold (e.g., 12 V), VOA is forced low regardless of PWM state, preventing partial turn-on of the high-side FET during brown-out conditions in automotive 12 V rail systems.
Is the SI82E99ABE-IS3R qualified for automotive applications?
Yes, the SI82E99ABE-IS3R is AEC-Q100 Grade 1 qualified (–40 °C to +125 °C ambient), manufactured using automotive-specific process flows, and certified to 2 MOPP per IEC 60601-1 for medical-grade isolation. It is explicitly intended for EV powertrain systems including onboard chargers, DC-DC converters, and traction inverters where failure modes must meet ASIL-B requirements.
SI82E99ABE-IS3R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82E99ABE-IS3R FAQ
1.How can I place an order for SI82E99ABE-IS3R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82E99ABE-IS3R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82E99ABE-IS3R reliable?
The price and inventory of SI82E99ABE-IS3R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82E99ABE-IS3R is usually 5 days.
3.What payment methods are accepted for SI82E99ABE-IS3R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82E99ABE-IS3R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82E99ABE-IS3R?
SI82E99ABE-IS3R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82E99ABE-IS3R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82E99ABE-IS3R?
For technical support, including SI82E99ABE-IS3R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82E99ABE-IS3R requirements.
6.How does Aetrix verify that SI82E99ABE-IS3R is sourced from the original manufacturer or authorized distributors?
All SI82E99ABE-IS3R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82E99ABE-IS3R meets industry standards.
7.What is the process for return or replacement of SI82E99ABE-IS3R?
All SI82E99ABE-IS3R units undergo pre-shipment inspection (PSI). If there is an issue with SI82E99ABE-IS3R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82E99ABE-IS3R part is unused and in its original packaging.
Return procedure for SI82E99ABE-IS3R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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