Skyworks Solutions Inc. SI82E99AGC-IS1R
- Part No.:
- SI82E99AGC-IS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82E99AGC-IS1R.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED VALUE
- Quantity:
- Payment:

- Shipping:

Inventory:1,379
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI82E99AGC-IS1R from Skyworks Solutions is a dual-channel isolated gate driver with high-side/low-side configuration, 6 A peak output drive strength, <5 ns channel-to-channel skew, and 6 kVRMS reinforced isolation. It operates with 3–20 V logic supply and 5–30 V gate supply, and is qualified to AEC-Q100 for automotive-grade motor drives and onboard chargers.
For engineers reviewing the SI82E99AGC-IS1R datasheet, SI82E99AGC-IS1R pinout, SI82E99AGC-IS1R application, or SI82E99AGC-IS1R equivalent, key selection criteria include its programmable dead time control via DT pin, UVLO thresholds (4/8/12/15 V options), voltage-mode drive architecture, and compatibility with SiC/GaN FETs in half-bridge topologies requiring shoot-through prevention.
Technical Context
The SI82E99AGC-IS1R implements a high-side/low-side configuration using capacitive silicon dioxide (SiO₂) isolation with RF-modulated OOK signaling, delivering 200 kV/μs CMTI and stable timing across –40 to +125 °C. Its dual independent gate drivers feature separate VDDA/GNDA and VDDB/GNDB supplies, enabling asymmetric bootstrap or isolated power architectures.
It uses a PWM input architecture (not dual independent VIA/VIB), with EN enable control and DT pin-based dead time programming (10–110 kΩ resistor sets 17.3–190 ns typical delay). The device enforces overlap protection-simultaneous high inputs force both outputs low-and includes integrated shutdown clamp and thermal shutdown at TSD+ = 150 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 6 kVRMS for 1 minute (UL 1577), reinforced insulation per IEC 62368-1 & IEC 60747-17 |
| Channel-to-Channel Skew | <5 ns - ensures precise timing alignment between high-side and low-side gate signals in half-bridge switching |
| Peak Output Drive Current | 6 A sourcing/sinking - supports fast turn-on/turn-off of high-capacitance SiC and GaN FETs |
| CMTI | >200 kV/μs - maintains signal integrity in noisy high-dV/dt environments like inverters and motor drives |
| Logic Input Supply Range | 3–20 V - compatible with 3.3 V, 5 V, and 15 V controller interfaces without level-shifting |
| Gate Supply Voltage Range | 5–30 V - enables flexible biasing for 12 V or 15 V gate drive, including bootstrap operation |
| UVLO Threshold Options | 4 V / 8 V / 12 V / 15 V - configurable per variant to match specific FET threshold and system startup behavior |
| Operating Temperature | –40 to +125 °C - meets automotive under-hood and industrial power-conversion requirements |
Pinout & Package
Narrow-body 16-pin SOIC package (SOIC-16 NB) with creepage-enhanced layout for reinforced isolation. Pinout optimized for high-side/low-side half-bridge control with dedicated PWM, EN, DT, and dual gate supply domains.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDI | Logic input power supply | Supplies isolated digital side; must be ≥3 V to exit UVLO and enable operation |
| GNDI | Logic input ground | Reference for all digital inputs; galvanically isolated from GNDA/GNDB |
| PWM | Single-input control signal | Drives VOA high / VOB low when high; VOA low / VOB high when low - simplifies controller interface |
| EN | Active-high enable | Asserting high enables normal operation; deasserting low forces VOA/VOB low unconditionally |
| DT | Dead time programming input | Resistor to GNDI sets dead time (17–190 ns); connection to VDDI disables dead time and overlap protection |
| VDDA | High-side gate driver supply | Power source for VOA output; supports bootstrap or isolated supply up to 30 V |
| GNDA | High-side gate driver ground | Return path for high-side output; referenced to source of high-side FET |
| VDDB | Low-side gate driver supply | Power source for VOB output; typically tied to system ground-referenced rail |
| GNDB | Low-side gate driver ground | Return path for low-side output; common with system power ground |
| VOA | High-side gate driver output | Voltage-mode output driving high-side FET gate; includes short-circuit clamp to VDDA |
| VOB | Low-side gate driver output | Voltage-mode output driving low-side FET gate; includes shutdown clamp to GNDB when unpowered |
| NC | No-connect terminal | Pin 11, 12, 13 - must remain unconnected; no internal bond or function |
Key Features
| Feature | Design Value |
|---|---|
| Voltage Mode Drive | Enables predictable gate current control via external resistors - eliminates need for complex current-source design |
| Programmable Dead Time | Resistor-tuned (10–110 kΩ) dead time insertion prevents shoot-through in half-bridge without external logic |
| Overlap Protection | Hardware-enforced immediate low-state on both outputs if PWM and EN are simultaneously asserted - failsafe against controller faults |
| Integrated Shutdown Clamp | Active pull-down to GNDA/GNDB when VDDA/VDDB is unpowered - prevents parasitic FET turn-on during power sequencing |
| AEC-Q100 Qualified | Automotive-grade qualification across temperature, lifetime, and defectivity - validated for EV traction inverters and OBCs |
| 1500 VRMS Working Voltage | Rated for continuous operation at 1500 VRMS - supports 800 V DC bus systems with margin for transients |
Applications
| Motor Drives | Onboard Chargers (OBC) |
|---|---|
|
Use Scenario: Three-phase inverter controlling PMSM or induction motors in electric power steering or HVAC compressors. IC Role / Device Role / Timing Role: High-side/low-side gate driver providing isolated, synchronized PWM outputs with programmable dead time to prevent shoot-through in IGBT/SiC half-bridges. Use Value: Enables >20 kHz switching with <5 ns skew and 200 kV/μs CMTI - critical for torque ripple reduction and EMI compliance in compact motor modules. |
Use Scenario: Bidirectional AC/DC and DC/DC conversion in EV onboard chargers handling 11 kW or 22 kW power levels. IC Role / Device Role / Timing Role: Isolated gate driver for active rectifier and DC-link inverter stages, interfacing with MCU-based PWM controllers. Use Value: 6 kVRMS isolation and AEC-Q100 qualification ensure safety and reliability across 1000+ thermal cycles in under-hood environments. |
| Power Inverters | Uninterruptible Power Supplies (UPS) |
|
Use Scenario: Grid-tied solar inverters or energy storage system (ESS) inverters operating at 1000 V DC bus with SiC MOSFETs. IC Role / Device Role / Timing Role: Dual-channel isolated driver managing high-side/low-side switching with UVLO monitoring per rail to prevent partial conduction during brownouts. Use Value: Independent VDDA/VDDB UVLO (4/8/12/15 V options) allows tailored gate drive disable thresholds matching SiC FET gate thresholds and system fault response. |
Use Scenario: Online double-conversion UPS systems requiring fast transfer, high efficiency, and galvanic isolation between utility and battery domains. IC Role / Device Role / Timing Role: Gate driver for inverter stage converting battery DC to clean AC output, with EN pin enabling rapid system shutdown during overload or overtemperature. Use Value: Integrated thermal shutdown (TSD+ = 150 °C) and shutdown clamp ensure fail-safe gate control during sustained overload conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-side/low-side isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Silicon Labs SI8239AD-D-IS1R | Same Si82Ex family, but with DIS (disable) instead of EN (enable) control logic; identical pinout and specs otherwise | Requires inverted enable logic from controller; suitable where fault-handling mandates active-high disable rather than active-high enable | Select SI82E99AGC-IS1R when controller provides active-high enable signal; choose SI8239AD-D-IS1R only if existing firmware or safety architecture relies on active-high disable assertion |
| TI UCC5390SCDWR | 3.3–15 V logic supply (narrower range), 4 A peak drive (lower than 6 A), 5 kVRMS isolation, no programmable dead time - uses internal fixed dead time | Lacks resistor-programmable DT; requires external dead time circuitry or controller-level dead time insertion for shoot-through prevention | Prefer SI82E99AGC-IS1R for designs needing precise, adjustable dead time and higher 6 A drive for SiC/GaN; use UCC5390SCDWR only in cost-sensitive, lower-power (<3 kW) applications with fixed dead time tolerance |
Compared with SI8239AD-D-IS1R, SI82E99AGC-IS1R offers identical isolation, drive strength, and timing performance but differs in control logic polarity - making it directly substitutable only when the host controller supports active-high enable. Against UCC5390SCDWR, SI82E99AGC-IS1R delivers superior drive capability, wider supply flexibility, and hardware-programmable dead time - reducing firmware complexity and improving robustness in high-reliability power systems.
Availability
SI82E99AGC-IS1R is available at Aetrix Electronics and suitable for automotive onboard chargers, industrial motor drives, and grid-tied inverters requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant isolation performance.
Supply support for SI82E99AGC-IS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for automotive, industrial, and infrastructure markets.
The Si82Ex family-including SI82E99AGC-IS1R-is designed specifically for high-reliability isolated gate driving in high-voltage power conversion, emphasizing CMTI resilience, AEC-Q100 qualification, and flexible configuration for SiC/GaN adoption.
FAQ
What is the isolation architecture used in the SI82E99AGC-IS1R?
The SI82E99AGC-IS1R employs capacitive silicon dioxide (SiO₂) isolation with RF-modulated OOK signaling across two differential high-voltage capacitors. This architecture achieves 6 kVRMS reinforced isolation per UL 1577, 200 kV/μs CMTI, and minimal propagation delay variation over temperature and lifetime - distinguishing it from optocoupler-based alternatives.
Does the SI82E99AGC-IS1R support both bootstrap and isolated gate supply configurations?
Yes, the SI82E99AGC-IS1R supports both configurations. VDDA (high-side supply) can be powered via an isolated DC/DC converter or through a bootstrap circuit using VDDB (low-side supply), diode, and capacitor. GNDA is referenced to the high-side FET source, enabling direct integration into half-bridge layouts without additional level-shifting components.
How is dead time programmed on the SI82E99AGC-IS1R, and what is its range?
Dead time on the SI82E99AGC-IS1R is programmed by connecting a resistor (RDT) between the DT pin and GNDI. With RDT = 10–110 kΩ, typical dead time ranges from 17.3 ns to 190 ns per Equation 1 (tDT = 1.73 × RDT + 5.74). Connecting DT to VDDI disables dead time and overlap protection, reconfiguring the device as a dual independent driver.
What UVLO thresholds are implemented in the SI82E99AGC-IS1R?
The SI82E99AGC-IS1R features factory-configured UVLO thresholds: 4 V, 8 V, 12 V, or 15 V on VDDI, and matching thresholds on VDDA and VDDB. These are selected at manufacture and cannot be adjusted externally. The specific threshold for this part is defined in its ordering code and matches typical SiC FET gate drive requirements for reliable turn-off during brownout conditions.
Is the SI82E99AGC-IS1R pin-compatible with other Si82Ex variants like SI82E29 or SI82E89?
No - SI82E99AGC-IS1R is not pin-compatible with SI82E29 or SI82E89. While all share the same SOIC-16 NB package footprint, their pin functions differ: SI82E99 uses PWM + EN inputs, whereas SI82E29 uses VIA + VIB + DIS, and SI82E89 uses PWM + DIS. Substitution requires PCB layout revision and firmware adaptation to match input logic and pin assignments.
SI82E99AGC-IS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82E99AGC-IS1R FAQ
1.How can I place an order for SI82E99AGC-IS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82E99AGC-IS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82E99AGC-IS1R reliable?
The price and inventory of SI82E99AGC-IS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82E99AGC-IS1R is usually 5 days.
3.What payment methods are accepted for SI82E99AGC-IS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82E99AGC-IS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82E99AGC-IS1R?
SI82E99AGC-IS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82E99AGC-IS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82E99AGC-IS1R?
For technical support, including SI82E99AGC-IS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82E99AGC-IS1R requirements.
6.How does Aetrix verify that SI82E99AGC-IS1R is sourced from the original manufacturer or authorized distributors?
All SI82E99AGC-IS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82E99AGC-IS1R meets industry standards.
7.What is the process for return or replacement of SI82E99AGC-IS1R?
All SI82E99AGC-IS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI82E99AGC-IS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82E99AGC-IS1R part is unused and in its original packaging.
Return procedure for SI82E99AGC-IS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI82E99AGC-IS1R Tags
-
TLP152(TPL,E
Toshiba Semiconductor and Storage

-
HT0740LG-G
Microchip Technology

-
FOD8314TR2
onsemi

-
1EDI60N12AFXUMA1
Infineon Technologies

-
1EDB7275FXUMA1
Infineon Technologies

-
UCC5350MCDR
Texas Instruments

-
2EDB7259KXUMA1
Infineon Technologies

-
UCC5304DWVR
Texas Instruments

-
SI8261BBC-C-ISR
Skyworks Solutions Inc.

-
HT0440LG-G
Microchip Technology

-
HCPL-0302-500E
Broadcom Limited

-
STGAP2HSCMTR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
