My Inquiry
My Account
Skyworks Solutions Inc. SI82F29ABC-IS1R
- Part No.:
- SI82F29ABC-IS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82F29ABC-IS1R.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED SELVC
- Quantity:
- Payment:
- Shipping:
Inventory:4,554
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI82F29ABC-IS1R from Skyworks Solutions is a dual-channel isolated gate driver in narrow-body 16-pin SOIC package, configured as a universal (independent input) driver with disable (DIS) control, 8-V UVLO, and SelVCD™ current-source outputs. It delivers ≤5 ns channel-to-channel skew, 200 kV/μs CMTI, and 6 kVRMS isolation for driving SiC/GaN FETs in half-bridge motor inverters.
For engineers reviewing the SI82F29ABC-IS1R datasheet, SI82F29ABC-IS1R pinout, SI82F29ABC-IS1R application, or SI82F29ABC-IS1R equivalent, this page provides verified functional identity, validated pin roles, confirmed SelVCD™ current levels, exact UVLO threshold, and real-world dead time behavior - all extracted from Skyworks' May 2024 preliminary datasheet.
Technical Context
The SI82F29ABC-IS1R implements dual independent CMOS inputs (VIA/VIB) with DIS-controlled shutdown, enabling asynchronous high-side/low-side switching without shoot-through risk. Its digital capacitive isolation uses differential RF-modulated OOK signaling across duplicated SiO₂ barriers, delivering stable timing across temperature and life cycle.
It integrates programmable dead time via external resistor on DT pin (10–110 kΩ), Miller clamp triggered at VMCTA/B voltage thresholds, and eight-level SelVCD™ sourcing/sinking current control via SPD+/SPD− analog voltage inputs - all operating under 3–20 V logic supply and 5–30 V gate supply rails.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 6 kVRMS for 1 minute - certified reinforced insulation per UL 1577, VDE 60747-17, CSA 62368-1 |
| Channel Skew | <5 ns - enables precise timing alignment between VOA and VOB in high-frequency power stages |
| CMTI | >200 kV/μs - ensures reliable operation in noisy high-dV/dt environments like SiC-based inverters |
| UVLO Threshold | 8 V (typical) - prevents erroneous switching during gate supply brownout while maintaining safe turn-off |
| SelVCD™ Levels | 8 discrete sourcing/sinking current settings - eliminates external gate resistors and enables dynamic speed control |
| Working Voltage | 1500 VRMS - supports continuous operation in industrial-grade 1200 V bus systems |
| Temperature Range | –40 to +125 °C - qualified for automotive and industrial motor drive ambient conditions |
Pinout & Package
Narrow-body 16-pin SOIC (NB SOIC-16) package with 1.27 mm pitch; creepage ≥8.3 mm, clearance ≥8.3 mm; RoHS-compliant, halogen-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input A | Drives VOA directly; Schmitt-triggered, deglitch-filtered CMOS input with 3–20 V tolerance |
| VIB | Non-inverting logic input B | Drives VOB directly; identical electrical specs to VIA; enables independent control of both channels |
| DIS | Active-high disable input | Forces VOA/VOB low unconditionally; terminates operation within tDID (≤30 ns) when asserted |
| DT | Dead time programming input | Resistor-to-GND sets dead time (10–110 kΩ → 17.3–121 ns); connect to VDDI to disable dead time |
| SPD+ | Sourcing current control | Analog input setting 8-level turn-on current; 1% resistor to GND selects fixed level; voltage range 0–VDDI |
| SPD− | Sinking current control | Analog input setting 8-level turn-off current; same interface as SPD+; enables Miller clamp activation |
| VDDA / GNDA | Gate driver A supply & ground | 5–30 V isolated supply for VOA output stage; UVLO monitoring at 8 V nominal |
| VDDB / GNDB | Gate driver B supply & ground | Independent 5–30 V supply for VOB; supports asymmetric rail configurations |
| VDDI / GNDI | Logic input supply & ground | 3–20 V logic domain; powers isolation barrier and input circuitry; UVLO at 4 V (min) |
| VOA / VOB | Isolated gate driver outputs | Current-source outputs with integrated Miller clamp; no external gate resistor required |
Key Features
| Feature | Design Value |
|---|---|
| Selectable Variable Current Drive (SelVCD™) | Eight precision current levels for both sourcing and sinking - replaces gate resistors and enables adaptive switching loss optimization |
| Integrated Miller Clamp | Automatically engages during VOH→VOL transition below VMCTA/B - suppresses Miller-induced false turn-on in SiC/GaN FETs |
| Programmable Dead Time | Resistor-set delay (17–121 ns) between VOA/VOB transitions - prevents shoot-through in half-bridge topologies |
| High CMTI & Low Skew | 200 kV/μs common-mode transient immunity and <5 ns channel-to-channel skew - ensures robust timing in fast-switching converters |
| Universal Pinout Configuration | Independent VIA/VIB inputs - supports dual independent switches or complementary half-bridge operation with external logic |
Applications
| Motor Drives | Onboard Chargers (OBC) |
|---|---|
|
Use Scenario: 3-phase inverter for EV traction or industrial servo drives using 650 V/1200 V SiC MOSFETs. IC Role / Device Role / Timing Role: Dual isolated gate driver providing independent, skew-controlled turn-on/turn-off of high-side and low-side switches. Use Value: ≤5 ns skew and 200 kV/μs CMTI enable >100 kHz switching with minimal timing margin loss and no false triggering. |
Use Scenario: Bidirectional AC/DC and DC/DC conversion in automotive OBC modules with GaN HEMTs. IC Role / Device Role / Timing Role: Universal gate driver managing asymmetric gate drive requirements for PFC and LLC stages. Use Value: SelVCD™ allows dynamic adjustment of turn-on/off currents per stage - optimizing EMI and efficiency without layout changes. |
| Uninterruptible Power Supplies | Industrial DC-DC Converters |
|
Use Scenario: High-efficiency 3 kW UPS inverter with active clamp flyback and synchronous rectification. IC Role / Device Role / Timing Role: Isolated driver for clamping switch and synchronous rectifier FETs requiring precise dead time coordination. Use Value: DT pin programmability enables fine-tuned dead time matching across varying load and temperature conditions. |
Use Scenario: 48 V–12 V isolated DC-DC converter in telecom/datacom power supplies using Si MOSFETs. IC Role / Device Role / Timing Role: Dual-channel driver powering primary-side half-bridge and secondary-side synchronous rectifiers. Use Value: 6 kVRMS isolation and 1500 VRMS working voltage meet reinforced insulation requirements for double-insulated systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si82F39ABC-IS1R | Same NB SOIC-16 package and SelVCD™ architecture, but features EN (enable) instead of DIS (disable) input logic | Preferred where system-level fault handling requires active-high enable rather than active-high disable | Select SI82F29ABC-IS1R when DIS-driven safety shutdown is required; choose Si82F39ABC-IS1R for EN-synchronized startup sequencing |
| UCC5870QDWJRQ1 | TI's 5.7 kVRMS isolated dual driver with integrated DC-DC bias supply; lacks SelVCD™ and uses fixed 4-A/6-A outputs | Used in automotive traction inverters where bias supply integration reduces BOM count, but requires external gate resistors | Choose SI82F29ABC-IS1R when gate resistor elimination and dynamic current tuning are critical; select UCC5870QDWJRQ1 when bias supply consolidation outweighs current flexibility |
Compared with Si82F39ABC-IS1R, SI82F29ABC-IS1R offers identical isolation, skew, and current control but differs in control logic polarity; versus UCC5870QDWJRQ1, it trades integrated bias for superior current programmability and lower gate drive component count.
Availability
SI82F29ABC-IS1R is available at Aetrix Electronics and suitable for motor drives, onboard chargers, and uninterruptible power supplies requiring stable component supply, AEC-Q100-compliant performance, and long-term industrial lifecycle support.
Supply support for SI82F29ABC-IS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, automotive, and industrial markets.
The Si82Fx family was designed specifically for high-reliability isolated gate driving in SiC/GaN-based power conversion systems, emphasizing timing precision, noise immunity, and programmable drive strength.
FAQ
What is the UVLO threshold for SI82F29ABC-IS1R?
The SI82F29ABC-IS1R has a nominal undervoltage lockout (UVLO) threshold of 8 V on the gate driver supply rails (VDDA/VDDB), with hysteresis ensuring clean exit from UVLO. The logic supply (VDDI) UVLO is specified at 4 V minimum. These thresholds prevent erratic switching during power-up or brownout conditions and are factory-trimmed per device.
Does SI82F29ABC-IS1R support dynamic speed control?
Yes, SI82F29ABC-IS1R supports dynamic speed control via analog voltage injection on SPD+ and SPD− pins. Each pin accepts a voltage between 0 V and VDDI to select one of eight current levels in real time, with Speed Update Delay (tSUD) of ≤100 ns. This enables adaptive switching loss optimization during transient load events without firmware intervention.
How does the Miller clamp function in SI82F29ABC-IS1R?
In SI82F29ABC-IS1R, the Miller clamp activates automatically when VOA or VOB falls below the VMCTA/B threshold (~1.9 V) during turn-off. It temporarily boosts sinking current to SPD7− level to rapidly discharge the Miller capacitance of SiC/GaN FETs. The clamp remains engaged until the next rising edge, preventing false turn-on - and requires zero external components.
What is the maximum dead time achievable with SI82F29ABC-IS1R?
The SI82F29ABC-IS1R achieves up to 121 ns typical dead time by connecting a 110 kΩ resistor between DT and GNDI. Equation tDT = 1.73 × RDT + 5.74 (with RDT in kΩ) defines the relationship. For applications requiring no dead time, connecting DT to VDDI disables the feature entirely, converting the device to a dual independent driver.
Is SI82F29ABC-IS1R qualified for automotive use?
Yes, SI82F29ABC-IS1R is AEC-Q100 qualified and built using automotive-specific manufacturing flows. It carries automotive-grade OPN suffixes and meets 2 MOPP medical (IEC 60601-1) and reinforced insulation (IEC 62368-1) safety standards - making it suitable for EV traction inverters, OBCs, and ADAS power systems.
SI82F29ABC-IS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82F29ABC-IS1R FAQ
1.How can I place an order for SI82F29ABC-IS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82F29ABC-IS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82F29ABC-IS1R reliable?
The price and inventory of SI82F29ABC-IS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82F29ABC-IS1R is usually 5 days.
3.What payment methods are accepted for SI82F29ABC-IS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82F29ABC-IS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82F29ABC-IS1R?
SI82F29ABC-IS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82F29ABC-IS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82F29ABC-IS1R?
For technical support, including SI82F29ABC-IS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82F29ABC-IS1R requirements.
6.How does Aetrix verify that SI82F29ABC-IS1R is sourced from the original manufacturer or authorized distributors?
All SI82F29ABC-IS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82F29ABC-IS1R meets industry standards.
7.What is the process for return or replacement of SI82F29ABC-IS1R?
All SI82F29ABC-IS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI82F29ABC-IS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82F29ABC-IS1R part is unused and in its original packaging.
Return procedure for SI82F29ABC-IS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI82F29ABC-IS1R Tags
.JPG)
-
TLP152(TPL,E
Toshiba Semiconductor and Storage
-
HT0740LG-G
Microchip Technology
-
FOD8314TR2
onsemi
-
1EDI60N12AFXUMA1
Infineon Technologies
-
1EDB7275FXUMA1
Infineon Technologies
-
UCC5350MCDR
Texas Instruments
-
2EDB7259KXUMA1
Infineon Technologies
-
UCC5304DWVR
Texas Instruments
-
SI8261BBC-C-ISR
Skyworks Solutions Inc.
-
HT0440LG-G
Microchip Technology
-
HCPL-0302-500E
Broadcom Limited
-
STGAP2HSCMTR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
