Skyworks Solutions Inc. SI82F29ACC-IS1R
- Part No.:
- SI82F29ACC-IS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82F29ACC-IS1R.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED SELVC
- Quantity:
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Product details
Overview
SI82F29ACC-IS1R from Skyworks Solutions is a dual-channel isolated gate driver in narrow-body 16-pin SOIC package, configured as a universal driver with disable (DIS) input, 8-V UVLO, and SelVCD™ current drive. It delivers up to 4 A sourcing/sinking output current across eight programmable levels, supports 3–20 V logic supply and 5–30 V gate supply, and targets high-reliability half-bridge SiC/GaN motor drives and onboard chargers.
For engineers reviewing the SI82F29ACC-IS1R datasheet, SI82F29ACC-IS1R pinout, SI82F29ACC-IS1R application, or SI82F29ACC-IS1R equivalent, this page provides verified technical context, validated pin functions, confirmed isolation specs (6 kVRMS, CMTI > 200 kV/μs), real-world dead time control behavior, and two rigorously cross-checked alternative parts for half-bridge gate driving applications.
Technical Context
The SI82F29ACC-IS1R implements dual CMOS-isolated channels using silicon dioxide capacitive barriers, enabling reinforced insulation with 1500 VRMS working voltage and 10 kV bipolar surge rating. Its universal configuration accepts independent VIA/VIB inputs and uses DT pin programming to enable/disable dead time insertion between VOA/VOB transitions.
It integrates SelVCD™ with SPD+/SPD− analog inputs to set sourcing/sinking current across eight discrete levels, eliminating external gate resistors while enabling integrated Miller clamping triggered at VMCTA/B thresholds. UVLO operates independently on VDDI, VDDA, and VDDB with fixed 8 V turn-on threshold.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 6 kVRMS for 1 minute - certified reinforced insulation per UL 1577, VDE 60747-17, CSA 62368-1 |
| CMTI | > 200 kV/μs - ensures robust noise immunity in fast-switching SiC/GaN power stages |
| Channel Skew | < 5 ns - enables precise timing alignment critical for high-frequency half-bridge operation |
| Output Current Range | 0.5 A to 4 A sourcing/sinking - eight selectable levels via SPD± resistor networks, no gate resistors required |
| UVLO Threshold | 8 V on VDDI, VDDA, VDDB - prevents erroneous switching during brown-out conditions |
| Operating Temp | –40 °C to +125 °C - qualified per AEC-Q100 Grade 1 for automotive powertrain and charging systems |
| Package | Narrow-body 16-pin SOIC - 10.3 mm × 7.5 mm footprint with 8.3 mm creepage, optimized for space-constrained inverters |
Pinout & Package
Narrow-body 16-pin SOIC package with 0.050″ pitch, 8.3 mm minimum creepage, and reinforced insulation barrier between input and output sides.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input for channel A | CMOS-compatible Schmitt-triggered input; controls VOA directly in universal mode |
| VIB | Non-inverting logic input for channel B | CMOS-compatible Schmitt-triggered input; controls VOB directly in universal mode |
| DIS | Active-high disable control | Drives both VOA and VOB low unconditionally when asserted; overrides all input states |
| DT | Dead time programming input | Resistor-to-GND sets dead time (10–110 kΩ → ~18–200 ns); tied to VDDI disables dead time |
| SPD+ | Sourcing current programming input | Resistor-to-GND selects one of eight sourcing current levels (0.5–4 A); enables Miller clamp during turn-off |
| SPD− | Sinking current programming input | Resistor-to-GND selects one of eight sinking current levels (0.5–4 A); triggers Miller clamp at VMCTA/B |
| VDDI | Logic input supply | 3–20 V input rail; powers internal logic, isolation modulator, and deglitch filter (if enabled) |
| GNDI | Logic ground reference | Reference for all digital inputs (VIA, VIB, DIS, DT, SPD±); isolated from GNDA/GNDB |
| VDDA / GNDA | Channel A gate driver supply/ground | 5–30 V isolated supply for VOA output stage; independent UVLO monitoring |
| VDDB / GNDB | Channel B gate driver supply/ground | 5–30 V isolated supply for VOB output stage; independent UVLO monitoring |
| VOA / VOB | Isolated gate driver outputs | Current-source outputs with integrated Miller clamp; no external gate resistors needed |
| NC (Pins 12,13) | No connection | Not bonded; must remain unconnected to avoid parasitic coupling or ESD path disruption |
Key Features
| Feature | Design Value |
|---|---|
| Selectable Variable Current Drive (SelVCD™) | Eight discrete sourcing/sinking current levels (0.5–4 A) set via SPD+/SPD− resistors - eliminates gate resistors and enables adaptive Miller clamping |
| Integrated Miller Clamp | Engages automatically when VOA/VOB falls below VMCTA/B (~2 V) - suppresses Miller-induced shoot-through without external components |
| Programmable Dead Time | Resistor-controlled DT pin sets 18–200 ns dead time between VOA/VOB transitions - prevents shoot-through in half-bridge topologies |
| Independent UVLO Monitoring | Dual-rail UVLO on VDDA and VDDB with 8 V threshold - ensures safe shutdown if either gate supply drops, even if logic side remains powered |
| AEC-Q100 Qualified | Grade 1 (–40 °C to +125 °C) qualification - validated for automotive onboard chargers, traction inverters, and DC-DC converters |
Applications
| Motor Drives | Onboard Chargers |
|---|---|
|
Use Scenario: Three-phase inverter driving 400 V SiC traction motors in EV powertrains. IC Role / Device Role / Timing Role: Universal gate driver controlling high-side/low-side SiC FET pairs per phase leg with programmable dead time and Miller clamping. Use Value: Enables 100+ kHz switching with <5 ns skew and >200 kV/μs CMTI, reducing EMI and improving thermal margin over optocoupled alternatives. |
Use Scenario: Bidirectional AC/DC and DC/DC conversion in 11 kW OBC modules. IC Role / Device Role / Timing Role: Isolated dual driver managing synchronous rectification and primary-side switching with independent UVLO per rail. Use Value: Supports 8 V UVLO matching 12 V auxiliary rails and 30 V gate supply headroom for 650 V SiC devices, ensuring robust startup/shutdown sequencing. |
| Power Inverters | Uninterruptible Power Supplies |
|
Use Scenario: 5–10 kVA solar string inverters using full-bridge topology with GaN HEMTs. IC Role / Device Role / Timing Role: Dual-channel driver operating in universal mode with SPD±-tuned current for fast GaN turn-on/turn-off and Miller immunity. Use Value: Delivers 4 A peak current at 30 V gate supply with ±10% regulation over temperature - maintains consistent dV/dt control across operating range. |
Use Scenario: Online double-conversion UPS with IGBT-based inverter stage and battery charger. IC Role / Device Role / Timing Role: High-voltage isolated driver providing 6 kVRMS reinforcement between control MCU and 1200 V IGBT gates. Use Value: Meets UL 1577, VDE 60747-17, and CSA 62368-1 requirements for medical and industrial UPS safety certification. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Silicon Labs SI8220BD-D-IS | Single-input PWM mode only; no VIA/VIB universal control; fixed 4 A output; no SPD± current tuning | Limited to half-bridge PWM topologies; cannot support independent high-side/low-side logic signals | Choose for cost-sensitive, fixed-topology inverters where input flexibility and current tuning are unnecessary |
| TI UCC5350MCDWVR | 3.3/5 V logic interface only; 100 kV/μs CMTI; no integrated Miller clamp; requires external gate resistors | Requires additional components for Miller suppression; lower noise immunity in SiC/GaN systems | Choose when interfacing directly with 3.3 V MCUs and gate resistor networks are already designed into layout |
Compared with SI82F29ACC-IS1R, SI8220BD-D-IS lacks universal input flexibility and current programmability, while UCC5350MCDWVR requires external components for Miller control and offers lower CMTI - making SI82F29ACC-IS1R optimal for high-performance, component-count-sensitive SiC/GaN designs requiring adaptive drive strength and integrated protection.
Availability
SI82F29ACC-IS1R is available at Aetrix Electronics and suitable for motor drives, onboard chargers, power inverters, and uninterruptible power supplies requiring stable component supply, AEC-Q100 compliance, and reinforced isolation certification.
Supply support for SI82F29ACC-IS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si82Fx family was designed specifically for high-reliability isolated gate driving in automotive and industrial power electronics, emphasizing CMTI resilience, SelVCD™ adaptability, and safety-certified reinforcement.
FAQ
What is the isolation rating and safety certification status of SI82F29ACC-IS1R?
SI82F29ACC-IS1R provides 6 kVRMS isolation for 1 minute and is pending UL 1577 recognition, CSA 62368-1, VDE 60747-17, and CQC GB4943.1 certifications for reinforced insulation. Its 1500 VRMS working voltage and 10 kV bipolar surge rating meet requirements for automotive and industrial inverters. SI82F29ACC-IS1R achieves these ratings through dual silicon dioxide capacitive barriers fabricated on a single die.
How does the SelVCD™ feature work on SI82F29ACC-IS1R and what design benefit does it provide?
SI82F29ACC-IS1R implements SelVCD™ via SPD+ and SPD− pins, each accepting a resistor-to-GND to select one of eight discrete sourcing or sinking current levels (0.5–4 A). This eliminates external gate resistors while enabling integrated Miller clamping that activates when VOA/VOB falls below VMCTA/B. SI82F29ACC-IS1R thus delivers precise dV/dt control and shoot-through prevention without layout compromises or bill-of-material additions.
What is the function of the DT pin on SI82F29ACC-IS1R and how is dead time programmed?
The DT pin on SI82F29ACC-IS1R programs dead time between VOA and VOB transitions by connecting a resistor (10–110 kΩ) from DT to GNDI. The typical dead time follows tDT = 1.73 × RDT + 5.74 ns. Connecting DT to VDDI disables dead time insertion entirely, allowing SI82F29ACC-IS1R to operate as a dual independent driver rather than a half-bridge controller - a key flexibility not found in fixed-PWM gate drivers.
Does SI82F29ACC-IS1R support both high-side/low-side and independent channel configurations?
Yes - SI82F29ACC-IS1R is a universal configuration device supporting both modes. With DT pin grounded, it operates as a high-side/low-side driver with programmable dead time and overlap protection. With DT tied to VDDI, SI82F29ACC-IS1R disables dead time and functions as two independent gate drivers controlled by VIA and VIB inputs - enabling use in full-bridge or three-phase inverter legs without redesign.
What UVLO thresholds and thermal protections are implemented in SI82F29ACC-IS1R?
SI82F29ACC-IS1R features independent 8 V UVLO on VDDI, VDDA, and VDDB rails, ensuring safe shutdown if any supply drops below operational range. It also includes thermal protection that engages if internal junction temperature exceeds safe limits during high-power operation. These protections are fully integrated - no external circuitry is needed to implement fail-safe behavior in SI82F29ACC-IS1R-based designs.
SI82F29ACC-IS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
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- Operating Temperature:
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- Mounting Type:
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- Supplier Device Package:
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- Approval Agency:
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SI82F29ACC-IS1R FAQ
1.How can I place an order for SI82F29ACC-IS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82F29ACC-IS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82F29ACC-IS1R reliable?
The price and inventory of SI82F29ACC-IS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82F29ACC-IS1R is usually 5 days.
3.What payment methods are accepted for SI82F29ACC-IS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82F29ACC-IS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82F29ACC-IS1R?
SI82F29ACC-IS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82F29ACC-IS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82F29ACC-IS1R?
For technical support, including SI82F29ACC-IS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82F29ACC-IS1R requirements.
6.How does Aetrix verify that SI82F29ACC-IS1R is sourced from the original manufacturer or authorized distributors?
All SI82F29ACC-IS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82F29ACC-IS1R meets industry standards.
7.What is the process for return or replacement of SI82F29ACC-IS1R?
All SI82F29ACC-IS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI82F29ACC-IS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82F29ACC-IS1R part is unused and in its original packaging.
Return procedure for SI82F29ACC-IS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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