Skyworks Solutions Inc. SI82F39ABC-IS1
- Part No.:
- SI82F39ABC-IS1
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82F39ABC-IS1.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED SELVC
- Quantity:
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Inventory:2,262
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Product details
Overview
SI82F39ABC-IS1 from Skyworks Solutions is a dual-channel isolated gate driver in narrow-body 16-pin SOIC package, configured as a Universal driver with EN enable input, supporting SiC and GaN FETs in half-bridge topologies. It delivers 8-level selectable sourcing/sinking current drive (SelVCD™), <5 ns channel-to-channel skew, 200 kV/µs CMTI, and 6 kVRMS reinforced isolation for high-reliability motor drives and onboard chargers.
For engineers reviewing the SI82F39ABC-IS1 datasheet, SI82F39ABC-IS1 pinout, SI82F39ABC-IS1 application, or SI82F39ABC-IS1 equivalent, this page provides verified functional identity, validated pin roles, confirmed isolation specs, real-world dead time behavior, and two field-tested alternative options - all extracted from Skyworks' official preliminary datasheet (206821A, May 2024).
Technical Context
The SI82F39ABC-IS1 implements dual CMOS-isolated channels using silicon-dioxide capacitive coupling with differential RF OOK modulation, enabling precise timing control and fault-tolerant signal transfer. Its Universal configuration accepts independent VIA/VIB inputs and supports programmable dead time via external resistor on DT pin.
It integrates SelVCD™ current-source outputs with built-in Miller clamp activation triggered at VMCTA/B threshold, eliminating external gate resistors. UVLO thresholds are fixed at 8 V (VDDA/B) and 4 V (VDDI), and the device enforces defined output states under all supply and logic conditions including undervoltage and disable events.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 6 kVRMS for 1 minute (UL 1577, VDE 60747-17, CSA 62368-1) |
| Channel Skew | <5 ns - ensures synchronous switching in half-bridge configurations without shoot-through risk |
| CMTI | >200 kV/µs - maintains signal integrity in high-dV/dt environments like SiC inverters |
| Input Supply Range | 3–20 V - compatible with 3.3 V, 5 V, and 15 V logic controllers without level shifting |
| Gate Drive Supply | 5–30 V - supports wide-range power FETs including 20 V-rated SiC MOSFETs |
| UVLO Thresholds | VDDI: 4 V (±0.2 V); VDDA/B: 8 V (±0.3 V) - prevents erratic turn-on during brownout |
| Operating Temp | –40 to +125 °C - qualified per AEC-Q100 Grade 1 for automotive powertrain use |
Pinout & Package
Narrow-body 16-pin SOIC (NB SOIC-16) package with creepage ≥8.3 mm and clearance ≥8.0 mm; RoHS-compliant, halogen-free, and rated for 1500 VRMS working voltage.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input for Channel A | Directly controls VOA output state; Schmitt-triggered, deglitch-capable CMOS input |
| VIB | Non-inverting logic input for Channel B | Directly controls VOB output state; independent of VIA, enabling asymmetric PWM control |
| EN | Active-high enable input | Drives both VOA and VOB low when deasserted; enables fast system-level shutdown |
| DT | Dead time programming input | Resistor-to-GND sets dead time (10–110 kΩ → ~10–190 ns); tied to VDDI disables dead time |
| SPD+ | Sourcing current control input | Selects one of eight turn-on current levels (SPD1–SPD8); eliminates need for external gate resistors |
| SPD− | Sinking current control input | Selects one of eight turn-off current levels; enables active Miller clamping during VOH→VOL transition |
| VDDA / GNDA | Channel A gate drive supply and ground | Independent 5–30 V supply domain; UVLO monitored separately from VDDB/GNDB |
| VDDB / GNDB | Channel B gate drive supply and ground | Independent 5–30 V supply domain; allows split-rail or floating bootstrap configurations |
| VDDI / GNDI | Logic input supply and ground | 3–20 V domain; powers isolation barrier and input logic; UVLO at 4 V prevents false triggering |
| VOA / VOB | Isolated gate driver outputs | Current-source outputs with integrated Miller clamp; no external components required for safe SiC/GaN switching |
Key Features
| Feature | Design Value |
|---|---|
| Selectable Variable Current Drive (SelVCD™) | Eight discrete sourcing/sinking current levels per channel, adjustable via SPD+/SPD− resistors or analog voltage |
| Integrated Miller Clamp | Automatically engages when VOA/VOB falls below VMCTA/B (~2.5 V), maximizing turn-off current without external circuitry |
| Programmable Dead Time | User-configurable via single resistor on DT pin; supports overlap protection and shoot-through prevention in half-bridge designs |
| Defined Output States | No floating or undefined outputs - VOA/VOB driven low during UVLO, disable, or unpowered conditions |
| AEC-Q100 Qualified | Grade 1 (–40 to +125 °C) qualification confirms suitability for automotive traction inverters and OBCs |
Applications
| Motor Drives | Onboard Chargers (OBC) |
|---|---|
Use Scenario: 3-phase inverter driving permanent magnet synchronous motors in EV traction systems. IC Role / Device Role / Timing Role: Dual isolated gate driver providing independent, skew-controlled turn-on/turn-off for high-side and low-side SiC FETs in each leg. Use Value: Enables 100+ kHz switching with <5 ns skew and 200 kV/µs CMTI, reducing EMI and improving thermal efficiency in compact inverters. |
Use Scenario: Bidirectional AC/DC and DC/DC conversion in 11–22 kW EV onboard chargers. IC Role / Device Role / Timing Role: Universal gate driver controlling interleaved totem-pole PFC and CLLC resonant DC/DC stages. Use Value: SelVCD™ eliminates gate resistors while Miller clamp suppresses parasitic turn-on in GaN HEMTs, increasing power density and reliability. |
| Power Inverters | Uninterruptible Power Supplies (UPS) |
Use Scenario: Solar string inverters with transformerless topologies requiring reinforced isolation and high CMTI. IC Role / Device Role / Timing Role: Isolated dual driver managing IGBTs or SiC modules in full-bridge or NPC configurations. Use Value: 6 kVRMS isolation and 1500 VRMS working voltage meet IEC 62109 and UL 1741 safety requirements without additional creepage barriers. |
Use Scenario: Online double-conversion UPS systems with fast-switching IGBTs in inverter stage. IC Role / Device Role / Timing Role: High-speed gate driver delivering precise dead time control and fail-safe shutdown via EN pin. Use Value: Defined output states and UVLO ensure clean zero-voltage transitions during grid failure or battery switchover, preventing bus short circuits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8239AB-IS1 | Same NB SOIC-16 package and Universal configuration, but uses DIS (disable) instead of EN (enable) input logic. | Requires inverted control signal polarity; identical timing, isolation, and SelVCD™ performance. | Select when system controller natively asserts disable signals rather than enable signals - no PCB change needed. |
| UCC5390SCDR | Texas Instruments part with 5.7 kVRMS isolation, 35 V max VDD, and fixed 4-A peak drive; no SelVCD™ or SPD± programming. | Lacks current-level programmability and Miller clamp; requires external gate resistors and clamping diodes. | Choose for cost-sensitive industrial inverters where fixed drive strength suffices and design reuse of TI ecosystem is prioritized. |
Compared with SI82F39ABC-IS1, Si8239AB-IS1 offers identical isolation, skew, and drive flexibility but differs only in enable/disable polarity - making it a direct functional substitute. UCC5390SCDR trades programmability for higher peak current and TI-specific support tools, but increases BOM count and layout complexity due to missing integrated Miller clamp and SelVCD™.
Availability
SI82F39ABC-IS1 is available at Aetrix Electronics and suitable for motor drives, onboard chargers, and uninterruptible power supplies requiring stable component supply, automotive-grade reliability, and long-term lifecycle continuity.
Supply support for SI82F39ABC-IS1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si82Fx family was designed specifically for high-efficiency, high-reliability power conversion systems using wide-bandgap semiconductors - delivering robust isolation, precise timing control, and adaptive gate drive in automotive, industrial, and renewable energy applications.
FAQ
What is the isolation voltage rating of the SI82F39ABC-IS1?
The SI82F39ABC-IS1 is safety-certified for 6 kVRMS isolation for 1 minute per UL 1577, VDE 60747-17, and CSA 62368-1 standards. Its reinforced insulation supports a 1500 VRMS working voltage and withstands 10 kV bipolar surge, making it suitable for high-voltage traction inverters and grid-tied solar systems where creepage and clearance compliance are critical.
Does the SI82F39ABC-IS1 support SiC and GaN FETs?
Yes, the SI82F39ABC-IS1 is explicitly optimized for wide-bandgap devices. Its 200 kV/µs CMTI, <5 ns channel skew, 5–30 V gate supply range, and integrated Miller clamp eliminate parasitic turn-on in SiC MOSFETs and GaN HEMTs. The SelVCD™ technology allows fine-tuning of turn-on/turn-off current to match specific FET gate charge profiles without external resistors.
How does the dead time function work on the SI82F39ABC-IS1?
The SI82F39ABC-IS1 uses the DT pin to set dead time between VOA and VOB transitions via an external resistor (10–110 kΩ) to GNDI, yielding ~10–190 ns typical delay. When DT is tied to VDDI, dead time and overlap protection are disabled - converting the device into a dual independent driver. This flexibility supports both half-bridge and dual-switch topologies without changing hardware.
What is the purpose of the SPD+ and SPD− pins on the SI82F39ABC-IS1?
The SPD+ and SPD− pins configure the eight-level selectable sourcing and sinking current drive (SelVCD™) for both VOA and VOB outputs. Using 1% resistors to GNDI selects discrete current levels; applying analog voltage enables dynamic speed control. This replaces gate resistors and enables the integrated Miller clamp to activate automatically during turn-off transitions, suppressing dv/dt-induced false turn-on.
Is the SI82F39ABC-IS1 qualified for automotive applications?
Yes, the SI82F39ABC-IS1 is AEC-Q100 Grade 1 qualified (–40 to +125 °C) and manufactured using automotive-specific process flows. It meets 2 MOPP medical isolation (IEC 60601-1) and reinforced insulation requirements (IEC 62368-1), making it suitable for EV traction inverters, onboard chargers, and DC-DC converters where long-term reliability and zero-defect operation are mandatory.
SI82F39ABC-IS1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
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- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
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- Current - DC Forward (If) (Max):
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- Voltage - Output Supply:
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- Grade:
- -
- Qualification:
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- Operating Temperature:
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- Mounting Type:
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- Supplier Device Package:
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- Approval Agency:
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SI82F39ABC-IS1 FAQ
1.How can I place an order for SI82F39ABC-IS1 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82F39ABC-IS1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82F39ABC-IS1 reliable?
The price and inventory of SI82F39ABC-IS1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82F39ABC-IS1 is usually 5 days.
3.What payment methods are accepted for SI82F39ABC-IS1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82F39ABC-IS1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82F39ABC-IS1?
SI82F39ABC-IS1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82F39ABC-IS1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82F39ABC-IS1?
For technical support, including SI82F39ABC-IS1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82F39ABC-IS1 requirements.
6.How does Aetrix verify that SI82F39ABC-IS1 is sourced from the original manufacturer or authorized distributors?
All SI82F39ABC-IS1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82F39ABC-IS1 meets industry standards.
7.What is the process for return or replacement of SI82F39ABC-IS1?
All SI82F39ABC-IS1 units undergo pre-shipment inspection (PSI). If there is an issue with SI82F39ABC-IS1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82F39ABC-IS1 part is unused and in its original packaging.
Return procedure for SI82F39ABC-IS1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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