Skyworks Solutions Inc. SI82F39ACE-IS3R
- Part No.:
- SI82F39ACE-IS3R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82F39ACE-IS3R.pdf
- Description:
- 6 KV 2-CHANNEL ISOLATED SELVCD G
- Quantity:
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Product details
Overview
SI82F39ACE-IS3R from Skyworks Solutions is a dual-channel isolated gate driver in narrow-body 16-pin SOIC package, configured for universal (independent high-side/low-side) operation with enable (EN) input. It delivers ±4 A peak sourcing/sinking current via SelVCD™ across eight programmable levels, supports 3–20 V logic supply and 5–30 V gate supply, and provides 6 kVRMS reinforced isolation for driving SiC/GaN FETs in half-bridge motor inverters.
For engineers reviewing the SI82F39ACE-IS3R datasheet, SI82F39ACE-IS3R pinout, SI82F39ACE-IS3R application, or SI82F39ACE-IS3R equivalent, this page delivers verified specifications, validated pin functions, confirmed automotive-grade AEC-Q100 qualification, exact SelVCD™ current calibration per SPD± resistor settings, and real-world dead time programming behavior - all directly traceable to Skyworks' May 2024 preliminary datasheet.
Technical Context
The SI82F39ACE-IS3R implements dual CMOS-isolated channels using differential RF-modulated capacitive coupling across silicon dioxide barriers, enabling 200 kV/µs CMTI and <5 ns channel-to-channel skew. Its universal configuration accepts independent VIA/VIB inputs and uses EN for synchronous enable control - distinct from DIS-based variants.
It integrates analog SPD± inputs that set sourcing/sinking current as a precision current source (±10% tolerance over temp/process for 8/12/15 V UVLO variants), with built-in Miller clamp activation at VMCTA/B threshold and programmable dead time via external RDT (10–110 kΩ) on DT pin - disabled when DT = VDDI.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 6 kVRMS for 1 minute (UL 1577, VDE 60747-17, CSA 62368-1) |
| Output Current Range | ±0.5 A to ±4 A sourcing/sinking (8 SelVCD™ levels, SPD± resistor-programmed) |
| Logic Supply Range | 3 V to 20 V (CMOS-compatible, Schmitt-triggered, deglitch-filter optional) |
| Gate Supply Range | 5 V to 30 V per channel (VDDA/VDDB independent, UVLO thresholds: 4/8/12/15 V) |
| Channel Skew | <5 ns (ensures precise timing alignment between VOA/VOB transitions) |
| Working Voltage | 1500 VRMS (reinforced insulation per IEC 60601-1, 2 MOPP) |
| Temperature Range | –40 °C to +125 °C (AEC-Q100 qualified, automotive-grade manufacturing flow) |
| CMTI | >200 kV/µs (prevents false triggering in noisy high-dV/dt power stages) |
Pinout & Package
Narrow-body 16-pin SOIC (NB SOIC-16) package with 1.27 mm pitch, creepage ≥8.3 mm, clearance ≥8.0 mm, and reinforced insulation barrier between logic and power sides.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input for channel A | Drives VOA high when asserted; CMOS/Schmitt input with deglitch option |
| VIB | Non-inverting logic input for channel B | Drives VOB high when asserted; independent of VIA, enables dual-driver mode |
| EN | Active-high enable control | When low, forces VOA/VOB low unconditionally; resumes operation within tEID after rising edge |
| DT | Dead time programming input | Resistor-to-GND sets dead time (10–110 kΩ → 17.3–110 ns); tied to VDDI disables dead time |
| SPD+ | Sourcing current programming input | Resistor-to-GND selects one of eight sourcing current levels (0.5–4 A); voltage-controlled for dynamic adjustment |
| SPD− | Sinking current programming input | Resistor-to-GND selects one of eight sinking current levels (0.5–4 A); activates Miller clamp below VMCTA/B |
| VDDA / GNDA | Channel A gate driver supply and ground | Independent 5–30 V rail; UVLO monitors VDDA separately from VDDB |
| VDDB / GNDB | Channel B gate driver supply and ground | Independent 5–30 V rail; allows asymmetric gate drive voltages per channel |
| VDDI / GNDI | Logic input supply and ground | 3–20 V domain; powers isolation barrier and digital logic; UVLO threshold configurable |
| VOA / VOB | Isolated gate driver outputs | Current-source outputs with integrated Miller clamp; no external gate resistors required |
Key Features
| Feature | Design Value |
|---|---|
| Selectable Variable Current Drive (SelVCD™) | Eight-step ±0.5 A to ±4 A sourcing/sinking current, calibrated to ±10% tolerance over temperature and process for 8/12/15 V UVLO variants |
| Integrated Miller Clamp | Activates automatically when VOA/VOB falls below VMCTA/B (~2.5 V), forcing SPD7− sinking level to suppress Miller-induced turn-on during switching transitions |
| Programmable Dead Time | Configurable 17–110 ns delay between VOA/VOB edges via single RDT resistor; disabled by connecting DT to VDDI for pure dual-driver use |
| Universal Pinout Architecture | Supports both independent dual-driver and high-side/low-side half-bridge modes without PCB change - only DT pin connection differs |
| AEC-Q100 Automotive Qualification | Qualified to Grade 1 (–40 °C to +125 °C), manufactured in automotive-specific flows with zero unknown failure mechanisms |
Applications
| Motor Drives | Onboard Chargers (OBC) |
|---|---|
|
Use Scenario: Three-phase inverter stage in EV traction inverters or industrial servo drives using SiC MOSFETs. IC Role / Device Role / Timing Role: Dual isolated gate driver providing independent, skew-controlled turn-on/turn-off of high-side and low-side switches per phase leg. Use Value: Enables 100+ kHz switching with <5 ns skew and 200 kV/µs CMTI, reducing EMI and preventing shoot-through in high-power SiC systems. |
Use Scenario: Bidirectional AC/DC and DC/DC conversion in EV onboard chargers with GaN HEMTs. IC Role / Device Role / Timing Role: Universal-configured gate driver delivering matched sourcing/sinking current to GaN switches in totem-pole PFC and isolated LLC stages. Use Value: SelVCD™ eliminates gate resistors while Miller clamp suppresses parasitic turn-on, improving efficiency and reliability at >200 kHz switching. |
| Uninterruptible Power Supplies | Industrial DC-DC Converters |
|
Use Scenario: High-efficiency 3 kW UPS inverter with IGBTs operating at 16 kHz under variable load. IC Role / Device Role / Timing Role: Isolated dual driver with programmable dead time and UVLO hysteresis (8 V/12 V) ensuring robust startup/shutdown sequencing. Use Value: 6 kVRMS isolation and 1500 VRMS working voltage meet UL 62368-1 reinforced insulation requirements for medical/industrial UPS systems. |
Use Scenario: 48 V–12 V isolated DC-DC converter in telecom rectifiers using Si MOSFETs. IC Role / Device Role / Timing Role: Dual-channel driver with independent VDDA/VDDB supplies enabling asymmetric gate voltages (12 V turn-on / 5 V turn-off). Use Value: Independent UVLO per channel prevents partial operation; narrow-body SOIC-16 fits high-density power module layouts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si82F30ACE-IS3R | Same NB SOIC-16 package and SelVCD™ architecture, but uses DIS (disable) instead of EN (enable) control logic | Requires inverted enable signal routing; truth table behavior differs during disable assertion (DIS high vs EN low) | Select SI82F39ACE-IS3R when synchronous active-high enable is required; choose SI82F30ACE-IS3R only if system-level disable logic matches DIS polarity |
| UCC5390SCD | TI device with 5.7 kVRMS isolation, fixed 4 A output, no SelVCD™ or SPD± programming; uses single PWM input with internal dead time | Lacks independent channel control and current programmability; limited to high-side/low-side half-bridge mode only | Choose SI82F39ACE-IS3R when design requires universal pinout, eight-step current tuning, or Miller clamp with SPD− control - UCC5390SCD suits cost-sensitive, fixed-parameter applications |
Compared with SI82F39ACE-IS3R, SI82F30ACE-IS3R offers identical isolation and current specs but inverted enable logic, requiring board-level signal inversion; UCC5390SCD trades programmability for integration, eliminating SPD± pins and dead time resistors but locking output current and topology.
Availability
SI82F39ACE-IS3R is available at Aetrix Electronics and suitable for motor drives, onboard chargers, uninterruptible power supplies, and industrial DC-DC converters requiring stable component supply, AEC-Q100 compliance, and long-term lifecycle support.
Supply support for SI82F39ACE-IS3R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for automotive, industrial, and communications markets.
The Si82Fx family was designed specifically for high-reliability isolated gate driving in next-generation power electronics - emphasizing CMTI immunity, SelVCD™ flexibility, and AEC-Q100-compliant robustness for SiC/GaN-based inverters and chargers.
FAQ
What is the isolation voltage rating of the SI82F39ACE-IS3R and which safety standards does it meet?
The SI82F39ACE-IS3R is rated for 6 kVRMS isolation for 1 minute and certified to UL 1577, VDE 60747-17 (reinforced insulation), CSA 62368-1, and CSA 60601-1 (2 MOPP). Its 1500 VRMS working voltage supports continuous operation in medical and industrial equipment meeting IEC 60601-1 and IEC 62368-1 requirements. These ratings are validated per Skyworks' May 2024 preliminary datasheet and apply directly to the SI82F39ACE-IS3R device.
How does the SelVCD™ technology in the SI82F39ACE-IS3R eliminate the need for external gate resistors?
SelVCD™ makes the SI82F39ACE-IS3R's VOA and VOB outputs behave as precision current sources - not voltage sources - with eight programmable sourcing/sinking levels (±0.5 A to ±4 A). Because current is regulated independently of gate voltage, external gate resistors become unnecessary for controlling dV/dt or switching speed. The SI82F39ACE-IS3R also integrates a Miller clamp that activates automatically below VMCTA/B, further removing the need for external clamping components. This is confirmed in Section 4.6 of the SI82F39ACE-IS3R datasheet.
What is the function of the DT pin on the SI82F39ACE-IS3R and how is dead time programmed?
The DT pin on the SI82F39ACE-IS3R programs dead time between VOA and VOB transitions using an external resistor (RDT) connected to GNDI. Values from 10 kΩ to 110 kΩ yield typical dead times of 17.3 ns to 110 ns, calculated as tDT = 1.73 × RDT + 5.74. Connecting DT to VDDI disables dead time and overlap protection, reconfiguring the SI82F39ACE-IS3R as a pure dual driver. This behavior is explicitly defined in Table 1 and Section 4.5 of the SI82F39ACE-IS3R datasheet.
Does the SI82F39ACE-IS3R support both universal and high-side/low-side configurations, and how is the mode selected?
Yes - the SI82F39ACE-IS3R uses a universal pinout supporting both independent dual-driver and high-side/low-side half-bridge modes. Mode selection is determined solely by the DT pin connection: when DT is grounded, dead time is active and the device operates as a high-side/low-side driver; when DT is tied to VDDI, dead time is disabled and the SI82F39ACE-IS3R functions as a dual driver with VOA tracking VIA and VOB tracking VIB. This is confirmed in Figures 2 and 14 and Section 4.5 of the SI82F39ACE-IS3R datasheet.
What UVLO thresholds are available for the SI82F39ACE-IS3R and how do they affect output current accuracy?
The SI82F39ACE-IS3R offers selectable UVLO thresholds of 4 V, 8 V, 12 V, or 15 V on VDDI, VDDA, and VDDB. For devices with 8 V, 12 V, or 15 V UVLO, SelVCD™ output current is maintained within ±10% of typical across temperature and process variation; 4 V UVLO variants have ±15% tolerance. These values are specified in Section 4.6 and the "Ordering Guide" of the SI82F39ACE-IS3R datasheet and directly impact current-source stability in varying thermal conditions.
SI82F39ACE-IS3R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82F39ACE-IS3R FAQ
1.How can I place an order for SI82F39ACE-IS3R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82F39ACE-IS3R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82F39ACE-IS3R reliable?
The price and inventory of SI82F39ACE-IS3R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82F39ACE-IS3R is usually 5 days.
3.What payment methods are accepted for SI82F39ACE-IS3R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82F39ACE-IS3R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82F39ACE-IS3R?
SI82F39ACE-IS3R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82F39ACE-IS3R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82F39ACE-IS3R?
For technical support, including SI82F39ACE-IS3R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82F39ACE-IS3R requirements.
6.How does Aetrix verify that SI82F39ACE-IS3R is sourced from the original manufacturer or authorized distributors?
All SI82F39ACE-IS3R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82F39ACE-IS3R meets industry standards.
7.What is the process for return or replacement of SI82F39ACE-IS3R?
All SI82F39ACE-IS3R units undergo pre-shipment inspection (PSI). If there is an issue with SI82F39ACE-IS3R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82F39ACE-IS3R part is unused and in its original packaging.
Return procedure for SI82F39ACE-IS3R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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