Skyworks Solutions Inc. SI82F39ECC-IS1
- Part No.:
- SI82F39ECC-IS1
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82F39ECC-IS1.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED SELVC
- Quantity:
- Payment:

- Shipping:

Inventory:1,655
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Product details
Overview
SI82F39ECC-IS1 from Skyworks Solutions is a dual-channel isolated gate driver with Universal configuration and active-high ENABLE input, designed for half-bridge and dual-drive topologies in high-reliability power systems. It delivers 6 kVRMS isolation, <5 ns channel-to-channel skew, CMTI >200 kV/μs, and Selectable Variable Current Drive (SelVCD™) across eight output current levels for driving SiC, GaN, IGBT, and MOSFET power switches in onboard chargers and motor drives.
For engineers reviewing the SI82F39ECC-IS1 datasheet, SI82F39ECC-IS1 pinout, SI82F39ECC-IS1 application, or SI82F39ECC-IS1 equivalent, this page provides verified functional identity, validated SOIC-16 narrow-body package mapping, confirmed SelVCD™ current-source operation, Miller clamp integration, and real-world dead time programmability - all critical for gate driver selection in automotive-grade and industrial power conversion designs.
Technical Context
The SI82F39ECC-IS1 implements capacitive digital isolation using dual silicon dioxide (SiO₂) capacitors with RF carrier modulation and OOK encoding, enabling precise timing control and fault-tolerant signal transfer between logic and power domains. Its Universal configuration supports both independent dual-channel operation and high-side/low-side half-bridge mode via DT pin programming.
It features CMOS-compatible Schmitt-triggered inputs with optional deglitch filtering, independent UVLO monitoring on VDDI (4 V/8 V/12 V/15 V options), and analog SPD± pins that configure sourcing/sinking current as a precision current source - eliminating external gate resistors while enabling dynamic speed control and integrated Miller clamping directly at VOA/VOB.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 6 kVRMS for 1 minute - meets reinforced insulation requirements per UL 1577, VDE 60747-17, and CSA 62368-1. |
| Channel Skew | <5 ns - ensures synchronized switching in half-bridge configurations to prevent shoot-through. |
| CMTI | >200 kV/μs - maintains signal integrity in high-dv/dt environments like SiC/GaN inverters. |
| Input Supply Range | 3 V to 20 V - compatible with standard MCU GPIO and industrial logic interfaces without level-shifting. |
| Gate Supply Range | 5 V to 30 V - supports wide-range biasing for diverse power switch technologies (MOSFET, IGBT, SiC, GaN). |
| SelVCD™ Levels | 8 selectable sourcing/sinking current levels - replaces discrete gate resistors and enables adaptive turn-on/turn-off control. |
| Operating Temp | –40 °C to +125 °C - qualified to AEC-Q100 Grade 1 for automotive under-hood applications. |
Pinout & Package
Narrow-body 16-pin SOIC (SOIC-16 NB) package with 1.27 mm pitch, creepage ≥8.0 mm, clearance ≥7.5 mm, and reinforced insulation barrier between input and output sides.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input for channel A | Directly controls VOA output state; CMOS/Schmitt-triggered with noise immunity. |
| VIB | Non-inverting logic input for channel B | Directly controls VOB output state; independent of VIA for dual-drive operation. |
| EN | Active-high enable input | Asserting EN = high enables normal operation; deasserting forces VOA/VOB low unconditionally. |
| DT | Dead time programming input | Resistor-to-GND sets dead time (10–110 kΩ → ~10–120 ns); tied to VDDI disables dead time for dual-driver mode. |
| SPD+ | Sourcing current control input | Configures turn-on current level (8 settings) via resistor or voltage; enables Miller clamp during VOH→VOL transition. |
| SPD− | Sinking current control input | Configures turn-off current level (8 settings); activates enhanced sinking (SPD7−) when Miller clamp engages. |
| VDDA / GNDA | Channel A gate drive supply & ground | Independent 5–30 V bias for high-side or low-side FET gate; includes dedicated UVLO monitoring. |
| VDDB / GNDB | Channel B gate drive supply & ground | Independent 5–30 V bias with separate UVLO; allows asymmetric rail configurations. |
| VDDI / GNDI | Logic input supply & ground | 3–20 V domain isolated from power side; powers internal logic, isolator, and SPD/DT interface circuits. |
| VOA / VOB | Isolated gate driver outputs | Current-source outputs with integrated Miller clamp; no external gate resistor required for optimal switching. |
| NC (pins 12,13) | No connection | Unbonded die pads; must remain floating - no PCB trace or thermal pad connection. |
Key Features
| Feature | Design Value |
|---|---|
| Selectable Variable Current Drive (SelVCD™) | Eight precision current-source output levels for both sourcing and sinking - eliminates gate resistors and enables adaptive switching speed tuning. |
| Integrated Miller Clamp | Automatically engages during VOH→VOL transitions at VMCTA/B threshold, maximizing turn-off current without external components. |
| Programmable Dead Time | Resistor-controlled DT pin sets channel-to-channel delay (10–110 kΩ → ~10–120 ns), preventing shoot-through in half-bridge topologies. |
| Universal Configuration | Supports both independent dual-channel and high-side/low-side modes - reconfigurable via DT pin connection without hardware change. |
| AEC-Q100 Qualified | Automotive-grade manufacturing flow with zero defectivity targets - suitable for safety-critical EV traction inverters and OBCs. |
Applications
| Onboard Charger (OBC) | Motor Drive Inverter |
|---|---|
Use Scenario: Bidirectional AC/DC and DC/DC conversion in electric vehicle charging systems with SiC MOSFETs. IC Role / Device Role / Timing Role: Isolated dual gate driver controlling high-side/low-side SiC switches in interleaved totem-pole PFC and LLC resonant stages. Use Value: Enables fast, synchronized switching with <5 ns skew and 200 kV/μs CMTI to maintain efficiency and EMI compliance under high dv/dt conditions. | Use Scenario: Field-oriented control (FOC) of permanent magnet synchronous motors in HVAC compressors and traction systems. IC Role / Device Role / Timing Role: Universal-configured gate driver operating in high-side/low-side mode to drive IGBTs or SiC modules in three-phase inverter legs. Use Value: Programmable dead time prevents shoot-through; SelVCD™ adapts turn-on/off current to motor load transients and thermal constraints. |
| Isolated Switched-Mode Power Supply | Uninterruptible Power Supply (UPS) |
Use Scenario: High-efficiency 1–3 kW telecom rectifiers and server PSUs using GaN HEMTs. IC Role / Device Role / Timing Role: Dual-channel driver powering synchronous rectifiers and primary-side switches with independent UVLO monitoring. Use Value: 6 kVRMS isolation and 1500 VRMS working voltage meet reinforced insulation requirements for primary-secondary barrier in Class I systems. | Use Scenario: Online double-conversion UPS with battery backup and grid-to-load transfer switching. IC Role / Device Role / Timing Role: Gate driver for bidirectional IGBT modules in inverter and rectifier stages, requiring robust noise immunity and fail-safe shutdown. Use Value: EN pin enables system-level fault response; Miller clamp suppresses parasitic turn-on during bus transients; –40 °C to +125 °C rating ensures reliability in enclosed UPS enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated dual gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SI8220BD-D-IS | Single-input, dual-output with fixed 4-A peak drive; no SPD± or DT programming; lower CMTI (100 kV/μs). | Limited to fixed-speed, non-programmable half-bridge use; lacks Miller clamp and SelVCD™ adaptability. | Choose when cost-sensitive designs require basic isolation without dynamic control or automotive qualification. |
| UCC5390SCD | Texas Instruments part with 5.7 kVRMS isolation, 100 kV/μs CMTI, and single PWM input; no universal pinout or SPD± analog control. | Optimized for TI ecosystem integration; lacks independent channel control and programmable dead time. | Prefer when using TI C2000 MCUs with direct PWM interface and no need for independent input control or current-level tuning. |
Compared with SI8220BD-D-IS and UCC5390SCD, the SI82F39ECC-IS1 uniquely combines Universal pinout flexibility, analog SPD± current programming, integrated Miller clamp, and AEC-Q100 qualification - making it the only option among the three supporting adaptive switching, automotive deployment, and shoot-through prevention via resistor-tuned dead time.
Availability
SI82F39ECC-IS1 is available at Aetrix Electronics and suitable for onboard chargers, motor drive inverters, and isolated switched-mode power supplies requiring stable component supply, long-term lifecycle support, and automotive-grade reliability.
Supply support for SI82F39ECC-IS1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si82Fx family was developed to replace optocoupled gate drivers in high-power, high-reliability systems - delivering superior CMTI, tighter skew, longer service life, and integrated features like SelVCD™ and Miller clamp for SiC/GaN adoption.
FAQ
What is the isolation rating and safety certification status of the SI82F39ECC-IS1?
The SI82F39ECC-IS1 provides 6 kVRMS isolation for 1 minute and is pending UL 1577 recognition, CSA 62368-1 and 60601-1 (2 MOPP), VDE 60747-17, and CQC GB4943.1 certifications. Its reinforced insulation barrier meets automotive and industrial safety standards, with 1500 VRMS working voltage and 10 kV bipolar surge capability. These ratings apply directly to the SI82F39ECC-IS1 device as specified in Skyworks' preliminary datasheet 206821A.
Does the SI82F39ECC-IS1 support both high-side/low-side and independent dual-channel operation?
Yes, the SI82F39ECC-IS1 uses a Universal configuration that supports both modes. When the DT pin is connected to GND via a resistor, it operates as a high-side/low-side driver with programmable dead time. When DT is tied to VDDI, dead time and overlap protection are disabled, allowing independent control of VOA and VOB via VIA and VIB - effectively functioning as a dual-channel driver. This behavior is confirmed in Figures 2 and 14 of the SI82F39x datasheet.
How does the SelVCD™ feature eliminate the need for external gate resistors in the SI82F39ECC-IS1?
The SI82F39ECC-IS1 implements SelVCD™ by configuring its VOA and VOB outputs as precision current sources - not voltage sources - with eight user-selectable sourcing (SPD+) and sinking (SPD−) current levels. Because output current remains regulated across temperature and supply voltage, external gate resistors become unnecessary for controlling dV/dt or energy dissipation. The SI82F39ECC-IS1's integrated Miller clamp further removes the need for external clamping networks during switching transitions.
What is the function of the EN pin on the SI82F39ECC-IS1, and how does it interact with UVLO?
The EN pin on the SI82F39ECC-IS1 is an active-high enable input that unconditionally forces VOA and VOB low when deasserted (logic low), regardless of VIA/VIB states. Operation resumes within tEID after EN rises above VIH. Crucially, EN has no effect if VDDI is below its UVLO threshold - in that case, outputs remain low due to logic supply undervoltage, not EN state. This dual-layer safety behavior is explicitly defined in Table 2 and Section 4.4.2 of the SI82F39x datasheet.
Is the SI82F39ECC-IS1 qualified for automotive applications, and what does its AEC-Q100 rating cover?
Yes, the SI82F39ECC-IS1 is AEC-Q100 qualified and built using automotive-specific manufacturing flows at all process steps to ensure low defectivity and robustness. Its qualification covers Grade 1 temperature range (–40 °C to +125 °C), ESD tolerance (4 kV HBM), and reliability testing per AEC-Q100 Rev G. This makes the SI82F39ECC-IS1 suitable for automotive applications including onboard chargers, DC-DC converters, and motor control units where extended lifetime and failure-mode predictability are mandatory.
SI82F39ECC-IS1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82F39ECC-IS1 FAQ
1.How can I place an order for SI82F39ECC-IS1 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82F39ECC-IS1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82F39ECC-IS1 reliable?
The price and inventory of SI82F39ECC-IS1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82F39ECC-IS1 is usually 5 days.
3.What payment methods are accepted for SI82F39ECC-IS1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82F39ECC-IS1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82F39ECC-IS1?
SI82F39ECC-IS1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82F39ECC-IS1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82F39ECC-IS1?
For technical support, including SI82F39ECC-IS1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82F39ECC-IS1 requirements.
6.How does Aetrix verify that SI82F39ECC-IS1 is sourced from the original manufacturer or authorized distributors?
All SI82F39ECC-IS1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82F39ECC-IS1 meets industry standards.
7.What is the process for return or replacement of SI82F39ECC-IS1?
All SI82F39ECC-IS1 units undergo pre-shipment inspection (PSI). If there is an issue with SI82F39ECC-IS1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82F39ECC-IS1 part is unused and in its original packaging.
Return procedure for SI82F39ECC-IS1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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