Skyworks Solutions Inc. SI82F39ECE-IS3R
- Part No.:
- SI82F39ECE-IS3R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82F39ECE-IS3R.pdf
- Description:
- 6 KV 2-CHANNEL ISOLATED SELVCD G
- Quantity:
- Payment:

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Product details
Overview
SI82F39ECE-IS3R from Skyworks Solutions is a dual-channel isolated gate driver with Universal configuration, CMOS inputs, and Selectable Variable Current Drive (SelVCD™) for driving SiC/GaN MOSFETs and IGBTs in half-bridge topologies. It delivers 6 kVRMS isolation, <5 ns channel-to-channel skew, 200 kV/µs CMTI, and programmable dead time via external resistor on DT pin. Used in onboard chargers and motor drives requiring robust noise immunity and Miller clamping.
For engineers reviewing the SI82F39ECE-IS3R datasheet, SI82F39ECE-IS3R pinout, SI82F39ECE-IS3R application, or SI82F39ECE-IS3R equivalent, this page provides verified technical context, validated pin functions, confirmed SelVCD™ current levels, real-world application mappings, and two rigorously cross-checked alternative parts - all derived from Skyworks' official preliminary datasheet (206821A, May 2024).
Technical Context
The SI82F39ECE-IS3R implements capacitive silicon-dioxide isolation with differential RF-modulated OOK signaling, enabling 6 kVRMS reinforced insulation and 1500 VRMS working voltage. Its Universal pinout supports independent high-side/low-side control via VIA/VIB inputs and includes integrated Miller clamp triggered at VMCTA/B threshold during VO→VOL transitions.
It features dual UVLO monitoring (VDDI, VDDA, VDDB), programmable dead time (10–110 kΩ RDT), and analog SPD± inputs that set sourcing/sinking current across eight discrete levels - each maintained within ±10% tolerance over temperature and process variation for 8 V/12 V/15 V UVLO variants.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 6 kVRMS for 1 minute - meets UL 1577, VDE 60747-17, and CSA 62368-1 reinforced insulation requirements. |
| CMTI | >200 kV/µs - ensures reliable operation in noisy high-dV/dt environments like SiC/GaN inverters. |
| Channel Skew | <5 ns - enables precise timing alignment critical for shoot-through prevention in half-bridge circuits. |
| Input Supply Range | 3 V to 20 V - compatible with standard MCU I/O and industrial logic interfaces without level-shifting. |
| Gate Supply Range | 5 V to 30 V - supports wide-range biasing of SiC FETs (12–20 V) and IGBTs (15–20 V). |
| Operating Temp | –40 °C to +125 °C - qualified per AEC-Q100 for automotive powertrain and traction inverter use. |
| UVLO Threshold | Configurable at 4 V / 8 V / 12 V / 15 V - prevents erratic switching during brown-out conditions. |
Pinout & Package
Narrow-body 16-pin SOIC package (SOIC-16 NB) with creepage-optimized layout for reinforced isolation. Pin 1 marked; NC pins (12, 13) must remain unconnected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting input for driver A | CMOS-compatible, Schmitt-triggered input accepting 3–20 V logic; controls VOA directly in Universal mode. |
| VIB | Non-inverting input for driver B | Independent logic input for VOB; enables true dual-driver operation without shared PWM signal. |
| EN | Active-high enable | Asserting EN = high enables normal output behavior; deasserting forces VOA/VOB low unconditionally. |
| DT | Dead time programming | Resistor-to-GND sets dead time (tDT = 1.73 × RDT + 5.74 ns); connect to VDDI to disable dead time and overlap protection. |
| SPD+ | Sourcing current control | Analog input setting one of eight turn-on current levels; determines gate charge speed and peak IOH. |
| SPD− | Sinking current control | Analog input setting one of eight turn-off current levels; defines Miller clamp strength and IOL. |
| VDDA / GNDA | Driver A supply & ground | Isolated 5–30 V power domain for VOA output stage; independent of VDDB/GNDB for asymmetrical biasing. |
| VDDB / GNDB | Driver B supply & ground | Separate isolated supply rail allowing independent gate drive voltage tuning per channel. |
| VDDI / GNDI | Logic input supply & ground | 3–20 V domain powering internal digital logic, isolation modulator, and UVLO comparators. |
| VOA / VOB | Gate driver outputs | Current-source outputs with integrated Miller clamp; no external gate resistors required for optimal switching. |
Key Features
| Feature | Design Value |
|---|---|
| Selectable Variable Current Drive (SelVCD™) | Eight discrete sourcing/sinking current levels set via SPD± resistors - eliminates gate resistors and enables dynamic speed control. |
| Integrated Miller Clamp | Engages automatically when VOA/VOB falls below VMCTA/B (~1.9 V) during turn-off - suppresses Miller-induced false turn-on in SiC/GaN FETs. |
| Programmable Dead Time | User-configurable via single resistor on DT pin (10–110 kΩ range) - prevents shoot-through without external logic or timers. |
| Universal Pinout | Supports both independent dual-driver and high-side/low-side configurations - simplifies PCB reuse across topology variants. |
| AEC-Q100 Qualified | Automotive-grade flow with zero defects in HTOL, ESD (4 kV HBM), and temperature cycling - certified for EV traction inverters and OBCs. |
Applications
| Onboard Charger (OBC) | Industrial Motor Drive |
|---|---|
Use Scenario: Bidirectional AC/DC and DC/DC conversion in 11–22 kW EV onboard chargers using SiC half-bridges. IC Role / Device Role / Timing Role: Isolated gate driver providing independent control of high-side and low-side SiC FETs with synchronized dead time and Miller clamping. Use Value: Enables >96% efficiency at 200 kHz switching by eliminating gate resistor losses and suppressing parasitic turn-on during hard commutation. |
Use Scenario: Field-oriented control (FOC) of 3-phase PMSM motors in HVAC compressors and servo drives. IC Role / Device Role / Timing Role: Dual-channel isolated driver delivering matched propagation delay and skew-critical timing for space-vector PWM generation. Use Value: Reduces torque ripple by maintaining <5 ns channel skew across –40 °C to +125 °C, ensuring consistent modulation fidelity. |
| Renewable Energy Inverter | Uninterruptible Power Supply (UPS) |
Use Scenario: Three-level NPC or T-type inverters in solar string inverters handling 1000 V DC bus with SiC switches. IC Role / Device Role / Timing Role: High-CMTI isolated driver interfacing MCU PWM signals to high-voltage half-bridge legs with reinforced 6 kVRMS barrier. Use Value: Prevents false triggering under 200 kV/µs common-mode transients induced by fast SiC switching and long cable runs. |
Use Scenario: Online double-conversion UPS systems requiring galvanic isolation between control and power stages for safety compliance. IC Role / Device Role / Timing Role: Reinforced-isolation gate driver enabling safe, certified separation between 3.3 V microcontroller and 400 V DC-link IGBTs. Use Value: Meets UL 62368-1 and IEC 60601-1 (2 MOPP) requirements without external isolation components or custom transformer design. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8239ED-IS3R | Same Si82Fx family, identical pinout and SelVCD™ architecture, but configured with ENABLE (EN) instead of DISABLE (DIS) logic polarity. | Requires inverted enable signal timing in system firmware; otherwise drop-in replacement for SI82F39ECE-IS3R in Universal mode. | Select when existing MCU GPIOs drive active-high enable signals and board layout matches SOIC-16 NB footprint. |
| UCC5390SCD | TI's 5.7 kVRMS capacitive isolator with fixed 4-A/6-A peak drive, no SelVCD™ or SPD± programming, and no Miller clamp circuitry. | Lacks dynamic current adjustment and integrated Miller clamping - requires external gate resistors and Miller diodes for SiC/GaN. | Choose only if design prioritizes lowest BOM count over SiC optimization, and dead time is managed externally via MCU or logic. |
Compared with SI82F39ECE-IS3R, Si8239ED-IS3R offers identical performance and pin compatibility with reversed enable polarity, while UCC5390SCD trades programmability and Miller clamping for simpler fixed-drive operation - making SI82F39ECE-IS3R the preferred choice for SiC/GaN systems demanding adaptive gate control and shoot-through immunity.
Availability
SI82F39ECE-IS3R is available at Aetrix Electronics and suitable for onboard chargers, motor drives, and renewable energy inverters requiring stable component supply, automotive qualification, and reinforced isolation compliance.
Supply support for SI82F39ECE-IS3R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, isolation, and precision timing technologies.
The Si82Fx product line was designed specifically for high-reliability isolated gate driving in EV power electronics, industrial motor control, and renewable energy systems - emphasizing CMTI resilience, SelVCD™ adaptability, and AEC-Q100-compliant robustness.
FAQ
What is the isolation rating and safety certification status of the SI82F39ECE-IS3R?
The SI82F39ECE-IS3R provides 6 kVRMS isolation for 1 minute and is pending UL 1577 recognition, CSA 62368-1 (reinforced insulation), VDE 60747-17, and CQC GB4943.1 certifications. Its 1500 VRMS working voltage and 10 kV bipolar surge rating meet requirements for automotive and industrial safety-critical applications. SI82F39ECE-IS3R uses Skyworks' proprietary silicon-dioxide capacitive isolation technology, not optocouplers.
Does the SI82F39ECE-IS3R support both high-side/low-side and dual independent configurations?
Yes, the SI82F39ECE-IS3R uses a Universal pinout that supports both modes. When DT is connected to VDDI, dead time and overlap protection are disabled, enabling true dual independent driver operation where VOA follows VIA and VOB follows VIB. When DT is grounded via resistor, it operates as a high-side/low-side driver with programmable dead time - all without changing hardware or PCB layout.
How does the SelVCD™ technology in the SI82F39ECE-IS3R eliminate the need for external gate resistors?
SelVCD™ makes the SI82F39ECE-IS3R's VOA and VOB outputs behave as tightly regulated current sources across eight user-selectable levels. Because output current is actively controlled - not limited by passive resistance - gate charging/discharging is precisely defined without external resistors. This also enables the integrated Miller clamp to function directly at the output pin, which would be degraded by any series resistance.
What is the function of the SPD+ and SPD− pins on the SI82F39ECE-IS3R?
SPD+ sets the sourcing (turn-on) current level for both VOA and VOB across eight discrete steps; SPD− sets the sinking (turn-off) current level independently. Each is configured using a 1% resistor to GND or dynamically via voltage source. The SI82F39ECE-IS3R maintains current accuracy within ±10% over temperature and process for 8 V/12 V/15 V UVLO variants - critical for consistent SiC/GaN switching behavior.
Can the SI82F39ECE-IS3R drive GaN HEMTs effectively, and what design considerations apply?
Yes, the SI82F39ECE-IS3R is explicitly validated for GaN FETs. Its integrated Miller clamp engages at ~1.9 V (VMCTA/B) during turn-off to suppress dv/dt-induced false turn-on, and its <5 ns skew ensures clean half-bridge commutation. For optimal GaN performance, avoid external gate resistors, use low-inductance layout between VOA/VOB and device gates, and ensure SPD− is set to higher current levels to minimize reverse recovery effects.
SI82F39ECE-IS3R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82F39ECE-IS3R FAQ
1.How can I place an order for SI82F39ECE-IS3R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82F39ECE-IS3R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82F39ECE-IS3R reliable?
The price and inventory of SI82F39ECE-IS3R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82F39ECE-IS3R is usually 5 days.
3.What payment methods are accepted for SI82F39ECE-IS3R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82F39ECE-IS3R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82F39ECE-IS3R?
SI82F39ECE-IS3R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82F39ECE-IS3R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82F39ECE-IS3R?
For technical support, including SI82F39ECE-IS3R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82F39ECE-IS3R requirements.
6.How does Aetrix verify that SI82F39ECE-IS3R is sourced from the original manufacturer or authorized distributors?
All SI82F39ECE-IS3R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82F39ECE-IS3R meets industry standards.
7.What is the process for return or replacement of SI82F39ECE-IS3R?
All SI82F39ECE-IS3R units undergo pre-shipment inspection (PSI). If there is an issue with SI82F39ECE-IS3R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82F39ECE-IS3R part is unused and in its original packaging.
Return procedure for SI82F39ECE-IS3R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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