Skyworks Solutions Inc. SI82F39EEC-IS1R
- Part No.:
- SI82F39EEC-IS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82F39EEC-IS1R.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED SELVC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI82F39EEC-IS1R from Skyworks Solutions is a dual-channel isolated gate driver with Universal configuration, CMOS inputs, and Selectable Variable Current Drive (SelVCD™) for driving SiC/GaN MOSFETs and IGBTs in half-bridge topologies. It delivers 6 kVRMS isolation, <5 ns channel-to-channel skew, 200 kV/μs CMTI, 3–20 V input supply range, and integrated Miller clamp - enabling robust motor drives and onboard chargers.
For engineers reviewing the SI82F39EEC-IS1R datasheet, SI82F39EEC-IS1R pinout, SI82F39EEC-IS1R application, or SI82F39EEC-IS1R equivalent, key selection criteria include its EN-controlled Universal mode, SPD± programmable sourcing/sinking current (8 levels), dead time programmability via external resistor, AEC-Q100 qualification, and narrow-body SOIC-16 package with reinforced insulation per IEC 62368-1 and IEC 60747-17.
Technical Context
The SI82F39EEC-IS1R implements dual capacitive isolation using silicon dioxide barriers, supporting differential RF-modulated signal transmission with OOK encoding for high noise immunity and precise timing. Its logic side uses Schmitt-triggered CMOS inputs with optional deglitch filtering, while the output stage operates as a precision current source with ±10% tolerance over temperature and process variation.
This device supports Universal pinout (VIA/VIB control) with active-high EN enable, programmable dead time via DT pin (10–110 kΩ resistor), and independent SPD+ (sourcing) and SPD− (sinking) analog programming. UVLO thresholds are factory-set at 8 V (VDDA/B), ensuring reliable turn-on only when gate supplies exceed safe operating margins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 6 kVRMS for 1 minute - meets UL 1577, VDE 60747-17, and CSA 62368-1 reinforced insulation requirements. |
| Channel Skew | <5 ns - enables precise synchronous switching in high-frequency half-bridge inverters without timing-induced shoot-through risk. |
| CMTI | >200 kV/μs - ensures reliable operation in noisy power converter environments with fast dV/dt transients. |
| Input Supply Range | 3 V to 20 V - compatible with 3.3 V, 5 V, and 15 V logic controllers without level-shifting. |
| Gate Drive Supply | 5 V to 30 V - supports wide-range gate biasing for SiC FETs (15–20 V) and IGBTs (15 V). |
| SelVCD™ Levels | 8 discrete sourcing/sinking current settings - eliminates external gate resistors and enables dynamic speed tuning. |
| Operating Temp | –40 °C to +125 °C - qualified for automotive under-hood and industrial motor drive applications. |
Pinout & Package
Narrow-body 16-pin SOIC package (SOIC-16 NB) with creepage ≥8.3 mm and clearance ≥8.3 mm; RoHS-compliant, halogen-free, and rated for 1500 VRMS working voltage.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input for channel A | Directly controls VOA output state; high = VOA high (subject to EN/UVLO/DT conditions). |
| VIB | Non-inverting logic input for channel B | Directly controls VOB output state; high = VOB high (subject to EN/UVLO/DT conditions). |
| EN | Active-high enable input | Drives both VOA and VOB low when logic low; enables normal operation when high (≥2.0 V). |
| DT | Dead time programming input | Resistor-to-GND sets dead time (10–110 kΩ → ~10–110 ns); connect to VDDI to disable dead time and overlap protection. |
| SPD+ | Sourcing current programming input | Analog input setting VOA/VOB turn-on current level (8 options); resistor-to-GND selects fixed level. |
| SPD− | Sinking current programming input | Analog input setting VOA/VOB turn-off current level (8 options); resistor-to-GND selects fixed level. |
| VDDI | Logic input supply | 3–20 V supply for internal digital circuitry and isolation barrier; powers UVLO monitoring. |
| GNDI | Logic ground reference | Return path for VDDI and all logic-side pins; galvanically isolated from power-side grounds. |
| VDDA / GNDA | Channel A gate driver supply/ground | 5–30 V isolated supply for VOA output stage; GNDA is dedicated return for channel A only. |
| VDDB / GNDB | Channel B gate driver supply/ground | 5–30 V isolated supply for VOB output stage; GNDB is dedicated return for channel B only. |
| VOA / VOB | Isolated gate driver outputs | Current-source outputs with integrated Miller clamp; directly drive MOSFET/IGBT gates without external resistors. |
| NC | No-connect pins (pins 12 & 13) | Internally unconnected; must remain floating - no PCB trace or component connection permitted. |
Key Features
| Feature | Design Value |
|---|---|
| Selectable Variable Current Drive (SelVCD™) | 8-level programmable sourcing/sinking current per channel - replaces gate resistors and enables adaptive switching speed control. |
| Integrated Miller Clamp | Automatically engages during VOH→VOL transition when VOA/B falls below VMCTA/B - suppresses Miller-induced false turn-on without external components. |
| Programmable Dead Time | Resistor-adjustable delay (10–110 ns typical) between VOA/VOB transitions - prevents shoot-through in half-bridge configurations. |
| AEC-Q100 Qualified | Grade 1 (–40 °C to +125 °C) qualification with automotive-specific manufacturing flow - supports ASIL-B system integration. |
| High CMTI & Low Skew | 200 kV/μs common-mode transient immunity and <5 ns channel-to-channel skew - ensures timing integrity in high-dV/dt power stages. |
Applications
| Motor Drives | Onboard Chargers (OBC) |
|---|---|
Use Scenario: Three-phase inverter driving permanent magnet synchronous motors in EV traction inverters or industrial servo systems. IC Role / Device Role / Timing Role: Dual isolated gate driver providing synchronized, skew-controlled turn-on/off of high-side and low-side SiC FETs in each leg. Use Value: Enables >100 kHz switching with minimal dead time overhead and zero external gate resistors - reducing BOM count and layout complexity. |
Use Scenario: Bidirectional AC/DC and DC/DC conversion in electric vehicle onboard chargers with GaN-based totem-pole PFC and LLC resonant stages. IC Role / Device Role / Timing Role: Isolated driver for high-frequency half-bridge switches, leveraging SelVCD™ to optimize EMI and efficiency across load conditions. Use Value: Programmable current drive allows dynamic adjustment of dv/dt during light-load burst mode - improving acoustic noise and standby efficiency. |
| Isolated Switched-Mode Supplies | Power Inverters |
Use Scenario: High-density 1–3 kW isolated DC/DC converters using active-clamp forward or phase-shifted full-bridge topologies. IC Role / Device Role / Timing Role: Universal-configured driver controlling primary-side synchronous rectifiers and secondary-side switches with independent UVLO monitoring. Use Value: Dual independent UVLO (VDDA/VDDB) ensures safe gate drive only when both primary and secondary rails are valid - preventing latch-up or shoot-through. |
Use Scenario: Grid-tied solar inverters and UPS systems requiring high-reliability isolation and surge immunity (4 kV HBM, 10 kV bipolar surge). IC Role / Device Role / Timing Role: Reinforced-isolation driver for IGBT modules in three-level NPC or T-type inverter legs, with Miller clamp suppressing parasitic turn-on. Use Value: 6 kVRMS isolation and 1500 VRMS working voltage meet IEC 62109 and UL 1741 safety standards for photovoltaic and energy storage systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8239ED-IS1R | Same Si82Fx family, but with Disable (DIS) input instead of Enable (EN); identical pinout, isolation, and SelVCD™ capability. | Preferred where system-level fault handling requires active-high disable (e.g., hardware safety interlocks). | Select SI82F39EEC-IS1R for EN-active control; choose Si8239ED-IS1R if DIS logic better matches host controller architecture. |
| UCC5390SCDR | Texas Instruments part with 5.7 kVRMS isolation, 150 kV/μs CMTI, and fixed 4-A peak drive - lacks SelVCD™, SPD± programming, and Miller clamp. | Suitable for cost-sensitive industrial inverters where fixed drive strength suffices and dynamic tuning is unnecessary. | Choose SI82F39EEC-IS1R when Miller clamping, programmable slew rate, or AEC-Q100 compliance are required; UCC5390SCDR fits simpler, non-automotive designs. |
Compared with Si8239ED-IS1R, SI82F39EEC-IS1R provides identical isolation and drive performance but uses EN instead of DIS for system-level control - making it preferable in architectures where enable signaling aligns with power sequencing. Against UCC5390SCDR, SI82F39EEC-IS1R adds critical automotive-grade features, adaptive current drive, and integrated Miller clamping - justifying its use in high-reliability, high-efficiency SiC/GaN systems.
Availability
SI82F39EEC-IS1R is available at Aetrix Electronics and suitable for motor drives, onboard chargers, and isolated switched-mode supplies requiring stable component supply, long-term lifecycle support, and automotive-grade reliability.
Supply support for SI82F39EEC-IS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for wireless, automotive, and industrial markets.
The Si82Fx family was designed specifically for high-reliability isolated gate driving in next-generation power electronics - targeting SiC and GaN-based motor drives, EV charging, and renewable energy inverters with emphasis on CMTI, skew, and integrated protection.
FAQ
What is the isolation rating and safety certification status of the SI82F39EEC-IS1R?
The SI82F39EEC-IS1R provides 6 kVRMS isolation for 1 minute and is pending UL 1577 recognition, CSA 62368-1 (reinforced insulation), VDE 60747-17, and CQC GB4943.1 certifications. Its 1500 VRMS working voltage and 10 kV bipolar surge rating meet requirements for industrial and automotive power systems. All certifications apply directly to the SI82F39EEC-IS1R device as specified in Skyworks' preliminary datasheet 206821A.
Does the SI82F39EEC-IS1R support both high-side/low-side and dual independent configurations?
Yes - the SI82F39EEC-IS1R uses the Universal pinout (VIA/VIB inputs) and can operate as either a high-side/low-side driver with dead time insertion (via DT resistor) or as a dual independent driver (by connecting DT to VDDI to disable dead time and overlap protection). This flexibility is confirmed in Figures 2 and 14 of the SI82F39EEC-IS1R datasheet and applies specifically to this part number's bond-out.
How does the SelVCD™ technology in the SI82F39EEC-IS1R eliminate the need for external gate resistors?
SelVCD™ makes the SI82F39EEC-IS1R's VOA and VOB outputs behave as tightly regulated current sources (±10% tolerance) across temperature and process variation. By directly programming sourcing (SPD+) and sinking (SPD−) current levels, the driver controls dv/dt without series gate resistors - and integrates a Miller clamp that activates automatically during turn-off to suppress parasitic turn-on. This is explicitly documented in Section 4.6 of the SI82F39EEC-IS1R datasheet.
What UVLO thresholds are implemented in the SI82F39EEC-IS1R?
The SI82F39EEC-IS1R has factory-configured UVLO thresholds of 8 V on VDDA and VDDB, and 4 V on VDDI - as defined in Skyworks' ordering guide and verified in Table 2 (Truth Table) and Section 4.3 of the SI82F39EEC-IS1R preliminary datasheet. These values ensure safe gate drive only when gate supplies exceed minimum conduction thresholds, preventing partial turn-on of power devices.
Is the SI82F39EEC-IS1R pin-compatible with other Si82Fx variants like SI82F29 or SI82F89?
No - the SI82F39EEC-IS1R uses the Si82F39x Universal configuration with EN input and VIA/VIB control, whereas SI82F29x uses DIS input and SI82F89x uses PWM input with High-Side/Low-Side pinout. Pinouts differ across families (see Figures 1–4), and NC pin locations vary. Direct substitution is not supported; the SI82F39EEC-IS1R must be used with its designated schematic and layout per Figure 2 of the datasheet.
SI82F39EEC-IS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82F39EEC-IS1R FAQ
1.How can I place an order for SI82F39EEC-IS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82F39EEC-IS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82F39EEC-IS1R reliable?
The price and inventory of SI82F39EEC-IS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82F39EEC-IS1R is usually 5 days.
3.What payment methods are accepted for SI82F39EEC-IS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82F39EEC-IS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82F39EEC-IS1R?
SI82F39EEC-IS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82F39EEC-IS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82F39EEC-IS1R?
For technical support, including SI82F39EEC-IS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82F39EEC-IS1R requirements.
6.How does Aetrix verify that SI82F39EEC-IS1R is sourced from the original manufacturer or authorized distributors?
All SI82F39EEC-IS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82F39EEC-IS1R meets industry standards.
7.What is the process for return or replacement of SI82F39EEC-IS1R?
All SI82F39EEC-IS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI82F39EEC-IS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82F39EEC-IS1R part is unused and in its original packaging.
Return procedure for SI82F39EEC-IS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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