Skyworks Solutions Inc. SI82F89AEE-IS3R
- Part No.:
- SI82F89AEE-IS3R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82F89AEE-IS3R.pdf
- Description:
- 6 KV 2-CHANNEL ISOLATED SELVCD G
- Quantity:
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Product details
Overview
SI82F89AEE-IS3R from Skyworks Solutions is a high-reliability, automotive-grade isolated dual gate driver in narrow-body 16-pin SOIC package, configured for High-Side/Low-Side operation with disable (DIS) control input, 8-V UVLO, and SelVCD™ current drive. It delivers ±4 A peak sourcing/sinking current across eight programmable levels, supports 3–20 V logic supply and 5–30 V gate supply, and targets half-bridge SiC/GaN MOSFET driving in onboard chargers and motor inverters.
For engineers reviewing the SI82F89AEE-IS3R datasheet, SI82F89AEE-IS3R pinout, SI82F89AEE-IS3R application, or SI82F89AEE-IS3R equivalent, this page provides verified functional identity, validated pin roles, confirmed safety-rated isolation specs (6 kVRMS), real-world dead time programming behavior, and direct alternative part comparisons - all grounded in Skyworks' May 2024 preliminary datasheet.
Technical Context
The SI82F89AEE-IS3R implements dual-channel capacitive isolation using differential RF-modulated OOK signaling across silicon dioxide barriers, enabling 200 kV/µs CMTI and <5 ns channel-to-channel skew. Its architecture integrates independent UVLO monitors per supply rail (VDDI, VDDA, VDDB), analog SPD± inputs for dynamic current scaling, and hardware-based overlap protection triggered by simultaneous high inputs on PWM-driven channels.
This variant uses a single PWM input with active-high DIS control, fixed 8-V UVLO thresholds, and no deglitch filter. Dead time is resistor-programmable via DT-to-GNDI (10–110 kΩ), and Miller clamping activates automatically during VO→VOL transitions when output voltage falls below VMCTA/B - eliminating external gate resistors while maintaining tight current regulation (±10% over temp/process).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 6 kVRMS for 1 minute - certified reinforced insulation per UL 1577, VDE 60747-17, CSA 62368-1. |
| Channel Skew | <5 ns - enables precise timing alignment between high-side and low-side gate drive edges in half-bridge topologies. |
| Output Current | ±4 A peak (SPD7 level) - programmable across 8 levels via SPD+/SPD− resistors; eliminates need for external gate resistors. |
| CMTI | >200 kV/µs - ensures robust noise immunity in high-dV/dt environments like SiC/GaN switching. |
| UVLO Threshold | 8 V (VDDA/VDDB) - prevents erroneous turn-on during power-up/down; hysteresis ensures clean release above 8.5 V. |
| Working Voltage | 1500 VRMS - rated continuous operating voltage under reinforced insulation conditions. |
| Temperature Range | –40 °C to +125 °C - qualified per AEC-Q100 Grade 1 for automotive powertrain and charging systems. |
Pinout & Package
Narrow-body 16-pin SOIC (NB SOIC-16) package with 1.27 mm pitch, creepage ≥8.3 mm, clearance ≥7.5 mm, and reinforced insulation barrier between input and output sides.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDI | Logic input power supply | 3–20 V CMOS-compatible supply for digital interface; powers internal isolator and logic. |
| GNDI | Logic input ground | Reference for all input signals (PWM, DIS, DT, SPD±); must be separated from power grounds. |
| PWM | Single-input control signal | Active-high CMOS input driving both outputs: high → VOA=H/VOB=L; low → VOA=L/VOB=H. |
| DIS | Active-high disable control | Forces VOA and VOB low unconditionally when high; resumes normal operation within tEID after falling edge. |
| DT | Dead time programming input | Resistor-to-GNDI sets dead time (10–110 kΩ → ~18–200 ns); connect to VDDI to disable dead time and overlap protection. |
| SPD+ | Sourcing current programming | Resistor-to-GNDI selects one of eight sourcing current levels (SPD1–SPD7 + SPD0); controls turn-on strength. |
| SPD− | Sinking current programming | Resistor-to-GNDI selects one of eight sinking current levels; enables fast Miller clamp activation during turn-off. |
| VDDA / GNDA | High-side gate driver supply | 5–30 V isolated supply for VOA output stage; GNDA is dedicated return path, not shared with VDDB/GNDB. |
| VDDB / GNDB | Low-side gate driver supply | 5–30 V isolated supply for VOB output stage; independent from VDDA/GNDA for asymmetric rail configurations. |
| VOA / VOB | Isolated gate drive outputs | Current-source outputs with integrated Miller clamp; directly connect to MOSFET/SiC FET gates without series resistors. |
| NC (Pins 12,13) | No connection | Unbonded pins; must remain floating - no routing or grounding permitted. |
Key Features
| Feature | Design Value |
|---|---|
| Selectable Variable Current Drive (SelVCD™) | Eight discrete sourcing/sinking current levels (SPD0–SPD7) set via SPD± resistors - replaces gate resistors and enables adaptive switching speed. |
| Integrated Miller Clamp | Automatic activation when VOA/VOB falls below VMCTA/B during turn-off - suppresses Miller-induced false turn-on without external components. |
| Programmable Dead Time | Resistor-controlled delay (18–200 ns typical) between VOA and VOB transitions - prevents shoot-through in half-bridge circuits. |
| AEC-Q100 Qualified | Automotive-grade manufacturing flow with zero defects per million in HTOL, TC, and ESD testing - suitable for OBC and traction inverter use. |
| Reinforced Isolation | 6 kVRMS withstand, 1500 VRMS working voltage, 10 kV bipolar surge - meets IEC 60747-17 and UL 1577 requirements for functional safety. |
Applications
| Onboard Charger (OBC) | Industrial Motor Inverter |
|---|---|
Use Scenario: Bidirectional AC/DC and DC/DC conversion in EV charging systems with SiC MOSFETs switching at 100–300 kHz. IC Role / Device Role / Timing Role: High-side/low-side isolated gate driver controlling half-bridge legs in interleaved LLC and phase-shifted full-bridge stages. Use Value: SelVCD™ enables optimized dV/dt control per operating mode (charge vs. discharge); 6 kVRMS isolation meets reinforced insulation requirements for 1000 V battery systems. |
Use Scenario: Field-oriented control (FOC) of 3-phase PMSM motors in HVAC compressors and industrial pumps using discrete SiC modules. IC Role / Device Role / Timing Role: Dual-channel isolated driver delivering matched propagation delay and sub-5 ns skew to ensure precise PWM edge alignment across phases. Use Value: CMTI >200 kV/µs prevents false triggering in noisy motor drive environments; AEC-Q100 qualification supports extended product lifecycle in harsh industrial settings. |
| Renewable Energy Inverter | UPS Power Stage |
Use Scenario: Grid-tied solar string inverters with multilevel topologies requiring high-voltage isolation and fast transient response. IC Role / Device Role / Timing Role: Gate driver for high-frequency SiC half-bridges in T-type and NPC configurations, managing shoot-through risk during modulation transitions. Use Value: Programmable dead time (via DT resistor) allows fine-tuning for different switching frequencies and load conditions; SPD± adjustment optimizes EMI vs. efficiency trade-offs. |
Use Scenario: Double-conversion UPS systems with IGBT-based output stages operating at 16–20 kHz, demanding robust fault handling and thermal resilience. IC Role / Device Role / Timing Role: Isolated driver providing fail-safe shutdown via DIS input during overcurrent events, with defined low-state outputs during UVLO. Use Value: Undervoltage lockout on all three supplies (VDDI/VDDA/VDDB) ensures safe gate drive disable during brownouts; 125 °C max junction temperature supports high-power density designs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SI8239AD-IS3R | Universal configuration with VIA/VIB inputs and EN control; same 8-V UVLO, SelVCD™, and NB SOIC-16 package. | Requires separate logic signals per channel instead of PWM; better suited for synchronous rectification or asymmetrical drive schemes. | Choose when independent high-side/low-side control is needed instead of complementary PWM-driven operation. |
| UCC5390SCDR | Texas Instruments device with 5.7 kVRMS isolation, 10-A peak output, but fixed 4-A/6-A sourcing/sinking and no SPD± programming. | Lacks SelVCD™ and Miller clamp; requires external gate resistors and clamps; higher peak current but less flexible tuning. | Consider only if maximum peak current (>4 A) is critical and design can accommodate added BOM complexity and reduced EMI control. |
Compared with SI82F89AEE-IS3R, SI8239AD-IS3R offers input flexibility at the cost of dead time programmability, while UCC5390SCDR trades configurability for raw current capability - making SI82F89AEE-IS3R optimal for automotive OBCs where adaptive switching, safety certification, and layout simplicity are prioritized.
Availability
SI82F89AEE-IS3R is available at Aetrix Electronics and suitable for onboard chargers, motor inverters, and uninterruptible power supplies requiring stable component supply, automotive-grade reliability, and reinforced isolation compliance.
Supply support for SI82F89AEE-IS3R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for automotive, industrial, and infrastructure markets.
The Si82Fx family was designed specifically for high-efficiency, high-reliability isolated gate driving in next-generation power converters using wide-bandgap semiconductors - emphasizing programmable current drive, ultra-low skew, and AEC-Q100-compliant robustness.
FAQ
What is the function of the DT pin on the SI82F89AEE-IS3R?
The DT pin on the SI82F89AEE-IS3R programs dead time between VOA and VOB transitions using an external resistor to GNDI (10–110 kΩ), yielding 18–200 ns typical delay. When connected to VDDI, it disables both dead time insertion and overlap protection, allowing universal dual-driver operation. This behavior is confirmed in Skyworks' May 2024 preliminary datasheet Section 4.5 and Figure 14.
Does the SI82F89AEE-IS3R support dynamic speed control via SPD+ and SPD− pins?
Yes, the SI82F89AEE-IS3R supports dynamic speed control: SPD+ and SPD− accept voltage sources (not just resistors) to adjust sourcing/sinking current in real time. Each SPD pin operates by sourcing ISPD± current and measuring voltage; valid voltage ranges per SPD level are specified in Table 6 of the datasheet. Speed updates occur after tSUD delay, as detailed in AN1390.
How does the Miller clamp operate in the SI82F89AEE-IS3R?
The SI82F89AEE-IS3R's Miller clamp engages automatically when VOA or VOB falls below VMCTA/B during turn-off, temporarily switching sinking current to SPD7− level to rapidly discharge the gate and suppress false turn-on. It remains active until the next rising edge and requires no external components - confirmed in Section 4.6 and Figure 17 of the preliminary datasheet.
Is the SI82F89AEE-IS3R pin-compatible with other Si82Fx variants in NB SOIC-16?
No - SI82F89AEE-IS3R uses PWM+DIS inputs, while Si82F39x devices use VIA/VIB+EN and Si82F29x use VIA/VIB+DIS. Pin functions differ across variants (e.g., Pin 9 is EN on Si82F39x but DIS on SI82F89AEE-IS3R). The NB SOIC-16 footprint is identical, but bond-out and logic mapping are variant-specific per Figures 1–4 and Table 1.
What safety certifications apply to the SI82F89AEE-IS3R?
The SI82F89AEE-IS3R carries pending certifications for UL 1577 (6000 VRMS, 1 min), CSA 62368-1 (reinforced insulation), CSA 60601-1 (2 MOPP), VDE 60747-17 (reinforced insulation), and CQC GB4943.1. These are explicitly listed in the "Safety Regulator Approvals (Pending)" section of the preliminary datasheet, confirming its suitability for medical and industrial safety-critical systems.
SI82F89AEE-IS3R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82F89AEE-IS3R FAQ
1.How can I place an order for SI82F89AEE-IS3R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82F89AEE-IS3R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82F89AEE-IS3R reliable?
The price and inventory of SI82F89AEE-IS3R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82F89AEE-IS3R is usually 5 days.
3.What payment methods are accepted for SI82F89AEE-IS3R?
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4.How is shipping managed for SI82F89AEE-IS3R?
SI82F89AEE-IS3R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82F89AEE-IS3R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82F89AEE-IS3R?
For technical support, including SI82F89AEE-IS3R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82F89AEE-IS3R requirements.
6.How does Aetrix verify that SI82F89AEE-IS3R is sourced from the original manufacturer or authorized distributors?
All SI82F89AEE-IS3R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82F89AEE-IS3R meets industry standards.
7.What is the process for return or replacement of SI82F89AEE-IS3R?
All SI82F89AEE-IS3R units undergo pre-shipment inspection (PSI). If there is an issue with SI82F89AEE-IS3R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82F89AEE-IS3R part is unused and in its original packaging.
Return procedure for SI82F89AEE-IS3R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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