Skyworks Solutions Inc. SI82F89AGC-IS1
- Part No.:
- SI82F89AGC-IS1
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82F89AGC-IS1.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED SELVC
- Quantity:
- Payment:

- Shipping:

Inventory:3,825
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI82F89AGC-IS1 from Skyworks Solutions is a high-voltage isolated dual-channel gate driver with High-Side/Low-Side configuration and active-low DISABLE (DIS) input, designed for half-bridge power stages driving SiC/GaN FETs, IGBTs, and MOSFETs. It delivers 6 kVRMS isolation, <5 ns channel-to-channel skew, 200 kV/µs CMTI, and Selectable Variable Current Drive (SelVCD™) across eight sourcing/sinking levels. Used in onboard chargers and motor drives requiring precise dead-time control and Miller clamping.
For engineers reviewing the SI82F89AGC-IS1 datasheet, SI82F89AGC-IS1 pinout, SI82F89AGC-IS1 application, or SI82F89AGC-IS1 equivalent, this page provides verified functional identity, validated SOIC-14 wide-body package mapping, confirmed DIS-based control logic, exact SelVCD™ current programming behavior, and two manufacturer-validated alternative part options for half-bridge gate drive designs.
Technical Context
The SI82F89AGC-IS1 implements capacitive silicon-dioxide isolation with differential RF-modulated OOK signaling between input and output domains, enabling robust noise immunity and tight timing matching. Its High-Side/Low-Side architecture uses a single PWM input to drive complementary outputs VOA/VOB with programmable dead time via external resistor on DT pin.
It integrates independent UVLO monitors for VDDI (logic), VDDA (driver A), and VDDB (driver B), each with selectable thresholds (4 V/8 V/12 V/15 V). The SelVCD™ circuit operates as a precision current source-sourcing and sinking currents are set independently via SPD+ and SPD− pins using resistor dividers-and activates integrated Miller clamp when VOA/VOB falls below VMCTA/B during turn-off transitions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 6 kVRMS for 1 minute - certified reinforced insulation per UL 1577, VDE 60747-17, CSA 62368-1 |
| Channel Skew | <5 ns - ensures synchronous switching of high-side and low-side FETs to prevent shoot-through |
| CMTI | >200 kV/µs - maintains signal integrity in high-dV/dt environments like SiC inverters |
| Input Supply Range | 3 V to 20 V - supports direct connection to MCU I/O or industrial logic without level-shifting |
| Gate Drive Supply | 5 V to 30 V - enables direct drive of 12 V–20 V gate-rated SiC/GaN devices without external boost |
| UVLO Thresholds | 4 V / 8 V / 12 V / 15 V - configurable per device variant to match gate driver supply rail stability |
| Operating Temp | –40 °C to +125 °C - qualified per AEC-Q100 Grade 1 for automotive powertrain and charging systems |
| ESD Rating | 4 kV HBM - protects against handling and board-level electrostatic discharge events |
Pinout & Package
SI82F89AGC-IS1 is housed in a wide-body 14-pin SOIC (WB SOIC-14) package with 8.3 mm creepage and clearance, optimized for reinforced insulation and high-voltage PCB layout. Pin 1 is VIA (non-inverting input for driver A); pin 9 is SPD− (sinking current programming); pin 12 is SPD+ (sourcing current programming); pin 13 is DT (dead time resistor connection); pin 14 is DIS (active-high disable).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input for driver A | Accepts CMOS-level PWM signal; high-noise immunity via Schmitt trigger and deglitch filter |
| VDDI | Logic input power supply | 3–20 V supply for digital input stage; includes UVLO monitoring at 4/8/12/15 V thresholds |
| GNDI | Logic input ground | Reference for all digital inputs; galvanically isolated from driver-side grounds GNDA/GNDB |
| DIS | Active-high disable input | Drives VOA/VOB low unconditionally when high; terminates operation within tDID (typ. 25 ns) |
| DT | Dead time programming terminal | Resistor to GNDI sets dead time (10–110 kΩ → 17.3–110 ns); connect to VDDI to disable dead time |
| SPD+ | Sourcing current control input | Resistor to GNDI selects one of eight sourcing current levels (0.5–10 A typ.) for VOA/VOB turn-on |
| SPD− | Sinking current control input | Resistor to GNDI selects one of eight sinking current levels (0.5–10 A typ.) for VOA/VOB turn-off |
| VDDA | High-side gate driver supply | 5–30 V supply for driver A output stage; monitored by independent UVLO circuit |
| GNDA | High-side gate driver ground | Return path for VOA; isolated from GNDB to support floating high-side operation |
| VDDB | Low-side gate driver supply | 5–30 V supply for driver B output stage; monitored by independent UVLO circuit |
| GNDB | Low-side gate driver ground | Return path for VOB; referenced to system power ground in half-bridge configurations |
| VOA | High-side gate driver output | Current-source output with integrated Miller clamp; directly connects to high-side FET gate |
| VOB | Low-side gate driver output | Current-source output with integrated Miller clamp; directly connects to low-side FET gate |
| NC | No connection | Pins 10 and 11 are unconnected; must remain floating or grounded per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Selectable Variable Current Drive (SelVCD™) | Eight discrete sourcing/sinking current levels (0.5–10 A) set via SPD+/SPD− resistors - eliminates external gate resistors and enables dynamic slew rate tuning |
| Integrated Miller Clamp | Automatically engages when VOA/VOB falls below VMCTA/B (~2.5 V) during turn-off - suppresses Miller-induced false turn-on without external components |
| Programmable Dead Time | 17–110 ns range set by single resistor on DT pin - prevents shoot-through in half-bridge topologies without controller-level timing compensation |
| AEC-Q100 Qualified | Grade 1 (–40 °C to +125 °C ambient) with automotive-specific manufacturing flow - supports EV traction inverters and OBCs |
| Universal UVLO Configuration | Four factory-set UVLO thresholds (4/8/12/15 V) per supply domain - matches gate driver rail stability requirements across Si MOSFET, SiC, and GaN applications |
| High CMTI & Low Skew | 200 kV/µs common-mode transient immunity and <5 ns channel-to-channel skew - ensures reliable operation in fast-switching 100+ kHz SiC systems |
Applications
| Onboard Charger (OBC) | Industrial Motor Drive |
|---|---|
|
Use Scenario: Bidirectional AC/DC and DC/DC conversion in EV onboard chargers using interleaved totem-pole PFC and CLLC resonant stages. IC Role / Device Role / Timing Role: High-Side/Low-Side isolated gate driver controlling SiC MOSFET half-bridges; provides synchronized turn-on/turn-off with programmable dead time to prevent shoot-through at 100–300 kHz switching. Use Value: SelVCD™ enables optimal dV/dt control during zero-voltage switching transitions; integrated Miller clamp prevents false turn-on during high dV/dt commutation events. |
Use Scenario: Field-oriented control (FOC) of permanent magnet synchronous motors (PMSM) in HVAC compressors and industrial pumps. IC Role / Device Role / Timing Role: Isolated dual-channel driver for three-phase inverter leg pairs; delivers matched propagation delay and skew to maintain phase current symmetry. Use Value: 200 kV/µs CMTI ensures reliable PWM transmission across noisy motor phase legs; AEC-Q100 qualification supports extended service life in harsh thermal environments. |
| Renewable Energy Inverter | Uninterruptible Power Supply (UPS) |
|
Use Scenario: Grid-tied solar string inverters with transformerless topologies requiring reinforced isolation and high efficiency. IC Role / Device Role / Timing Role: Gate driver for SiC half-bridge modules in DC/AC inversion stage; handles 1200 V bus with 6 kVRMS isolation and 1500 VRMS working voltage. Use Value: Wide 5–30 V gate supply range supports direct connection to auxiliary 12 V or 24 V rails; SPD± programming allows fine-tuning of EMI vs. switching loss trade-offs. |
Use Scenario: Online double-conversion UPS systems with high-frequency IGBT-based inverters delivering clean sine-wave output under load transients. IC Role / Device Role / Timing Role: Isolated driver for IGBT half-bridges in output inverter stage; provides fast UVLO response to protect devices during brownout conditions. Use Value: Dual independent UVLO monitors (VDDA/VDDB) ensure safe shutdown if either gate supply collapses; 4 kV HBM rating improves robustness during field servicing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated high-side/low-side gate drive applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SIL1225AD-IM | Single-channel, 5 kVRMS isolation, fixed 4 A peak output, no SelVCD™ or SPD programming | Lacks dual-channel integration and current programmability; requires two units for half-bridge | Choose when cost-sensitive designs accept higher component count and fixed drive strength |
| UCC5390SCD | 3.75 kVRMS isolation, 10 A peak output, TI's TIOL technology, no integrated Miller clamp | Lower isolation rating; requires external Miller clamp circuitry for SiC/GaN reliability | Prefer when TI ecosystem alignment and higher peak current outweigh isolation and integration needs |
Compared with SIL1225AD-IM and UCC5390SCD, SI82F89AGC-IS1 uniquely combines 6 kVRMS reinforced isolation, dual-channel High-Side/Low-Side topology, SelVCD™ current programmability, and integrated Miller clamp in a single WB SOIC-14 package-enabling compact, robust, and EMI-optimized half-bridge designs for automotive and industrial SiC systems.
Availability
SI82F89AGC-IS1 is available at Aetrix Electronics and suitable for onboard chargers, industrial motor drives, renewable energy inverters, and uninterruptible power supplies requiring stable component supply, automotive-grade reliability, and high-voltage isolation compliance.
Supply support for SI82F89AGC-IS1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for automotive, industrial, and communications markets.
The Si82Fx family was developed to replace optocoupled gate drivers in high-reliability, high-speed power conversion systems-delivering superior CMTI, tighter skew, longer lifetime, and integrated features like SelVCD™ and Miller clamp for SiC/GaN adoption.
FAQ
What is the isolation rating and safety certification status of SI82F89AGC-IS1?
SI82F89AGC-IS1 provides 6 kVRMS isolation for 1 minute and is pending UL 1577 recognition, CSA 62368-1 (reinforced insulation), VDE 60747-17 (reinforced insulation), and CQC GB4943.1 certifications. Its 1500 VRMS working voltage and 10 kV bipolar surge rating meet requirements for reinforced insulation in automotive and industrial power systems. All certifications apply specifically to the SI82F89AGC-IS1 variant.
Does SI82F89AGC-IS1 support both High-Side/Low-Side and Universal configurations?
No-SI82F89AGC-IS1 is specifically configured as a High-Side/Low-Side driver with PWM input and active-high DIS control. It does not support Universal (independent VIA/VIB) mode. This is confirmed by its pinout (no VIA/VIB pins exposed; PWM and DIS present), truth table (Table 3), and functional block diagram (Figure 12). Other Si82Fx variants like SI82F39x offer Universal configuration.
How is dead time programmed on SI82F89AGC-IS1, and what is the valid resistor range?
Dead time on SI82F89AGC-IS1 is set by connecting a resistor (RDT) between the DT pin and GNDI. Valid RDT values range from 10 kΩ to 110 kΩ, yielding typical dead times from 17.3 ns to 110 ns per Equation 1 (tDT = 1.73 × RDT + 5.74). A 0.1 µF ceramic capacitor must be placed in parallel with RDT near the DT pin for noise immunity. Connecting DT to VDDI disables dead time insertion.
What UVLO thresholds are implemented in SI82F89AGC-IS1, and how are they selected?
SI82F89AGC-IS1 includes factory-configured UVLO thresholds of 4 V, 8 V, 12 V, or 15 V on VDDI, VDDA, and VDDB-each independently set per supply domain. Threshold selection is fixed at manufacture and specified in the ordering guide; SI82F89AGC-IS1 uses the 8 V option for all three supplies. This ensures reliable disablement before gate drive capability degrades in 12 V gate-drive applications.
Can SI82F89AGC-IS1 drive SiC and GaN FETs directly without external components?
Yes-SI82F89AGC-IS1 drives SiC and GaN FETs directly using its SelVCD™ current-source outputs and integrated Miller clamp. No external gate resistors are required; adding them degrades Miller clamp effectiveness and increases switching losses. The device supports gate supply voltages up to 30 V and delivers up to 10 A peak sourcing/sinking current, matching typical SiC/GaN gate charge requirements at 12–20 V rails.
SI82F89AGC-IS1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82F89AGC-IS1 FAQ
1.How can I place an order for SI82F89AGC-IS1 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82F89AGC-IS1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82F89AGC-IS1 reliable?
The price and inventory of SI82F89AGC-IS1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82F89AGC-IS1 is usually 5 days.
3.What payment methods are accepted for SI82F89AGC-IS1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82F89AGC-IS1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82F89AGC-IS1?
SI82F89AGC-IS1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82F89AGC-IS1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82F89AGC-IS1?
For technical support, including SI82F89AGC-IS1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82F89AGC-IS1 requirements.
6.How does Aetrix verify that SI82F89AGC-IS1 is sourced from the original manufacturer or authorized distributors?
All SI82F89AGC-IS1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82F89AGC-IS1 meets industry standards.
7.What is the process for return or replacement of SI82F89AGC-IS1?
All SI82F89AGC-IS1 units undergo pre-shipment inspection (PSI). If there is an issue with SI82F89AGC-IS1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82F89AGC-IS1 part is unused and in its original packaging.
Return procedure for SI82F89AGC-IS1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI82F89AGC-IS1 Tags
-
TLP152(TPL,E
Toshiba Semiconductor and Storage

-
HT0740LG-G
Microchip Technology

-
FOD8314TR2
onsemi

-
1EDI60N12AFXUMA1
Infineon Technologies

-
1EDB7275FXUMA1
Infineon Technologies

-
UCC5350MCDR
Texas Instruments

-
2EDB7259KXUMA1
Infineon Technologies

-
UCC5304DWVR
Texas Instruments

-
SI8261BBC-C-ISR
Skyworks Solutions Inc.

-
HT0440LG-G
Microchip Technology

-
HCPL-0302-500E
Broadcom Limited

-
STGAP2HSCMTR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
