Skyworks Solutions Inc. SI82F99ABE-IS3R
- Part No.:
- SI82F99ABE-IS3R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82F99ABE-IS3R.pdf
- Description:
- 6 KV 2-CHANNEL ISOLATED SELVCD G
- Quantity:
- Payment:

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Product details
Overview
SI82F99ABE-IS3R from Skyworks Solutions is a dual-channel isolated gate driver in high-side/low-side configuration with enable (EN) input, 6 kVRMS reinforced isolation, SelVCD™ current-source outputs (8-level programmable sourcing/sinking), integrated Miller clamp, and <5 ns channel-to-channel skew. It drives SiC/GaN FETs and IGBTs in half-bridge motor inverters and onboard chargers.
For engineers reviewing the SI82F99ABE-IS3R datasheet, SI82F99ABE-IS3R pinout, SI82F99ABE-IS3R application, or SI82F99ABE-IS3R equivalent, this page delivers verified functional identity, SOIC-16 narrow-body package mapping, confirmed dead-time programmability via DT pin, UVLO options (4 V/8 V/12 V/15 V), and real-world timing behavior under power sequencing constraints.
Technical Context
The SI82F99ABE-IS3R implements differential capacitive isolation using dual silicon dioxide (SiO₂) barriers, enabling 200 kV/µs CMTI and 1500 VRMS working voltage. Its PWM-input architecture routes a single logic signal to both channels with independent dead-time control and overlap protection triggered by simultaneous high inputs.
It features two independent UVLO monitors (VDDI and VDDA/B), CMOS-compatible Schmitt-triggered inputs with deglitch filter option, and analog SPD± pins that set sourcing/sinking current via resistor voltage division - each controlling eight discrete current levels with ±10% tolerance over temperature for 8–15 V UVLO variants.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 6 kVRMS for 1 minute - meets UL 1577, VDE 60747-17, and CSA 62368-1 reinforced insulation requirements. |
| Channel Skew | <5 ns - enables precise timing alignment between high-side and low-side gate drive edges in half-bridge topologies. |
| Input Supply Range | 3 V to 20 V - supports direct interface with 3.3 V, 5 V, and 12 V controller logic without level shifting. |
| Gate Drive Supply | 5 V to 30 V - accommodates wide-range gate bias for SiC MOSFETs (15–20 V) and GaN HEMTs (5–12 V). |
| CMTI | >200 kV/µs - ensures reliable operation in noisy high-dV/dt environments like motor drives and inverters. |
| UVLO Thresholds | 4 V / 8 V / 12 V / 15 V - selectable per device variant; SI82F99ABE-IS3R uses 12 V UVLO on VDDA/B for robust turn-on margin. |
| Operating Temp | –40 °C to +125 °C - qualified to AEC-Q100 Grade 1 for automotive powertrain and charging systems. |
Pinout & Package
Narrow-body 16-pin SOIC (SOIC-16 NB) package with 1.27 mm pitch, creepage ≥8.0 mm, and reinforced insulation barrier between input and output sides.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIA | Non-inverting logic input for channel A | Unused in SI82F99ABE-IS3R - this part uses PWM input mode; VIA is NC. |
| VIB | Non-inverting logic input for channel B | Unused in SI82F99ABE-IS3R - this part uses PWM input mode; VIB is NC. |
| PWM | Single logic input for both channels | Drives VOA high / VOB low when high; VOA low / VOB high when low - enables synchronous half-bridge control. |
| EN | Active-high enable control | When low, forces VOA and VOB low unconditionally - used for system-level fault shutdown. |
| DT | Dead time programming input | Resistor-to-GND sets dead time (10–110 kΩ → 17.3–110 ns); tied to VDDI disables dead time for dual-driver operation. |
| SPD+ | Sourcing current programming | Resistor-to-GND selects one of eight sourcing current levels (0.5–6 A typical) - eliminates external turn-on gate resistors. |
| SPD− | Sinking current programming | Resistor-to-GND selects one of eight sinking current levels (0.5–6 A typical) - enables fast, controlled turn-off and Miller clamping. |
| VDDA / GNDA | High-side gate driver supply | Independent 5–30 V rail for driving high-side switch; includes dedicated UVLO monitoring. |
| VDDB / GNDB | Low-side gate driver supply | Independent 5–30 V rail for driving low-side switch; includes dedicated UVLO monitoring. |
| VOA / VOB | Current-source gate drive outputs | Output as regulated current sources (not voltage drivers); integrate Miller clamp active during VOH→VOL transitions. |
| VDDI / GNDI | Logic input supply | 3–20 V domain powering input logic, isolation barrier, and internal LDOs; UVLO threshold = 12 V for this variant. |
| NC (pins 12, 13) | No connection | Not bonded; must remain floating - no PCB trace or thermal pad connection permitted. |
Key Features
| Feature | Design Value |
|---|---|
| Selectable Variable Current Drive (SelVCD™) | Eight discrete sourcing/sinking current levels (0.5–6 A) set independently via SPD+/SPD− resistors - replaces gate resistors and enables adaptive switching speed. |
| Integrated Miller Clamp | Automatically engages during VOH→VOL transition when VOA/B falls below VMCTA/B - suppresses Miller-induced false turn-on without external components. |
| Programmable Dead Time | Resistor-programmed delay (17–110 ns) between VOA and VOB edges - prevents shoot-through in half-bridge configurations. |
| Overlap Protection | Simultaneous high inputs on PWM force both VOA and VOB low immediately - hardware-level safeguard against cross-conduction. |
| AEC-Q100 Qualified | Grade 1 (–40 °C to +125 °C ambient) with automotive-specific process flow - validated for EV traction inverters and OBCs. |
Applications
| Motor Drives | Onboard Chargers (OBC) |
|---|---|
Use Scenario: Three-phase inverter driving permanent magnet synchronous motors in electric power steering and HVAC compressors. IC Role / Device Role / Timing Role: High-side/low-side gate driver delivering synchronized, dead-time-controlled pulses to SiC MOSFET half-bridges with sub-5 ns skew. Use Value: Enables >100 kHz switching with minimal shoot-through risk and precise Miller clamping during high dV/dt commutation events. |
Use Scenario: Bidirectional AC/DC and DC/DC conversion stage in 11 kW EV onboard charger with GaN FETs. IC Role / Device Role / Timing Role: Isolated PWM gate driver providing reinforced insulation and 200 kV/µs CMTI for primary-side GaN half-bridge control. Use Value: Eliminates gate resistor thermal stress and enables dynamic current tuning via SPD± to optimize EMI vs. switching loss trade-offs. |
| Power Inverters | Uninterruptible Power Supplies |
Use Scenario: Solar string inverters converting DC from PV arrays to grid-synchronized AC using SiC modules. IC Role / Device Role / Timing Role: Dual isolated driver managing high-side/low-side switches in three-level NPC or T-type topologies. Use Value: 6 kVRMS isolation and 1500 VRMS working voltage meet IEC 62109 safety requirements for photovoltaic systems. |
Use Scenario: Online double-conversion UPS with battery backup, requiring fast fault response and galvanic isolation between control and power stages. IC Role / Device Role / Timing Role: Fault-tolerant gate driver with EN pin enabling immediate output disable during overcurrent or thermal events. Use Value: Undervoltage lockout on both VDDI and VDDA/B ensures clean, predictable shutdown across all supply domains. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8239BD-IS3R | Universal configuration (VIA/VIB inputs), no PWM pin; same SOIC-16 NB package and 6 kVRMS isolation. | Requires separate logic signals per channel; lacks built-in overlap protection and single-input half-bridge optimization. | Choose for dual independent gate drive where channel independence outweighs half-bridge integration needs. |
| UCC5870QDWJRQ1 | Texas Instruments' 5.7 kVRMS reinforced isolated driver with integrated DC/DC converter; different pinout and no SPD± analog programming. | Eliminates need for isolated bias supplies but adds complexity in layout and thermal management; fixed 4-A peak output. | Prefer when board space is constrained and isolated auxiliary supply generation is impractical. |
Compared with Si8239BD-IS3R, SI82F99ABE-IS3R provides tighter half-bridge timing control via PWM input and overlap protection, while versus UCC5870QDWJRQ1 it offers finer current granularity and lower propagation delay at the cost of external bias supplies.
Availability
SI82F99ABE-IS3R is available at Aetrix Electronics and suitable for motor drives, onboard chargers, and uninterruptible power supplies requiring stable component supply, AEC-Q100 compliance, and reinforced isolation certification.
Supply support for SI82F99ABE-IS3R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, isolation, and precision timing technologies.
The Si82Fx family was designed specifically for high-reliability isolated gate driving in automotive and industrial power conversion, emphasizing CMTI resilience, SelVCD™ flexibility, and AEC-Q100 qualification from wafer to final test.
FAQ
What is the isolation rating and safety certification status of the SI82F99ABE-IS3R?
The SI82F99ABE-IS3R provides 6 kVRMS isolation for 1 minute and is pending UL 1577 recognition, CSA 62368-1 (reinforced insulation), VDE 60747-17, and CQC GB4943.1 certifications. Its 1500 VRMS working voltage and 10 kV bipolar surge rating meet IEC 60747-17 requirements for reinforced insulation in automotive and industrial applications.
Does the SI82F99ABE-IS3R support dynamic gate current adjustment during operation?
Yes, the SI82F99ABE-IS3R supports dynamic speed control via analog voltage injection on SPD+ and SPD− pins. Each pin accepts a voltage within defined bounds (e.g., 0.3–1.2 V for SPD7−) to change sourcing/sinking current mid-operation, with Speed Update Delay (tSUD) of typically 100 ns - enabling real-time EMI optimization without firmware intervention.
How does the Miller clamp function in the SI82F99ABE-IS3R, and what design conditions maximize its effectiveness?
The SI82F99ABE-IS3R's Miller clamp activates automatically when VOA or VOB falls below VMCTA/B (~2 V) during turn-off, temporarily boosting sinking current to SPD7− level. To maximize clamping, no gate resistor must be placed between VOA/VOB and the power device gate - any series resistance degrades clamp voltage margin and increases turn-off time.
What UVLO thresholds are implemented in the SI82F99ABE-IS3R, and how do they affect system behavior?
The SI82F99ABE-IS3R uses 12 V UVLO on VDDA and VDDB, and 12 V UVLO on VDDI. When either gate supply drops below 12 V − hysteresis, VOA/VOB are forced low; when VDDI falls below its UVLO threshold, all inputs are ignored and outputs remain low regardless of EN/PWM state - ensuring fail-safe behavior during brownout.
Can the SI82F99ABE-IS3R operate without dead time insertion, and if so, how is that configured?
Yes, dead time insertion can be disabled in the SI82F99ABE-IS3R by connecting the DT pin directly to VDDI. This reconfigures the device from high-side/low-side mode to universal dual-driver mode, allowing VOA to follow PWM and VOB to follow inverted PWM without programmed delay - useful for synchronous rectification or dual independent switches.
SI82F99ABE-IS3R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82F99ABE-IS3R FAQ
1.How can I place an order for SI82F99ABE-IS3R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82F99ABE-IS3R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82F99ABE-IS3R reliable?
The price and inventory of SI82F99ABE-IS3R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82F99ABE-IS3R is usually 5 days.
3.What payment methods are accepted for SI82F99ABE-IS3R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82F99ABE-IS3R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82F99ABE-IS3R?
SI82F99ABE-IS3R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82F99ABE-IS3R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82F99ABE-IS3R?
For technical support, including SI82F99ABE-IS3R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82F99ABE-IS3R requirements.
6.How does Aetrix verify that SI82F99ABE-IS3R is sourced from the original manufacturer or authorized distributors?
All SI82F99ABE-IS3R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82F99ABE-IS3R meets industry standards.
7.What is the process for return or replacement of SI82F99ABE-IS3R?
All SI82F99ABE-IS3R units undergo pre-shipment inspection (PSI). If there is an issue with SI82F99ABE-IS3R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82F99ABE-IS3R part is unused and in its original packaging.
Return procedure for SI82F99ABE-IS3R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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