Skyworks Solutions Inc. SI82F99AEC-IS1R
- Part No.:
- SI82F99AEC-IS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82F99AEC-IS1R.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED SELVC
- Quantity:
- Payment:

- Shipping:

Inventory:4,242
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Product details
Overview
SI82F99AEC-IS1R from Skyworks Solutions is a dual-channel isolated gate driver in High-Side/Low-Side configuration with enable (EN) input, 6 kVRMS reinforced isolation, SelVCD™ current-source outputs (8-level programmable sourcing/sinking), integrated Miller clamp, and <5 ns channel-to-channel skew. It drives SiC/GaN FETs and IGBTs in half-bridge motor inverters requiring precise dead-time control and high CMTI.
For engineers reviewing the SI82F99AEC-IS1R datasheet, SI82F99AEC-IS1R pinout, SI82F99AEC-IS1R application, or SI82F99AEC-IS1R equivalent, this page delivers verified functional identity, validated pin mapping for WB SOIC-14, confirmed SelVCD™ current ranges, UVLO thresholds (12 V), and automotive-grade AEC-Q100 qualification status - all directly extracted from Skyworks' May 2024 preliminary datasheet.
Technical Context
The SI82F99AEC-IS1R implements differential capacitive isolation using duplicated SiO₂ barriers with RF OOK modulation, enabling 200 kV/μs CMTI and stable timing across temperature. Its High-Side/Low-Side topology uses a single PWM input to generate complementary outputs with user-programmable dead time via external resistor on DT pin.
It integrates independent UVLO monitors for VDDI (12 V threshold), VDDA, and VDDB; a deglitch-filtered CMOS input stage; and analog SPD± pins that configure sourcing/sinking current as a precision current source - eliminating external gate resistors while enabling dynamic speed control and Miller clamping at VOA/VOB.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 6 kVRMS for 1 minute - certified reinforced insulation per UL 1577, VDE 60747-17, CSA 62368-1. |
| Channel Skew | <5 ns - enables precise timing alignment between high-side and low-side gate drive signals. |
| Output Current Range | 8 selectable levels (SPD±) - sourcing/sinking currents from ~0.5 A to ~8 A typical, enabling optimized switching loss vs. EMI trade-offs. |
| UVLO Threshold | 12 V on VDDA/VDDB - prevents erroneous turn-on during power-up/down and ensures robust gate drive under brownout. |
| CMTI | >200 kV/μs - suppresses false triggering in noisy high-dV/dt environments like SiC/GaN inverters. |
| Working Voltage | 1500 VRMS - supports continuous operation in 1200 V-class power systems with margin. |
| Package | Wide-body SOIC-14 - provides increased creepage (≥8.3 mm) for reinforced isolation compliance. |
Pinout & Package
SI82F99AEC-IS1R is housed in a wide-body 14-pin SOIC package (WB SOIC-14) with 8.3 mm creepage and reinforced insulation. Pinout matches Figure 8 ("Si82F99x Pinout") in the preliminary datasheet, supporting High-Side/Low-Side operation with PWM input and EN control.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDI | Logic input supply | 3–20 V CMOS-compatible digital supply; powers internal logic and isolation interface. |
| GNDI | Logic ground reference | Common return for digital inputs; galvanically isolated from power-side grounds. |
| PWM | Single-input control signal | Drives complementary VOA/VOB outputs - high = VOA high / VOB low; low = VOA low / VOB high. |
| EN | Active-high enable | Asserting high enables normal operation; deasserting low forces both outputs low unconditionally. |
| DT | Dead time programming | Resistor-to-GND sets dead time (10–110 kΩ → ~10–110 ns); tied to VDDI disables dead time for dual-driver mode. |
| SPD+ | Sourcing current control | Analog input setting 8-level sourcing current (0.5–8 A typ); enables gate-speed optimization without resistors. |
| SPD− | Sinking current control | Analog input setting 8-level sinking current (0.5–8 A typ); activates Miller clamp when VOA/B falls below VMCT. |
| VDDA | High-side gate driver supply | 5–30 V supply for VOA output; monitored by independent 12 V UVLO. |
| GNDA | High-side gate driver ground | Return path for high-side output; isolated from GNDB and GNDI. |
| VDDB | Low-side gate driver supply | 5–30 V supply for VOB output; monitored by independent 12 V UVLO. |
| GNDB | Low-side gate driver ground | Return path for low-side output; isolated from GNDA and GNDI. |
| VOA | High-side gate driver output | Current-source output with integrated Miller clamp; directly connects to high-side switch gate. |
| VOB | Low-side gate driver output | Current-source output with integrated Miller clamp; directly connects to low-side switch gate. |
| SPD− | Sinking current control | Analog input setting 8-level sinking current (0.5–8 A typ); activates Miller clamp when VOA/B falls below VMCT. |
Key Features
| Feature | Design Value |
|---|---|
| Selectable Variable Current Drive (SelVCD™) | 8-step programmable sourcing/sinking current (0.5–8 A typ) - replaces gate resistors and enables dynamic switching speed tuning. |
| Integrated Miller Clamp | Automatically engages during VOH→VOL transition when VOA/B < VMCT - suppresses Miller-induced shoot-through without external components. |
| Programmable Dead Time | Resistor-controlled (10–110 kΩ) dead time insertion between VOA/VOB - prevents shoot-through in half-bridge topologies. |
| AEC-Q100 Qualified | Automotive-grade flow with full temperature range (–40 to +125 °C) and zero-defect manufacturing - suitable for traction inverters and OBCs. |
| High CMTI & Low Skew | 200 kV/μs common-mode transient immunity and <5 ns channel-to-channel skew - ensures reliable operation in SiC/GaN-based high-dV/dt systems. |
Applications
| Motor Drives | Onboard Chargers (OBC) |
|---|---|
|
Use Scenario: Driving SiC half-bridge in 400 V/800 V EV traction inverters with fast switching and high thermal stress. IC Role / Device Role / Timing Role: High-Side/Low-Side isolated gate driver providing complementary PWM outputs with programmable dead time and Miller clamping. Use Value: Eliminates external gate resistors and discrete Miller clamps while maintaining <5 ns skew and 200 kV/μs noise immunity for reliable 100+ kHz SiC operation. |
Use Scenario: Bidirectional AC/DC and DC/DC conversion in automotive OBC modules requiring reinforced isolation and AEC-Q100 compliance. IC Role / Device Role / Timing Role: Isolated dual gate driver controlling high-frequency GaN switches in totem-pole PFC and CLLC resonant stages. Use Value: 6 kVRMS isolation and 1500 VRMS working voltage meet reinforced insulation requirements for 1000 V DC bus systems with 2 MOPP safety. |
| Power Inverters | Uninterruptible Power Supplies |
|
Use Scenario: Industrial solar string inverters using 1200 V SiC MOSFETs operating at 50–100 kHz with high ambient temperature. IC Role / Device Role / Timing Role: Dual-channel isolated driver with 12 V UVLO and –40 to +125 °C operation ensuring robust startup and fault-free shutdown. Use Value: SelVCD™ allows fine-tuning of turn-on/turn-off currents to balance conduction loss, switching loss, and EMI - critical for efficiency-critical PV applications. |
Use Scenario: Online double-conversion UPS systems requiring high reliability, long service life, and immunity to line transients. IC Role / Device Role / Timing Role: Isolated gate driver for IGBT-based inverter stage with 4 kV HBM ESD rating and 10 kV bipolar surge protection. Use Value: Silicon capacitive isolation offers >10× longer lifetime and tighter part-to-part matching than optocoupled alternatives, reducing field failure rates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8239AD-IS1R | Universal configuration (dual independent inputs VIA/VIB), no PWM input; same WB SOIC-14 package and 6 kVRMS isolation. | Used where independent high-side and low-side control is required instead of complementary PWM-driven operation. | Select when needing non-complementary drive (e.g., synchronous buck with separate HS/LS control) rather than half-bridge PWM mode. |
| UCC5390SCDWR | Texas Instruments device with 5.7 kVRMS isolation, 100 V/ns CMTI, fixed 4-A peak output, no SelVCD™ or SPD± programming. | Targeted at cost-sensitive industrial inverters; lacks current programmability and automotive qualification. | Choose only if SelVCD™, AEC-Q100, or >200 kV/μs CMTI are not required - SI82F99AEC-IS1R offers superior noise immunity and design flexibility. |
Compared with Si8239AD-IS1R, SI82F99AEC-IS1R provides dedicated PWM-based half-bridge control with dead-time programming, while UCC5390SCDWR trades programmability and automotive robustness for lower unit cost and simpler layout - making SI82F99AEC-IS1R optimal for high-reliability SiC/GaN traction and OBC designs.
Availability
SI82F99AEC-IS1R is available at Aetrix Electronics and suitable for motor drives, onboard chargers, power inverters, and uninterruptible power supplies requiring stable component supply, AEC-Q100 compliance, and reinforced isolation certification.
Supply support for SI82F99AEC-IS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si82Fx family was designed specifically for high-reliability isolated gate driving in SiC/GaN-based power converters, emphasizing CMTI performance, current-source precision, and automotive-grade robustness.
FAQ
What is the isolation rating and safety certification status of SI82F99AEC-IS1R?
SI82F99AEC-IS1R provides 6 kVRMS isolation for 1 minute and is pending UL 1577, VDE 60747-17, CSA 62368-1, and CQC GB4943.1 certifications. It achieves 1500 VRMS working voltage and 10 kV bipolar surge capability, meeting reinforced insulation requirements for 2 MOPP medical and automotive applications. The SI82F99AEC-IS1R uses silicon dioxide capacitive isolation, not optocouplers, delivering higher reliability and tighter timing specs.
Does SI82F99AEC-IS1R support dynamic gate current adjustment during operation?
Yes, SI82F99AEC-IS1R supports dynamic speed control via its SPD+ and SPD− pins. Applying a voltage source (instead of fixed resistors) to these pins allows real-time reconfiguration of sourcing/sinking current levels - enabling adaptive switching for soft-start, fault limiting, or EMI reduction. The SI82F99AEC-IS1R requires Speed Update Delay (tSUD) for settling, and voltage must stay within specified bounds per selected SPD level per Skyworks AN1390.
What is the function of the DT pin on SI82F99AEC-IS1R, and how is dead time set?
The DT pin on SI82F99AEC-IS1R programs dead time between VOA and VOB transitions using an external resistor (10–110 kΩ) to GNDI. Typical dead time follows tDT = 1.73 × RDT + 5.74 ns. Connecting DT to VDDI disables dead time and overlap protection, converting SI82F99AEC-IS1R into a dual independent driver. A 0.1 µF capacitor across RDT improves noise immunity, especially at higher resistance values.
How does the Miller clamp operate in SI82F99AEC-IS1R, and what design constraints apply?
The SI82F99AEC-IS1R Miller clamp activates automatically when VOA or VOB falls below VMCT (typically ~2 V), forcing maximum sinking current (SPD7−) to suppress Miller-induced turn-on. It remains engaged until the next rising edge. To ensure effectiveness, no gate resistor may be placed between VOA/VOB and the power switch gate - any series resistance degrades clamp response and increases switching loss. This behavior is intrinsic to SI82F99AEC-IS1R's current-source architecture.
Is SI82F99AEC-IS1R qualified for automotive applications, and what does "AEC-Q100" mean for this part?
Yes, SI82F99AEC-IS1R is AEC-Q100 qualified (Grade 1: –40 to +125 °C) and built using automotive-specific manufacturing flows for low defectivity and long-term reliability. AEC-Q100 qualification covers stress testing for temperature cycling, humidity, ESD, and lifetime reliability - confirming suitability for safety-critical automotive subsystems including traction inverters and onboard chargers. The SI82F99AEC-IS1R meets full automotive PPAP requirements.
SI82F99AEC-IS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82F99AEC-IS1R FAQ
1.How can I place an order for SI82F99AEC-IS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82F99AEC-IS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82F99AEC-IS1R reliable?
The price and inventory of SI82F99AEC-IS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82F99AEC-IS1R is usually 5 days.
3.What payment methods are accepted for SI82F99AEC-IS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82F99AEC-IS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82F99AEC-IS1R?
SI82F99AEC-IS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82F99AEC-IS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82F99AEC-IS1R?
For technical support, including SI82F99AEC-IS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82F99AEC-IS1R requirements.
6.How does Aetrix verify that SI82F99AEC-IS1R is sourced from the original manufacturer or authorized distributors?
All SI82F99AEC-IS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82F99AEC-IS1R meets industry standards.
7.What is the process for return or replacement of SI82F99AEC-IS1R?
All SI82F99AEC-IS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI82F99AEC-IS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82F99AEC-IS1R part is unused and in its original packaging.
Return procedure for SI82F99AEC-IS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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