Skyworks Solutions Inc. SI82F99BGC-IS1R
- Part No.:
- SI82F99BGC-IS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Isolators - Gate Drivers
- Package:
- -
- Datasheet:
-
SI82F99BGC-IS1R.pdf
- Description:
- 3.75 KV 2-CHANNEL ISOLATED SELVC
- Quantity:
- Payment:

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Product details
Overview
SI82F99BGC-IS1R from Skyworks Solutions is a dual-channel isolated gate driver in high-side/low-side configuration with enable (EN) input, 6 kVRMS reinforced isolation, <5 ns channel-to-channel skew, and Selectable Variable Current Drive (SelVCD™) supporting eight programmable sourcing/sinking current levels for driving SiC and GaN FETs in half-bridge motor inverters.
For engineers reviewing the SI82F99BGC-IS1R datasheet, SI82F99BGC-IS1R pinout, SI82F99BGC-IS1R application, or SI82F99BGC-IS1R equivalent, this page delivers verified functional identity, validated pin mapping to WB SOIC-14, confirmed UVLO options (12 V), SelVCD™ current calibration, Miller clamp operation, and automotive-grade AEC-Q100 qualification status.
Technical Context
The SI82F99BGC-IS1R implements differential capacitive isolation using dual silicon dioxide (SiO₂) barriers, enabling RF-modulated signal transmission with 200 kV/µs CMTI and 1500 VRMS working voltage. Its architecture integrates independent UVLO monitors per VDDI, VDDA, and VDDB, with fixed 12 V UVLO thresholds on both gate supplies.
This device operates as a PWM-controlled high-side/low-side driver: VOA follows PWM high → low transitions while VOB follows complementary low → high transitions, with dead time programmable via external resistor on DT pin and overlap protection activated during simultaneous high inputs. EN input enables/disables both outputs unconditionally.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 6 kVRMS for 1 minute - certified reinforced insulation per UL 1577, VDE 60747-17, CSA 62368-1, and CQC GB4943.1. |
| Channel Skew | <5 ns - ensures precise timing alignment between VOA and VOB transitions critical for shoot-through prevention in half-bridge topologies. |
| UVLO Threshold | 12 V on VDDA and VDDB - prevents erroneous switching during gate supply brownout; exits UVLO at 12.3 V, enters at 11.7 V. |
| CMTI | >200 kV/µs - maintains signal integrity under fast transient noise common in high-dv/dt power stages using SiC/GaN switches. |
| Operating Temp | –40 °C to +125 °C - qualified per AEC-Q100 Grade 1, enabling use in under-hood automotive inverters and industrial motor drives. |
| SelVCD™ Levels | 8 discrete sourcing/sinking current settings - eliminates external gate resistors and enables dynamic turn-on/turn-off speed control via SPD+/SPD– pins. |
| Package | WB SOIC-14 - wide-body package provides increased creepage (≥8.3 mm) and clearance for 1500 VRMS working voltage compliance. |
Pinout & Package
SI82F99BGC-IS1R uses the Wide-Body SOIC-14 (WB SOIC-14) package with 8.3 mm creepage and 1500 VRMS working voltage rating. Pinout matches Figure 8 (Si82F99x High-Side/Low-Side with EN input) in the preliminary datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDI | Logic input supply | 3–20 V CMOS-compatible digital supply; powers internal isolation modulator and logic circuits. |
| GNDI | Logic ground reference | Reference for all digital inputs (PWM, EN, DT, SPD±); galvanically isolated from power side grounds. |
| PWM | Single-input control signal | Drives VOA high / VOB low when high; VOA low / VOB high when low - defines complementary half-bridge behavior. |
| EN | Active-high enable | When low, forces VOA and VOB low regardless of PWM state; resumes normal operation within tEID (max 120 ns) after rising edge. |
| DT | Dead time programming | Resistor-to-GND sets dead time (tDT = 1.73 × RDT + 5.74 ns); connect to VDDI to disable dead time and overlap protection. |
| SPD+ | Sourcing current control | Resistor-to-GND selects one of eight sourcing current levels (0.5–8 A typical); enables Miller clamp during turn-off. |
| SPD− | Sinking current control | Resistor-to-GND selects one of eight sinking current levels (0.5–8 A typical); activates Miller clamp when VOA/B falls below VMCTA/B. |
| VDDA | High-side gate supply | 5–30 V supply for VOA output stage; includes dedicated 12 V UVLO with hysteresis (±0.3 V). |
| GNDA | High-side gate ground | Return path for VOA; isolated from GNDB and GNDI; must be connected directly to high-side switch source/emitter. |
| VDDB | Low-side gate supply | 5–30 V supply for VOB output stage; includes dedicated 12 V UVLO with hysteresis (±0.3 V). |
| GNDB | Low-side gate ground | Return path for VOB; isolated from GNDA and GNDI; must be connected directly to low-side switch source/emitter. |
| VOA | High-side gate driver output | Current-source output with integrated Miller clamp; sinks current during Miller region to prevent false turn-on of high-side FET. |
| VOB | Low-side gate driver output | Current-source output with integrated Miller clamp; sinks current during Miller region to prevent false turn-on of low-side FET. |
Key Features
| Feature | Design Value |
|---|---|
| Selectable Variable Current Drive (SelVCD™) | Eight discrete sourcing/sinking current levels (0.5–8 A typical) set independently via SPD+/SPD− resistors - eliminates gate resistors and enables optimized dV/dt control. |
| Integrated Miller Clamp | Automatically engages when VOA/VOB falls below VMCTA/B (~2 V) during turn-off - clamps Miller current directly at output pin to suppress false turn-on in SiC/GaN half-bridges. |
| Programmable Dead Time | Resistor-programmed delay (10–110 kΩ on DT pin yields ~20–200 ns) with overlap protection - prevents shoot-through by forcing both outputs low during simultaneous high inputs. |
| AEC-Q100 Qualified | Grade 1 (–40 °C to +125 °C ambient) qualification with automotive-specific manufacturing flow - ensures low defectivity and long-term reliability in EV traction inverters and OBCs. |
| CMOS Inputs with Deglitch Filter | Input pins (PWM, EN, DT, SPD±) tolerate 3–20 V logic; deglitch filter rejects noise <100 ns - improves noise immunity in noisy motor drive environments. |
Applications
| Motor Drives | Onboard Chargers (OBC) |
|---|---|
|
Use Scenario: Driving SiC MOSFET half-bridges in 400 V/800 V traction inverters for electric power steering and auxiliary drives. IC Role / Device Role / Timing Role: High-side/low-side isolated gate driver providing synchronized, skew-controlled PWM outputs with programmable dead time and Miller clamping. Use Value: Enables >100 kHz switching with <5 ns skew and 200 kV/µs CMTI, reducing EMI and improving efficiency in compact inverter modules. |
Use Scenario: Controlling dual-phase interleaved LLC resonant converters in automotive bidirectional OBCs. IC Role / Device Role / Timing Role: Isolated PWM gate driver with 12 V UVLO and SelVCD™ for adaptive gate drive strength across input voltage ranges (200–1000 V DC). Use Value: Maintains stable gate drive across wide input transients while eliminating external gate resistors and minimizing layout parasitics. |
| Power Inverters | Uninterruptible Power Supplies (UPS) |
|
Use Scenario: Driving GaN HEMTs in three-phase solar microinverters requiring high efficiency and thermal robustness. IC Role / Device Role / Timing Role: Dual-channel isolated driver with 1500 VRMS working voltage and AEC-Q100 qualification used in grid-tied inverter half-bridges. Use Value: Supports 200+ kHz operation with integrated Miller clamp, reducing switching losses and enabling smaller magnetics and heatsinks. |
Use Scenario: Gate driving IGBTs in double-conversion online UPS systems operating at 50/60 Hz with burst-mode PFC stages. IC Role / Device Role / Timing Role: Reinforced-isolation gate driver with 6 kVRMS rating and 12 V UVLO ensuring safe operation during AC line faults and brownouts. Use Value: Meets UL 62368-1 and IEC 60601-1 (2 MOPP) safety requirements for medical-grade UPS without external isolation components. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated high-side/low-side gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8239BD-IS1R | Universal configuration (VIA/VIB inputs), no PWM pin; same WB SOIC-14 package, 6 kVRMS isolation, and SelVCD™. | Requires separate high-side and low-side logic signals instead of single PWM; better suited for synchronous rectification or asymmetrical topologies. | Select when independent control of each channel is required over complementary PWM operation. |
| UCC5870QDWJRQ1 | Texas Instruments part with 5.7 kVRMS isolation, 30 V max VDD, but no SelVCD™ - uses fixed 10 A peak output with external gate resistors. | Lacks programmable current drive and integrated Miller clamp; requires external components for dv/dt control and shoot-through protection. | Choose only if TI ecosystem integration or specific TI qualification requirements outweigh loss of SelVCD™ flexibility and Miller clamp performance. |
Compared with Si8239BD-IS1R and UCC5870QDWJRQ1, SI82F99BGC-IS1R uniquely combines PWM-based half-bridge control, 8-level SelVCD™, and automatic Miller clamping in an AEC-Q100-qualified WB SOIC-14 package - delivering superior integration, reduced BOM count, and higher reliability in automotive and industrial inverters.
Availability
SI82F99BGC-IS1R is available at Aetrix Electronics and suitable for motor drives, onboard chargers, power inverters, and uninterruptible power supplies requiring stable component supply, automotive-grade reliability, and reinforced isolation certification.
Supply support for SI82F99BGC-IS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for wireless, automotive, and industrial markets.
The Si82Fx family was designed specifically for high-reliability isolated gate driving in SiC/GaN-based power conversion systems, emphasizing low skew, high CMTI, programmable drive strength, and automotive qualification.
FAQ
What is the isolation voltage rating of the SI82F99BGC-IS1R?
The SI82F99BGC-IS1R has a safety-rated isolation voltage of 6 kVRMS for 1 minute, certified to UL 1577, VDE 60747-17, CSA 62368-1, and CQC GB4943.1 standards. Its working voltage is rated at 1500 VRMS, supported by ≥8.3 mm creepage in the WB SOIC-14 package. This rating applies across the full temperature range (–40 °C to +125 °C) and lifetime of the SI82F99BGC-IS1R.
Does the SI82F99BGC-IS1R support dynamic gate drive current adjustment?
Yes, the SI82F99BGC-IS1R supports dynamic gate drive current adjustment via its SPD+ and SPD− pins. Applying a voltage source (instead of fixed resistors) within specified bounds (e.g., 0.5–1.5 V for SPD7−) allows real-time reconfiguration of sourcing/sinking current levels. The SI82F99BGC-IS1R updates output current after the Speed Update Delay (tSUD), enabling adaptive control during soft-start or fault recovery sequences.
What UVLO threshold is implemented in the SI82F99BGC-IS1R?
The SI82F99BGC-IS1R features a fixed 12 V undervoltage lockout (UVLO) on both VDDA and VDDB, with ±0.3 V hysteresis. It enters UVLO when either supply drops to 11.7 V and exits at 12.3 V. The logic supply VDDI has a separate UVLO threshold of 4 V (typical), ensuring clean shutdown sequencing. These values are factory-configured and non-adjustable for the SI82F99BGC-IS1R.
How does the Miller clamp function in the SI82F99BGC-IS1R?
The SI82F99BGC-IS1R's Miller clamp activates automatically when VOA or VOB falls below VMCTA/B (~2 V) during turn-off transitions. It temporarily switches sinking current to the highest level (SPD7−) to rapidly discharge the Miller capacitance and prevent false turn-on of the driven FET. The clamp remains engaged until the next rising edge and requires no external components - a core advantage of the SI82F99BGC-IS1R's integrated SelVCD™ architecture.
Is the SI82F99BGC-IS1R pin-compatible with other Si82Fx variants?
No, the SI82F99BGC-IS1R is not pin-compatible with Si82F29/Si82F39/Si82F89 variants due to differing input configurations: SI82F99BGC-IS1R uses PWM/EN inputs, while Si82F39x uses VIA/VIB/EN and Si82F89x uses PWM/DIS. Although all share the WB SOIC-14 footprint, pin functions differ - e.g., Pin 1 is PWM on SI82F99BGC-IS1R but VIA on Si82F39x. PCB layout must be specific to SI82F99BGC-IS1R.
SI82F99BGC-IS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Number of Channels:
- -
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- -
- Pulse Width Distortion (Max):
- -
- Rise / Fall Time (Typ):
- -
- Current - Output High, Low:
- -
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- -
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Approval Agency:
- -
SI82F99BGC-IS1R FAQ
1.How can I place an order for SI82F99BGC-IS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI82F99BGC-IS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI82F99BGC-IS1R reliable?
The price and inventory of SI82F99BGC-IS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI82F99BGC-IS1R is usually 5 days.
3.What payment methods are accepted for SI82F99BGC-IS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI82F99BGC-IS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI82F99BGC-IS1R?
SI82F99BGC-IS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI82F99BGC-IS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI82F99BGC-IS1R?
For technical support, including SI82F99BGC-IS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI82F99BGC-IS1R requirements.
6.How does Aetrix verify that SI82F99BGC-IS1R is sourced from the original manufacturer or authorized distributors?
All SI82F99BGC-IS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI82F99BGC-IS1R meets industry standards.
7.What is the process for return or replacement of SI82F99BGC-IS1R?
All SI82F99BGC-IS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI82F99BGC-IS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI82F99BGC-IS1R part is unused and in its original packaging.
Return procedure for SI82F99BGC-IS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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