Skyworks Solutions Inc. SI8423ETA-D-IS
- Part No.:
- SI8423ETA-D-IS
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- -
- Datasheet:
-
SI8423ETA-D-IS.pdf
- Description:
- LOW-POWER, SINGLE AND DUAL-CHANN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI8423ETA-D-IS from Skyworks Solutions is a dual-channel, 2.5 kVRMS digital isolator with Schmitt-trigger inputs, selectable fail-safe output (default high), and support for data rates up to 150 Mbps. It operates across 2.7–5.5 V supply rails on both sides and delivers ultra-low power consumption - <3.4 mA/channel at 1 Mbps and <9.2 mA/channel at 100 Mbps under 5 V operation - enabling use in isolated ADC interfaces and motor control gate drivers.
For engineers reviewing the SI8423ETA-D-IS datasheet, SI8423ETA-D-IS pinout, SI8423ETA-D-IS application, or SI8423ETA-D-IS equivalent, this page provides verified technical context, precise timing specs (11 ns max propagation delay, 0.5 ns channel-channel skew), isolation safety certifications (UL, CSA, VDE), and real-world application guidance for industrial and automotive systems requiring reinforced insulation and AEC-Q100 qualification.
Technical Context
The SI8423ETA-D-IS implements RF-based on/off keying across a semiconductor isolation barrier, eliminating startup initialization and delivering robust noise immunity without optical or magnetic coupling. Its dual-channel architecture isolates two unidirectional signals from input side (VDD1/GND1) to output side (VDD2/GND2), with independent UVLO monitoring per side.
It features Schmitt-trigger inputs for enhanced noise rejection, selectable fail-safe mode (default-high output during input-side power loss), and precise timing performance: 11 ns max propagation delay, 1.5 ns pulse width distortion, and 0.5 ns channel-channel skew - all specified over –40°C to +125°C at 150 Mbps.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | Dual unidirectional - isolates two independent signal paths across galvanic barrier |
| Isolation Rating | 2.5 kVRMS - certified for basic insulation in industrial and automotive applications |
| Max Data Rate | 150 Mbps - supports high-speed serial interfaces like SPI, RS-485, and isolated CAN FD transceivers |
| Propagation Delay | ≤11 ns - enables tight timing budgets in real-time motor control and power converter feedback loops |
| Supply Voltage Range | 2.7–5.5 V per side - interoperable with 3.3 V and 5 V logic domains without level shifters |
| Fail-Safe Mode | Default-high output - ensures predictable state during VDD1 loss, critical for safety-critical gate drive enable signals |
| Common-Mode Transient Immunity | 45 kV/µs - maintains signal integrity in noisy high-dV/dt environments like IGBT/SiC inverter switching |
Pinout & Package
SI8423ETA-D-IS is housed in a RoHS-compliant SOIC-16 wide-body package (WB SOIC-16), providing 8.3 mm creepage and clearance for reinforced insulation compliance. Pin assignments are validated per Skyworks' official Si8423 ordering guide and functional diagram.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 | Input-side power supply | Supplies power to input-side logic and RF transmitter; requires 0.1 µF bypass capacitor |
| GND1 | Input-side ground reference | Reference for input signals and VDD1; must be separated from GND2 by isolation barrier |
| IN1, IN2 | Digital input terminals | Schmitt-trigger buffered inputs accepting 2.0–5.5 V logic; tolerant of slow edges and noise |
| VDD2 | Output-side power supply | Supplies output driver and receiver; independent of VDD1 for true galvanic isolation |
| GND2 | Output-side ground reference | Reference for output signals and VDD2; physically isolated from GND1 |
| OUT1, OUT2 | Digital output terminals | 50 Ω nominal output impedance; compatible with controlled-impedance PCB traces for >50 Mbps operation |
| NC | No-connect pins | Pins 1, 2, 15, 16 - internally unconnected; may be left floating or tied to GND/VDD per layout best practice |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation architecture | Eliminates startup initialization and provides superior CMTI vs. capacitive or magnetic alternatives |
| Selectably fail-safe output | Default-high behavior during VDD1 loss prevents unintended activation of downstream power stages |
| Ultra-low power at 100+ Mbps | <9.2 mA/channel at 100 Mbps (5 V) - reduces thermal load in densely packed isolated power supplies |
| AEC-Q100 qualified | Rated for automotive-grade reliability (Grade 1: –40°C to +125°C), supporting HEV/EV traction inverters |
| Wide supply voltage range | 2.7–5.5 V on both sides - simplifies system-level power architecture and enables mixed-voltage designs |
Applications
| Industrial Motor Control | Isolated ADC Interface |
|---|---|
Use Scenario: Gate driving for three-phase IGBT/SiC inverters in servo drives and PLC-controlled AC motors. IC Role / Device Role / Timing Role: Isolates PWM enable and fault feedback signals between MCU and high-voltage gate driver ICs. Use Value: 0.5 ns channel-channel skew ensures matched timing across dual enable/fault paths, preventing shoot-through in half-bridge configurations. | Use Scenario: Signal isolation between precision SAR ADCs (e.g., AD7606) and host microcontrollers in programmable logic controllers. IC Role / Device Role / Timing Role: Transfers converted digital data across isolation barrier while rejecting common-mode noise from adjacent power circuits. Use Value: 45 kV/µs CMTI prevents data corruption during rapid bus transients in 48 V DC distribution systems. |
| Hybrid Electric Vehicle Battery Management | Isolated Switch-Mode Power Supply |
Use Scenario: Cell voltage monitoring and pack-level communication in high-voltage battery packs (up to 800 V). IC Role / Device Role / Timing Role: Isolates UART or SPI lines between isolated analog front-end and central BMS controller. Use Value: AEC-Q100 qualification and 2.5 kVRMS rating meet ISO 26262 ASIL-B requirements for functional safety in HEV systems. | Use Scenario: Feedback loop isolation in 1 kW isolated DC-DC converters for telecom and server PSUs. IC Role / Device Role / Timing Role: Transmits opto-coupler-replacement error amplifier output to primary-side PWM controller. Use Value: 11 ns max propagation delay enables faster loop response than legacy optocouplers, improving transient regulation performance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM1200ARZ | Single-channel, 2.5 kVRMS, 100 Mbps max, 3.0–5.5 V supply, no fail-safe option | Lacks dual-channel integration and configurable default output - requires two devices for same function | Choose when only one isolated signal path is needed and fail-safe behavior is not required |
| ISO7721D | Dual-channel, 5 kVRMS, 100 Mbps max, 1.71–5.5 V supply, default-low fail-safe only | Higher isolation rating but lower speed and fixed low-default output - unsuitable for high-speed gate drive enable | Prefer when reinforced insulation (5 kV) is mandatory and 100 Mbps suffices for system timing |
Compared with ADUM1200ARZ and ISO7721D, SI8423ETA-D-IS uniquely combines dual-channel 150 Mbps operation, 2.5 kVRMS isolation, and user-selectable default-high fail-safe mode - making it optimal for space-constrained, high-speed industrial motor drives where predictable power-loss behavior is critical.
Availability
SI8423ETA-D-IS is available at Aetrix Electronics and suitable for industrial motor control, isolated ADC interfaces, hybrid electric vehicle battery management, and isolated switch-mode power supplies requiring stable component supply, long-term lifecycle support, and AEC-Q100-qualified parts.
Supply support for SI8423ETA-D-IS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The SI84xx family was designed specifically for high-reliability industrial and automotive isolation applications demanding low power, precise timing, and safety certification - targeting systems where legacy optocouplers fall short in speed, consistency, or lifetime stability.
FAQ
What is the maximum data rate supported by SI8423ETA-D-IS?
The SI8423ETA-D-IS supports a maximum data rate of 150 Mbps under typical operating conditions (VDD = 5 V, TA = 25°C). This is confirmed in Table 5.2 of the Skyworks datasheet for Si842xBx variants. The SI8423ETA-D-IS is part of the "B" speed grade, distinguishing it from the 1 Mbps "A" grade versions. At 150 Mbps, propagation delay remains ≤11 ns with 0.5 ns channel-channel skew, enabling high-fidelity signal transfer in SPI and isolated UART links.
Does SI8423ETA-D-IS require external startup initialization?
No, SI8423ETA-D-IS does not require external startup initialization. As stated in Section 3.1 of the datasheet, its RF-based modulation architecture enables immediate operation upon power-up - no configuration registers, calibration sequences, or handshake protocols are needed. Outputs follow input states within 40 µs after VDD1 and VDD2 exceed UVLO thresholds, and the device enters normal operation without firmware intervention - simplifying system boot design for real-time controllers.
What safety certifications apply to SI8423ETA-D-IS?
SI8423ETA-D-IS is certified to UL 1577 (5000 VRMS/1 min), CSA Component Notice 5A, VDE IEC 60747-5-5 (VDE 0884-10), and IEC 60950-1 / 61010-1 / 60601-1 for reinforced insulation. These approvals are explicitly listed in the "Safety Regulatory Approvals" section of the datasheet and apply to the SOIC-16 wide-body package used by SI8423ETA-D-IS. Certification covers both 2.5 kVRMS and 5 kVRMS variants in this family.
What is the default output state of SI8423ETA-D-IS during input-side power loss?
The SI8423ETA-D-IS has a selectable fail-safe mode, and the "-D-IS" suffix indicates default-high output behavior when VDD1 is unpowered and VDD2 remains active. This is confirmed in Table 2.1 (Ordering Guide), where SI8423AB-D-IS and SI8423BB-D-IS are specified with "High" default output state. During VDD1 undervoltage, OUT1 and OUT2 hold high until VDD1 recovers, ensuring safe deactivation of downstream drivers in power-conversion systems.
How does SI8423ETA-D-IS achieve high electromagnetic immunity?
SI8423ETA-D-IS achieves 45 kV/µs common-mode transient immunity (CMTI) through its RF-based on/off keying architecture and differential RF detection at the receiver - a method inherently less susceptible to magnetic and capacitive coupling than pulse-width or edge-detection schemes. This value is measured per IEC 61000-4-4 and specified in Table 5.2. Combined with Schmitt-trigger inputs and 0.45 V input hysteresis, it rejects fast transients induced by IGBT switching or lightning surges in industrial environments.
SI8423ETA-D-IS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 2
- Inputs - Side 1/Side 2:
- -
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- 20kV/µs
- Data Rate:
- -
- Propagation Delay tpLH / tpHL (Max):
- 35ns, 35ns
- Pulse Width Distortion (Max):
- 25ns
- Rise / Fall Time (Typ):
- 2ns, 2ns
- Voltage - Supply:
- 2.7V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- -
- Supplier Device Package:
- -
SI8423ETA-D-IS FAQ
1.How can I place an order for SI8423ETA-D-IS through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8423ETA-D-IS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8423ETA-D-IS reliable?
The price and inventory of SI8423ETA-D-IS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8423ETA-D-IS is usually 5 days.
3.What payment methods are accepted for SI8423ETA-D-IS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8423ETA-D-IS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8423ETA-D-IS?
SI8423ETA-D-IS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8423ETA-D-IS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8423ETA-D-IS?
For technical support, including SI8423ETA-D-IS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8423ETA-D-IS requirements.
6.How does Aetrix verify that SI8423ETA-D-IS is sourced from the original manufacturer or authorized distributors?
All SI8423ETA-D-IS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8423ETA-D-IS meets industry standards.
7.What is the process for return or replacement of SI8423ETA-D-IS?
All SI8423ETA-D-IS units undergo pre-shipment inspection (PSI). If there is an issue with SI8423ETA-D-IS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8423ETA-D-IS part is unused and in its original packaging.
Return procedure for SI8423ETA-D-IS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8423ETA-D-IS Tags
-
ISO1212DBQR
Texas Instruments

-
ISO6721BDR
Texas Instruments

-
SI8710AC-B-ISR
Skyworks Solutions Inc.

-
ISO7720FDR
Texas Instruments

-
ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

-
SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
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