Skyworks Solutions Inc. SI8620ED-AS
- Part No.:
- SI8620ED-AS
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI8620ED-AS.pdf
- Description:
- AUTOMOTIVE 5 KV 2-CHANNEL DIGITA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI8620ED-AS from Skyworks Solutions is a dual-channel, reinforced-isolation digital isolator in WB SOIC-16 package, delivering 5 kVRMS isolation, <10 ns propagation delay, and 150 Mbps data rate with ultra-low power consumption (1.6 mA/channel at 1 Mbps, 5 V). It operates across –40 to 125 °C and supports fail-safe default-high output mode for industrial motor control and isolated ADC interfaces.
For engineers reviewing the SI8620ED-AS datasheet, SI8620ED-AS pinout, SI8620ED-AS application, or SI8620ED-AS equivalent, this page provides verified electrical specs, WB SOIC-16 terminal mapping, fail-safe behavior under undervoltage, CMTI of 50 kV/µs, and automotive-grade alternatives compliant with AEC-Q100 and VDE 0884-10 reinforced insulation.
Technical Context
The SI8620ED-AS implements RF-based on/off keying across a semiconductor isolation barrier-no startup initialization required. Its dual independent channels support bidirectional signal transfer with Schmitt-trigger inputs for noise immunity and separate VDD1/VDD2 supplies enabling level-shifting between 2.5–5.5 V domains.
It features per-side undervoltage lockout (UVLO+ = 2.24 V typ, hysteresis = 70 mV), precise timing (0.5 ns channel-channel skew, 2 ns propagation delay skew), and failsafe logic where unpowered input side yields high output when VDD2 is active-enabled by ordering option 'ED'.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | DC to 150 Mbps - supports high-speed serial links like SPI, RS-485, and CAN FD physical layer isolation without timing bottlenecks. |
| Propagation delay | 5.0–14 ns - ensures sub-15 ns latency for real-time feedback loops in motor drives and power converters. |
| Isolation rating | 5 kVRMS reinforced - meets UL 1577, VDE 0884-10, and IEC 62368-1 for safety-critical industrial and EV battery management systems. |
| Supply voltage | 2.5–5.5 V per side - enables interoperability with 3.3 V microcontrollers and 5 V analog front-ends without level translators. |
| Power @ 1 Mbps | 1.6 mA per channel at 5 V - reduces thermal load and extends battery life in portable medical and isolated sensor nodes. |
| CMTI | 50 kV/µs - maintains signal integrity during fast-switching transients in SiC/GaN inverters and isolated gate drivers. |
| Operating temperature | –40 to 125 °C - qualified for under-hood automotive and industrial ambient environments without derating. |
Pinout & Package
SI8620ED-AS uses a wide-body SOIC-16 (WB SOIC-16) package with creepage/clearance optimized for 5 kVRMS reinforced insulation. Pin 1 is GND1; pins 2, 5, 6, 8, 10, 11, 12, and 15 are NC (not internally connected); side 1 and side 2 grounds are separated for noise isolation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND1 (Pin 1, 7) | Side 1 ground reference | Return path for VDD1-supplied logic; must be routed separately from GND2 to maintain isolation barrier integrity. |
| VDD1 (Pin 3) | Side 1 supply input | Provides power to input-side circuitry; requires 0.1 µF bypass capacitor placed adjacent to pin. |
| A1 (Pin 4), A2 (Pin 5) | Side 1 digital I/O | Dual input channels with Schmitt-trigger thresholds (VT+ = 1.67 V typ, VT– = 1.23 V typ) for noise rejection. |
| GND2 (Pin 9, 16) | Side 2 ground reference | Return path for VDD2-supplied output logic; galvanically isolated from GND1 to block ground loops. |
| VDD2 (Pin 14) | Side 2 supply input | Independent power domain for output-side logic; enables level translation between disparate voltage domains. |
| B1 (Pin 13), B2 (Pin 12) | Side 2 digital I/O | Dual output channels with 50 Ω nominal output impedance-requires controlled-impedance PCB traces above 25 MHz. |
Key Features
| Feature | Design Value |
|---|---|
| Selectable fail-safe mode | 'ED' suffix denotes default-high output: when VDD1 is unpowered but VDD2 is active, outputs B1/B2 drive high-prevents undefined states in safety-critical shutdown sequences. |
| RF modulation architecture | Eliminates startup initialization delay and avoids LED aging or capacitor drift issues inherent in optocouplers-ensures deterministic operation over 60-year lifetime. |
| Ultra-low power at high speed | 5.5 mA per channel at 100 Mbps (5 V) - cuts dynamic power by >40% versus legacy capacitive isolators, reducing system cooling requirements. |
| High CMTI immunity | 50 kV/µs common-mode transient immunity - sustains reliable communication during 1000 V/ns switching events in 1200 V SiC inverters. |
| Wide temperature stability | Propagation delay variation <1 ns across –40 to 125 °C - enables precision timing in servo drives without calibration. |
Applications
| Motor Control Systems | Isolated ADC/DAC Interfaces |
|---|---|
|
Use Scenario: Gate driver signal isolation in 3-phase inverter stages for industrial servo drives and EV traction inverters. IC Role / Device Role / Timing Role: Dual-channel isolator transmitting PWM signals from MCU to isolated gate drivers while rejecting high dv/dt noise. Use Value: 0.5 ns channel-channel skew ensures matched turn-on/turn-off timing across phases, minimizing shoot-through risk in IGBT/SiC modules. |
Use Scenario: Isolating serial interface (SPI) between precision ADC (e.g., ADS131M04) and host MCU in high-voltage battery monitoring units. IC Role / Device Role / Timing Role: Bidirectional digital isolator maintaining full 150 Mbps SPI clock/data integrity across 5 kVRMS barrier. Use Value: 5 ns minimum pulse width and <10 ns propagation delay enable reliable sampling at 1 MSPS with no timing margin loss. |
| Onboard Chargers (OBC) | Industrial PLC I/O Modules |
|
Use Scenario: Signal isolation between AC/DC controller and DC/DC stage in 11 kW EV onboard chargers operating at 1000 V bus. IC Role / Device Role / Timing Role: Reinforced-isolation interface for voltage/current feedback and fault signaling across primary-secondary boundary. Use Value: VDE 0884-10 reinforced certification and 50 kV/µs CMTI prevent false tripping during 1500 V surge events per IEC 61000-4-5. |
Use Scenario: Digital input/output isolation in modular PLC backplanes handling 24 VDC field signals in factory automation. IC Role / Device Role / Timing Role: Dual-channel isolator decoupling CPU-side logic from noisy 24 V sensor/actuator circuits. Use Value: Schmitt-trigger inputs with 0.44 V hysteresis reject ±2 kV EFT bursts per IEC 61000-4-4 without external filtering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM220N1BRZ | 2.5 kVRMS basic isolation; 100 Mbps max; 3.15 ns typical channel skew; SOIC-8 package. | Limited to non-safety-critical industrial use; not certified for reinforced insulation or automotive AEC-Q100. | Choose ADUM220N1BRZ only for cost-sensitive, low-voltage (<600 V) applications where 5 kVRMS and VDE 0884-10 compliance are unnecessary. |
| ISO7721FDWR | 5 kVRMS reinforced; 100 Mbps; 2.5 ns max channel skew; SOIC-8; 1.8–5.5 V supply range. | Lower data rate ceiling and higher 3.5 mA/Mbps power vs. SI8620ED-AS's 1.6 mA/Mbps at 5 V. | Prefer ISO7721FDWR when board space is constrained (SOIC-8) and 100 Mbps suffices-but SI8620ED-AS delivers superior speed/power tradeoff in WB SOIC-16 layouts. |
Compared with ADUM220N1BRZ and ISO7721FDWR, SI8620ED-AS uniquely combines 150 Mbps bandwidth, 5 kVRMS reinforced certification, and 1.6 mA/Mbps efficiency-making it optimal for next-generation EV OBCs and high-resolution isolated data acquisition where timing, safety, and power co-constrain design.
Availability
SI8620ED-AS is available at Aetrix Electronics and suitable for industrial motor control, EV battery management systems, and isolated ADC interfaces requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for SI8620ED-AS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for high-reliability applications.
The Si86xx family was engineered specifically for high-noise, safety-critical systems-delivering RF-based digital isolation with reinforced certification, extended temperature operation, and fail-safe configurability for automotive and industrial markets.
FAQ
What is the isolation rating and safety certification status of the SI8620ED-AS?
The SI8620ED-AS is rated for 5 kVRMS reinforced isolation and certified to UL 1577, CSA IEC 62368-1, VDE 0884-10 (reinforced), and CQC GB4943.1. These approvals validate its use in safety-critical applications such as EV battery management and industrial PLCs where double insulation is mandated.
Does the SI8620ED-AS require external components for stable operation?
Yes-the SI8620ED-AS requires a 0.1 µF ceramic bypass capacitor between VDD1 and GND1, and another between VDD2 and GND2, placed within 2 mm of the respective pins. No pull-up/pull-down resistors are needed, as the 'ED' variant integrates internal pull-ups for fail-safe high output.
How does the fail-safe mode function in the SI8620ED-AS during power loss?
In the SI8620ED-AS, the 'ED' suffix indicates default-high fail-safe mode: when VDD1 is unpowered but VDD2 remains active, outputs B1 and B2 drive logic high. This behavior is hardwired-not software-configurable-and prevents undefined states in critical shutdown sequences of motor drives and power supplies.
What is the maximum data rate supported by the SI8620ED-AS, and how is signal integrity maintained?
The SI8620ED-AS supports up to 150 Mbps with guaranteed 5 ns minimum pulse width and 350 ps peak eye diagram jitter. Signal integrity is preserved via RF modulation architecture, 50 Ω output impedance matching, and 50 kV/µs CMTI-enabling clean eye diagrams even at full data rate as verified in Figure 3 of the datasheet.
Can the SI8620ED-AS operate with mismatched supply voltages on each side?
Yes-the SI8620ED-AS supports independent 2.5–5.5 V supplies on VDD1 and VDD2, enabling seamless level shifting between 3.3 V microcontrollers and 5 V analog subsystems. Input thresholds (VT+ = 1.67 V typ) and output drive (VOH = VDD − 0.4 V) are fully compatible across this range without external level translators.
SI8620ED-AS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 2
- Inputs - Side 1/Side 2:
- 2/0
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 13ns, 13ns
- Pulse Width Distortion (Max):
- 4.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI8620ED-AS FAQ
1.How can I place an order for SI8620ED-AS through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8620ED-AS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8620ED-AS reliable?
The price and inventory of SI8620ED-AS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8620ED-AS is usually 5 days.
3.What payment methods are accepted for SI8620ED-AS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8620ED-AS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8620ED-AS?
SI8620ED-AS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8620ED-AS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8620ED-AS?
For technical support, including SI8620ED-AS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8620ED-AS requirements.
6.How does Aetrix verify that SI8620ED-AS is sourced from the original manufacturer or authorized distributors?
All SI8620ED-AS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8620ED-AS meets industry standards.
7.What is the process for return or replacement of SI8620ED-AS?
All SI8620ED-AS units undergo pre-shipment inspection (PSI). If there is an issue with SI8620ED-AS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8620ED-AS part is unused and in its original packaging.
Return procedure for SI8620ED-AS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8620ED-AS Tags
-
ISO1212DBQR
Texas Instruments

-
ISO6721BDR
Texas Instruments

-
SI8710AC-B-ISR
Skyworks Solutions Inc.

-
ISO7720FDR
Texas Instruments

-
ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

-
SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
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