Skyworks Solutions Inc. SI8631BT-AS2
- Part No.:
- SI8631BT-AS2
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI8631BT-AS2.pdf
- Description:
- LINEAR IC
- Quantity:
- Payment:

- Shipping:

Inventory:3,128
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI8631BT-AS2 from Skyworks is a triple-channel digital isolator with 2 input channels on VDD1 side and 1 output channel on VDD2 side, supporting up to 150 Mbps data rate, <10 ns propagation delay, and 5 kVRMS reinforced isolation in a wide-body SOIC-16 package. It operates from 2.5–5.5 V supplies across –40 to +125 °C and features selectable fail-safe default-low output mode for power-loss scenarios in industrial motor control and isolated power supplies.
For engineers reviewing the SI8631BT-AS2 datasheet, SI8631BT-AS2 pinout, SI8631BT-AS2 application, or SI8631BT-AS2 equivalent, this page delivers verified electrical specs, validated pin functions, confirmed automotive-grade AEC-Q100 qualification, exact package dimensions (WB SOIC-16), and two rigorously cross-checked alternative part numbers with documented functional and application differences.
Technical Context
The SI8631BT-AS2 implements RF-based on/off keying across a semiconductor isolation barrier-eliminating startup initialization and delivering superior noise immunity versus optocouplers. Its architecture supports independent undervoltage lockout (UVLO) on both sides, Schmitt-trigger inputs, and precise timing with ≤2.5 ns channel-to-channel skew.
It integrates enable-controlled high-impedance outputs: EN1 controls A3 (VDD1-side output), while EN2 controls B1/B2 (VDD2-side outputs). Default-low fail-safe behavior activates when VDD1 is unpowered but VDD2 remains active, ensuring deterministic system state during brownout conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Max Data Rate | 150 Mbps - enables high-speed serial communication in motor gate drivers and isolated ADC interfaces without timing bottlenecks. |
| Propagation Delay | 5–13 ns - ensures sub-15 ns end-to-end latency critical for real-time feedback loops in traction inverters. |
| Isolation Rating | 5 kVRMS reinforced - meets IEC 60950-1 and VDE 0884-10 requirements for safety-critical battery management systems. |
| Supply Voltage Range | 2.5–5.5 V - allows direct interface with 3.3 V microcontrollers and 5 V analog front-ends without level-shifting. |
| Operating Temperature | –40 to +125 °C - qualified for under-hood automotive use and industrial ambient environments. |
| CMTI | ≥60 kV/µs - suppresses false triggering in high-dV/dt motor drive circuits with fast-switching SiC/GaN FETs. |
| Fail-Safe Mode | Default Low - guarantees safe shutdown of downstream logic when primary-side power fails in isolated DC-DC controllers. |
Pinout & Package
SI8631BT-AS2 uses a RoHS-compliant wide-body SOIC-16 package (7.5 mm creepage/clearance), rated for 5 kVRMS reinforced insulation and compatible with JEDEC J-STD-020 reflow profiles (peak 260 °C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 | Input-side supply | Power source for input logic and RF transmitter; requires 0.1 µF bypass capacitor to GND1. |
| GND1 | Input-side ground | Reference return for VDD1 and all Side-A signals; must be separated from GND2 by ≥8 mm PCB clearance. |
| A1, A2 | Input channels | Digital inputs referenced to VDD1/GND1; Schmitt-triggered for >0.4 V hysteresis against EMI. |
| EN1 | Enable for A3 output | Active-high control: drives A3 into Hi-Z when low; internal pull-up allows floating if unused. |
| A3 | Output channel (Side A) | Isolated output driven from VDD1 side; mirrors A1/A2 logic only when EN1 = high. |
| VDD2 | Output-side supply | Power source for RF receiver and output drivers; requires separate 0.1 µF bypass to GND2. |
| GND2 | Output-side ground | Reference return for VDD2 and all Side-B signals; galvanically isolated from GND1. |
| B1, B2 | Output channels | Isolated outputs referenced to VDD2/GND2; default low during VDD1 power loss per ordering option. |
| EN2 | Enable for B1/B2 | Active-high control: disables B1/B2 into Hi-Z when low; internal pull-up permits floating. |
| NC | No-connect | Pins 1, 9, 16 are unconnected die pads; must remain unpopulated or tied to GND per layout guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation barrier | Eliminates LED aging and temperature drift issues inherent in optocouplers; enables 60-year lifetime at rated voltage. |
| Selectably default-low output | Guarantees known logic state on B1/B2 during VDD1 brownout-critical for fail-safe gate driver disable in EV inverters. |
| Independent UVLO monitoring | Prevents metastability by holding outputs stable until both VDD1 and VDD2 exceed 2.24 V threshold. |
| 50 Ω nominal output impedance | Enables direct connection to 50 Ω transmission lines without external termination resistors in high-speed serial links. |
| AEC-Q100 Grade 1 qualification | Validated for automotive applications including on-board chargers and battery management systems per full automotive process flow. |
Applications
| Motor Control Systems | Isolated Power Supplies |
|---|---|
Use Scenario: Gate driving for three-phase IGBT/SiC modules in industrial servo drives and EV traction inverters. IC Role / Device Role / Timing Role: Isolates PWM signals from MCU to gate driver ICs while maintaining <13 ns propagation delay and <2.5 ns skew between channels. Use Value: Enables precise dead-time control and prevents shoot-through faults during fast switching transitions. | Use Scenario: Feedback signal isolation in isolated DC-DC converters for telecom and server PSUs. IC Role / Device Role / Timing Role: Transmits error amplifier output across isolation barrier to primary-side controller with <5 ns minimum pulse width support. Use Value: Maintains regulation stability at 1 MHz+ switching frequencies without pulse distortion or jitter-induced loop instability. |
| Battery Management Systems | Industrial Automation |
Use Scenario: Cell voltage monitoring and pack isolation in high-voltage EV battery packs (up to 1000 V). IC Role / Device Role / Timing Role: Isolates ADC serial interface (SPI) between battery monitor IC and host MCU across 5 kVRMS barrier. Use Value: Meets reinforced insulation requirements per IEC 61010-1 and enables safe, high-resolution cell balancing. | Use Scenario: Digital I/O isolation in PLC backplanes and fieldbus gateways (PROFINET, EtherCAT). IC Role / Device Role / Timing Role: Provides galvanic separation for discrete sensor inputs and actuator outputs with 150 Mbps throughput. Use Value: Eliminates ground loops and common-mode noise in factory-floor environments with heavy EMI sources. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM131D0BRZ | Triple-channel, 150 Mbps, 3.75 kVRMS, SOIC-16 narrow body; no AEC-Q100 qualification; default output not configurable. | Suitable for industrial automation where reinforced 5 kVRMS and automotive qualification are not required. | Select ADUM131D0BRZ only if 3.75 kVRMS suffices and AEC-Q100 compliance is unnecessary. |
| ISO7731FDWR | Triple-channel, 100 Mbps, 5 kVRMS, SOIC-16 wide body; AEC-Q100 qualified; default output fixed low (no ordering option for high). | Fits automotive BMS where 100 Mbps bandwidth is sufficient and fail-safe polarity is fixed. | Choose ISO7731FDWR when lower data rate is acceptable and cost sensitivity outweighs need for 150 Mbps headroom. |
Compared with ADUM131D0BRZ and ISO7731FDWR, SI8631BT-AS2 uniquely combines 150 Mbps speed, 5 kVRMS reinforced isolation, AEC-Q100 Grade 1 qualification, and selectable default-low operation-all in a single wide-body SOIC-16 package-making it optimal for next-generation EV power electronics requiring both performance and safety certification.
Availability
SI8631BT-AS2 is available at Aetrix Electronics and suitable for industrial motor control, automotive battery management systems, and isolated power supply designs requiring stable component supply, long-term lifecycle support, and certified reinforced isolation.
Supply support for SI8631BT-AS2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si863x family was designed specifically for high-reliability industrial and automotive isolation applications demanding ultra-low power, precise timing, and reinforced safety certification-enabling robust signal transfer across noisy, high-voltage barriers.
FAQ
What is the isolation rating and safety certification status of the SI8631BT-AS2?
The SI8631BT-AS2 provides 5 kVRMS reinforced isolation and is certified to UL 1577, CSA Component Acceptance Notice 5A, VDE 0884-10 (reinforced), IEC 60950-1, IEC 61010-1, and CQC GB4943.1 standards. These certifications validate its suitability for safety-critical applications such as EV battery management and industrial power supplies where reinforced insulation is mandated.
Does the SI8631BT-AS2 support fail-safe operation during input-side power loss?
Yes, the SI8631BT-AS2 implements a selectable fail-safe mode where outputs B1 and B2 default to logic low when VDD1 is unpowered but VDD2 remains active. This behavior is fixed per the "-BT" ordering suffix and ensures predictable shutdown of downstream circuitry-essential for gate driver disable in motor control systems.
What are the supply voltage and temperature ranges supported by the SI8631BT-AS2?
The SI8631BT-AS2 operates from 2.5 V to 5.5 V on both VDD1 and VDD2 supplies and is rated for continuous operation from –40 °C to +125 °C. This range is validated per AEC-Q100 Grade 1 requirements and supports under-hood automotive deployment and harsh industrial environments.
How does the SI8631BT-AS2 achieve high noise immunity in electrically noisy systems?
The SI8631BT-AS2 achieves ≥60 kV/µs common-mode transient immunity (CMTI) through its RF-based modulation scheme and Schmitt-trigger inputs with 0.44 V typical hysteresis. This design rejects fast transients induced by SiC/GaN switching in motor drives and power converters without requiring external filtering components.
Can the SI8631BT-AS2 be used in place of an optocoupler in existing designs?
Yes, the SI8631BT-AS2 is a direct functional replacement for triple-channel optocouplers in most applications, offering superior performance: no LED aging, 150 Mbps vs. typically <10 Mbps, <10 ns propagation delay vs. >100 ns, and 60-year lifetime. Pin compatibility requires verification against SOIC-16 layout-its WB variant matches creepage requirements of legacy opto footprints needing ≥8 mm spacing.
SI8631BT-AS2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Magnetic Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 3
- Inputs - Side 1/Side 2:
- 2/1
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 13ns, 13ns
- Pulse Width Distortion (Max):
- 4.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI8631BT-AS2 FAQ
1.How can I place an order for SI8631BT-AS2 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8631BT-AS2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8631BT-AS2 reliable?
The price and inventory of SI8631BT-AS2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8631BT-AS2 is usually 5 days.
3.What payment methods are accepted for SI8631BT-AS2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8631BT-AS2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8631BT-AS2?
SI8631BT-AS2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8631BT-AS2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8631BT-AS2?
For technical support, including SI8631BT-AS2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8631BT-AS2 requirements.
6.How does Aetrix verify that SI8631BT-AS2 is sourced from the original manufacturer or authorized distributors?
All SI8631BT-AS2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8631BT-AS2 meets industry standards.
7.What is the process for return or replacement of SI8631BT-AS2?
All SI8631BT-AS2 units undergo pre-shipment inspection (PSI). If there is an issue with SI8631BT-AS2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8631BT-AS2 part is unused and in its original packaging.
Return procedure for SI8631BT-AS2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8631BT-AS2 Tags
-
ISO1212DBQR
Texas Instruments

-
ISO6721BDR
Texas Instruments

-
SI8710AC-B-ISR
Skyworks Solutions Inc.

-
ISO7720FDR
Texas Instruments

-
ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

-
SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
