Skyworks Solutions Inc. SI8640BT-IS2
- Part No.:
- SI8640BT-IS2
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI8640BT-IS2.pdf
- Description:
- LINEAR IC'S
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI8640BT-IS2 from Skyworks is a quad-channel, unidirectional digital isolator with 4 input channels on VDD1 side and 0 on VDD2 side, rated for 5.0 kVRMS reinforced isolation, 150 Mbps data rate, and –40 to 125 °C operation. It features Schmitt-trigger inputs, tri-state outputs with single enable control (EN), and selectable fail-safe low-default output state - used in isolated gate drivers for industrial motor inverters.
For engineers reviewing the SI8640BT-IS2 datasheet, SI8640BT-IS2 pinout, SI8640BT-IS2 application, or SI8640BT-IS2 equivalent, key selection criteria include its 5.0 kVRMS wide-body SOIC-16 (IS2) creepage-enhanced package, 8 ns typical propagation delay, 0.5 ns channel-channel skew, 50 kV/µs CMTI, and compatibility with 2.5–5.5 V dual supplies across extended temperature.
Technical Context
The SI8640BT-IS2 implements RF-based on/off keying across a semiconductor isolation barrier, eliminating startup initialization and enabling robust noise immunity without optical degradation. Its architecture supports independent undervoltage lockout (UVLO) on both sides, with VDDUV+ = 2.24 V (typ) and hysteresis of 70 mV (typ).
All four channels are input-only on Side A (VDD1), driving outputs B1–B4 on Side B (VDD2); EN is located on Side B and controls all four outputs simultaneously. The IS2 package variant removes tie bars to achieve 8 mm creepage while retaining standard WB SOIC-16 land pattern and dimensions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 5.0 kVRMS reinforced insulation per UL/VDE/CSA/CQC; enables use in 1000 VAC industrial mains-connected systems. |
| Data Rate | DC to 150 Mbps - supports high-speed serial interfaces like isolated SPI, RS-485 transceiver control, and PWM feedback loops. |
| Propagation Delay | 8.0 ns typical - ensures sub-10 ns timing alignment critical for synchronous gate drive in SiC/GaN power stages. |
| Channel-Channel Skew | 0.5 ns max - guarantees tight timing correlation between parallel isolated signals in multi-phase motor control. |
| CMTI | 60 kV/µs min - withstands fast dv/dt transients in high-power inverters without data corruption. |
| Supply Range | 2.5–5.5 V on both sides - interoperable with 3.3 V microcontrollers and 5 V gate drivers without level-shifting. |
| Fail-Safe Default | Low-output during VDD1 loss - prevents unintended high-side FET turn-on in isolated half-bridge drivers. |
Pinout & Package
SI8640BT-IS2 uses a 16-pin wide-body SOIC package (IS2 variant) with 8 mm creepage via tie-bar elimination, maintaining standard WB SOIC-16 footprint and reflow profile (JEDEC Class 3, 260 °C peak).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 | Input-side supply | Power for input buffers and internal RF transmitter; must be bypassed with 0.1 µF capacitor. |
| GND1 | Input-side ground | Reference return for VDD1 and all input signals (A1–A4). |
| A1–A4 | Input channels | Unidirectional logic inputs with Schmitt-trigger thresholds (VT+ = 1.67 V typ, VT– = 1.23 V typ) for noise immunity. |
| VDD2 | Output-side supply | Power for output drivers and RF receiver; independent of VDD1 for true galvanic isolation. |
| GND2 | Output-side ground | Reference return for VDD2 and all output signals (B1–B4, EN). |
| B1–B4 | Output channels | CMOS-compatible outputs (VOH ≥ VDD2–0.4 V, VOL ≤ 0.4 V) with 50 Ω nominal impedance for controlled-impedance routing. |
| EN | Enable control | Active-high signal on VDD2 side; drives all B1–B4 into high-impedance when low - enables shared bus arbitration. |
| NC | No-connect | Pins 1, 9, 10, 16 are unconnected; may be left floating, tied to GND, or tied to VDD2 per layout best practice. |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation barrier | Eliminates LED aging and temperature drift; provides stable timing over –40 to 125 °C and 60-year life at rated voltage. |
| Tri-state output control | Single EN pin disables all four outputs simultaneously into high-impedance, enabling multi-drop isolated bus architectures. |
| Fail-safe low-default mode | Guarantees B1–B4 remain logic-low if VDD1 fails - critical for preventing shoot-through in isolated half-bridge gate drivers. |
| High CMTI (60 kV/µs) | Rejects common-mode noise from fast-switching SiC/GaN power stages without added filtering or layout constraints. |
| IS2 package creepage | 8 mm creepage distance achieved without altering PCB land pattern - simplifies safety certification for 1000 VAC systems. |
Applications
| Industrial Motor Control | Isolated ADC Interface |
|---|---|
Use Scenario: Isolating PWM signals from MCU to gate driver ICs in 3-phase inverter stacks for HVAC compressors and servo drives. IC Role / Device Role / Timing Role: Quad-channel unidirectional isolator transmitting four independent PWM control signals across reinforced 5.0 kVRMS barrier. Use Value: 0.5 ns channel skew ensures synchronized switching of IGBT/SiC FETs; 8 ns propagation delay enables >200 kHz carrier frequency modulation. | Use Scenario: Isolating serial interface lines (SCLK, SDI, SDO, CS) between isolated precision ADC (e.g., AD7403) and system MCU. IC Role / Device Role / Timing Role: High-speed digital isolator preserving SPI timing integrity across isolation barrier with minimal jitter. Use Value: 150 Mbps capability exceeds typical SPI clock rates (≤20 MHz); 350 ps peak eye jitter maintains bit error rate <1e–12. |
| On-Board Charger (OBC) | Medical Power Supply |
Use Scenario: Isolating digital control signals between primary-side controller and secondary-side monitoring in bidirectional EV OBCs. IC Role / Device Role / Timing Role: Fail-safe low-default isolator ensuring gate drive disable during primary-side brownout or communication loss. Use Value: Reinforced VDE 0884-10 certification and 5.0 kVRMS rating meet IEC 62368-1 requirements for EV charging infrastructure. | Use Scenario: Isolating feedback and alarm signals in 2 MOPP medical-grade AC/DC power supplies for patient-connected equipment. IC Role / Device Role / Timing Role: Quad-channel isolator providing galvanic separation for analog sensor monitoring and fault reporting paths. Use Value: 125 °C max operating temperature supports convection-cooled medical enclosures; RoHS-compliant packaging meets IEC 60601-1 material requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-channel digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM2400ARWZ | 4-channel, 25 kV/µs CMTI, 25 Mbps max, SOIC-16 narrow body, 2.5–5.5 V, default high output | Limited to 25 Mbps and lower CMTI; lacks fail-safe low option and reinforced 5.0 kVRMS rating | Select when cost sensitivity outweighs speed/safety needs and board space allows narrower SOIC. |
| ISO6741QDWR | 4-channel, 80 kV/µs CMTI, 50 Mbps max, SOIC-16 wide body, 1.71–5.5 V, no fail-safe default option | Lower data rate, no configurable default state, only basic 3.75 kVRMS isolation (not reinforced) | Choose for TI ecosystem designs where ultra-high CMTI is prioritized over speed and safety certification scope. |
Compared with ADUM2400ARWZ and ISO6741QDWR, SI8640BT-IS2 delivers 6× higher data rate than ADUM2400ARWZ and 3× higher than ISO6741QDWR, plus certified reinforced 5.0 kVRMS isolation and programmable fail-safe low behavior - making it uniquely suited for high-reliability, high-speed industrial and automotive power systems.
Availability
SI8640BT-IS2 is available at Aetrix Electronics and suitable for industrial motor control, on-board chargers, isolated ADC interfaces, and medical power supplies requiring stable component supply across extended temperature and safety-critical environments.
Supply support for SI8640BT-IS2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si864x family was designed specifically for high-reliability, high-speed digital isolation in industrial, automotive, and medical power systems - emphasizing low power, precise timing, and certified reinforced insulation.
FAQ
What is the isolation rating and certification status of SI8640BT-IS2?
SI8640BT-IS2 is rated for 5.0 kVRMS reinforced isolation and certified to UL 1577, CSA Component Notice 5A, VDE 0884-10 (reinforced), IEC 60950-1/62368-1/60601-1, and CQC GB4943.1. Its IS2 package achieves 8 mm creepage, supporting end-equipment compliance with 1000 VAC working voltage requirements.
Does SI8640BT-IS2 require startup initialization or configuration?
No, SI8640BT-IS2 requires no startup initialization or configuration. It begins transmitting valid data within 40 µs of power application (tSU max), with automatic UVLO management on both sides and immediate pass-through behavior once supplies exceed thresholds - ideal for fail-operational systems.
How does the fail-safe low-default mode function in SI8640BT-IS2?
In SI8640BT-IS2, when VDD1 is unpowered but VDD2 remains active, outputs B1–B4 default to logic-low due to internal 10 µA pull-downs. This behavior prevents unintended activation of high-side switches in isolated half-bridge drivers during input-side power loss.
What is the role of the EN pin in SI8640BT-IS2 and how is it implemented?
The EN pin on SI8640BT-IS2 is an active-high enable input located on the VDD2 side that simultaneously places all four outputs (B1–B4) into high-impedance state when driven low. It supports bus sharing, hot-swap isolation, and power-gated subsystem control without external logic.
Can SI8640BT-IS2 operate with mismatched supply voltages on VDD1 and VDD2?
Yes, SI8640BT-IS2 supports independent 2.5–5.5 V supplies on VDD1 and VDD2. This allows interfacing a 3.3 V MCU on Side A with a 5 V gate driver on Side B, or using different LDO outputs - with full timing specifications guaranteed across all valid combinations.
SI8640BT-IS2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si864x
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 4/0
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 60kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 13ns, 13ns
- Pulse Width Distortion (Max):
- 4.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.375V ~ 5.5V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI8640BT-IS2 FAQ
1.How can I place an order for SI8640BT-IS2 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8640BT-IS2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8640BT-IS2 reliable?
The price and inventory of SI8640BT-IS2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8640BT-IS2 is usually 5 days.
3.What payment methods are accepted for SI8640BT-IS2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8640BT-IS2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8640BT-IS2?
SI8640BT-IS2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8640BT-IS2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8640BT-IS2?
For technical support, including SI8640BT-IS2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8640BT-IS2 requirements.
6.How does Aetrix verify that SI8640BT-IS2 is sourced from the original manufacturer or authorized distributors?
All SI8640BT-IS2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8640BT-IS2 meets industry standards.
7.What is the process for return or replacement of SI8640BT-IS2?
All SI8640BT-IS2 units undergo pre-shipment inspection (PSI). If there is an issue with SI8640BT-IS2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8640BT-IS2 part is unused and in its original packaging.
Return procedure for SI8640BT-IS2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8640BT-IS2 Tags
-
ISO1212DBQR
Texas Instruments

-
ISO6721BDR
Texas Instruments

-
SI8710AC-B-ISR
Skyworks Solutions Inc.

-
ISO7720FDR
Texas Instruments

-
ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

-
SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
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