Skyworks Solutions Inc. SI8640ED-B-YSR
- Part No.:
- SI8640ED-B-YSR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI8640ED-B-YSR.pdf
- Description:
- LINEAR IC'S
- Quantity:
- Payment:

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Product details
Overview
SI8640ED-B-YSR from Skyworks is a quad-channel, unidirectional digital isolator with 4 input channels on VDD1 side and 0 on VDD2 side, rated for 5 kVRMS reinforced isolation in wide-body SOIC-16 package. It supports up to 150 Mbps data rate, achieves <10 ns propagation delay, and features selectable high-default fail-safe output mode. It is used in isolated gate drivers for industrial inverters where high CMTI and precise timing ensure robust PWM signal integrity across isolation barriers.
For engineers reviewing the SI8640ED-B-YSR datasheet, SI8640ED-B-YSR pinout, SI8640ED-B-YSR application, or SI8640ED-B-YSR equivalent, key selection criteria include its 5 kVRMS reinforced insulation (VDE 0884-10), tri-state enable control, Schmitt-trigger inputs for noise immunity, and ultra-low power consumption of 3.5 mA per channel at 100 Mbps with 2.5 V supply.
Technical Context
The SI8640ED-B-YSR implements RF-based on/off keying modulation across a silicon-dielectric isolation barrier, eliminating startup initialization and enabling deterministic timing behavior. Its architecture delivers sub-10 ns propagation delay with ≤0.5 ns channel-to-channel skew and ≤2 ns propagation delay skew between units.
It operates across 2.5–5.5 V supplies on both sides, includes independent undervoltage lockout (UVLO) on VDD1 and VDD2, and uses Schmitt-trigger inputs with 0.44 V typical hysteresis for >50 kV/µs common-mode transient immunity. The single EN pin (on VDD2 side) controls all four outputs simultaneously into high-impedance state.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels / Direction | 4-channel unidirectional (A→B only); eliminates need for bidirectional logic arbitration in motor control feedback paths. |
| Isolation Rating | 5 kVRMS reinforced (VDE 0884-10 certified); enables use in 1000 VDC bus systems without additional creepage augmentation. |
| Max Data Rate | 150 Mbps; supports high-resolution PWM sampling and fast serial communication in servo drives. |
| Propagation Delay | 8 ns typical; ensures tight timing alignment between isolated control and power stages in SiC/GaN inverters. |
| Supply Current @ 100 Mbps | 3.5 mA/channel @ 2.5 V; reduces thermal load in space-constrained isolated DC-DC bias supplies. |
| Fail-Safe Default | High-output during VDD1 loss; maintains safe-off state for IGBT gate drivers when primary-side power fails. |
| CMTI | 60 kV/µs typical; prevents false triggering in high-dV/dt environments like traction inverters. |
Pinout & Package
SI8640ED-B-YSR is housed in a RoHS-compliant wide-body SOIC-16 package (7.5 mm body width, 10.3 mm length) with 8 mm creepage, supporting reinforced insulation up to 5 kVRMS. Pin assignments follow standard Si864x layout for VDD1/GND1 (pins 1–8) and VDD2/GND2 (pins 9–16), with dedicated EN pin on VDD2 side.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 (Pin 1) | Input-side power supply | Supplies 2.5–5.5 V to input logic and RF transmitter; requires local 0.1 µF bypass capacitor. |
| GND1 (Pin 2) | Input-side ground reference | Reference for all A-side signals; must be separated from GND2 by ≥8 mm creepage for safety compliance. |
| A1–A4 (Pins 3–6) | Input data channels | Schmitt-trigger inputs with 0.44 V hysteresis; tolerate slow-rising edges and reject EMI in noisy motor drive environments. |
| VDD2 (Pin 10) | Output-side power supply | Supplies 2.5–5.5 V to RF receiver and output drivers; independent UVLO ensures safe behavior during asymmetric power loss. |
| GND2 (Pin 11) | Output-side ground reference | Reference for B-side outputs; galvanically isolated from GND1; defines secondary-side return path for gate drive current. |
| B1–B4 (Pins 12–15) | Output data channels | CMOS outputs with ~50 Ω impedance; compatible with 50 Ω PCB traces to minimize reflections in high-speed gate drive loops. |
| EN (Pin 16) | Enable control input | Active-high enable for all B outputs; drives outputs to high-Z when low-enables safe shutdown or multiplexing without external logic. |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation barrier | Eliminates LED aging and temperature drift issues of optocouplers; guarantees 60-year life at rated working voltage. |
| Selectable fail-safe output | Factory-configured high-default state ensures gate driver remains off during input-side brownout-critical for IGBT short-circuit protection. |
| Tri-state enable (EN) | Single-pin control disables all four outputs simultaneously into high-Z, enabling dynamic isolation domain partitioning in modular power converters. |
| Wide supply range (2.5–5.5 V) | Supports direct interface with 3.3 V microcontrollers and 5 V gate driver ICs without level-shifting, reducing BOM count. |
| Reinforced VDE 0884-10 certification | Validated for functional safety applications up to SIL-3 per IEC 61800-5-2; accepted by TÜV for industrial drive certification. |
Applications
| Industrial Inverter Control | Isolated ADC Interface |
|---|---|
Use Scenario: Isolating PWM signals from MCU to half-bridge gate drivers in 600–1200 VDC solar inverters. IC Role / Device Role / Timing Role: Quad-channel unidirectional isolator transmitting complementary high-side and low-side gate drive signals with matched propagation delay. Use Value: 0.5 ns channel-channel skew and 60 kV/µs CMTI prevent shoot-through during fast switching of SiC MOSFETs. | Use Scenario: Isolating serial data lines (SPI SCLK/MOSI/MISO) between isolated ADC (e.g., AD7403) and system controller. IC Role / Device Role / Timing Role: High-speed digital isolator preserving SPI timing integrity across isolation barrier for 16-bit sigma-delta ADC sampling. Use Value: 150 Mbps capability supports oversampled ADC data rates up to 20 MSPS without clock stretching or FIFO buffering. |
| Medical Power Supply | EV On-Board Charger |
Use Scenario: Providing reinforced isolation between primary-side controller and secondary-side telemetry in IEC 60601-1 compliant AC/DC power modules. IC Role / Device Role / Timing Role: Isolating fault reporting, voltage sense, and enable signals while maintaining 5 kVRMS patient-side safety separation. Use Value: VDE 0884-10 reinforced rating satisfies creepage/clearance requirements for BF-rated medical equipment without external spacing. | Use Scenario: Isolating CAN FD communication and analog sensor signals between OBC control board and high-voltage battery interface. IC Role / Device Role / Timing Role: Quad isolator handling HV bus voltage sensing, pre-charge status, and isolated gate drive enable in 800 V EV architectures. Use Value: 125 °C operating range and AEC-Q100 qualification support under-hood deployment with no derating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM140D0BRWZ | 4-channel, 150 Mbps, 3.75 kVRMS, SOIC-16WB, default-low fail-safe | Lacks VDE 0884-10 reinforced certification; UL 1577 only; not qualified for SIL-3 systems | Choose for cost-sensitive industrial PLC I/O where reinforced certification is not required. |
| ISO6740QDWR | 4-channel, 50 Mbps, 5 kVRMS, SOIC-16WB, default-high, automotive AEC-Q100 Grade 1 | Lower data rate limits use in high-frequency PWM; higher quiescent current (5.8 mA @ 1 Mbps, 5 V) | Choose when AEC-Q100 Grade 1 qualification is mandatory but 150 Mbps is unnecessary. |
Compared with ADUM140D0BRWZ and ISO6740QDWR, SI8640ED-B-YSR uniquely combines VDE 0884-10 reinforced certification, 150 Mbps speed, and factory-configured high-fail-safe output-making it optimal for safety-critical, high-speed industrial and EV traction applications requiring guaranteed off-state behavior during fault conditions.
Availability
SI8640ED-B-YSR is available at Aetrix Electronics and suitable for industrial inverters, medical power supplies, EV on-board chargers, and isolated data acquisition systems requiring stable component supply and long-term lifecycle support.
Supply support for SI8640ED-B-YSR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si864x family is designed for high-reliability industrial, medical, and automotive isolation applications demanding reinforced safety certification, ultra-low power, and precise timing-addressing limitations of legacy optocouplers and capacitive isolators.
FAQ
What is the isolation rating and safety certification of SI8640ED-B-YSR?
SI8640ED-B-YSR is rated for 5 kVRMS reinforced isolation and certified to VDE 0884-10, UL 1577, CSA 5A, and CQC GB4943.1 standards. It meets IEC 62368-1 and IEC 60601-1 requirements for reinforced insulation, making it suitable for medical and industrial safety-critical designs where creepage and working voltage compliance are mandatory.
Does SI8640ED-B-YSR support fail-safe operation, and how is it configured?
Yes, SI8640ED-B-YSR has factory-configured high-default fail-safe output. When VDD1 is unpowered but VDD2 remains active, all B1–B4 outputs default to logic high-ensuring gate drivers remain safely off during primary-side power loss. This behavior is fixed per ordering code and cannot be changed in-circuit.
What is the pin configuration and enable functionality of SI8640ED-B-YSR?
SI8640ED-B-YSR uses a wide-body SOIC-16 package with pins 1–8 for VDD1/GND1/A1–A4 and pins 9–16 for VDD2/GND2/EN/B1–B4. Pin 16 is the active-high EN input: when low, all four B outputs enter high-impedance state-enabling safe shutdown or dynamic domain isolation without external switches.
How does SI8640ED-B-YSR achieve low power consumption at high data rates?
SI8640ED-B-YSR consumes only 3.5 mA per channel at 100 Mbps with 2.5 V supply due to its optimized RF modulation architecture and low-leakage CMOS process. This enables efficient operation in thermally constrained isolated bias rails, reducing heat sink requirements in compact power modules compared to alternatives drawing >5 mA/channel at same conditions.
Is SI8640ED-B-YSR qualified for automotive applications?
No-SI8640ED-B-YSR is an industrial-grade part (suffix "-I") and not AEC-Q100 qualified. For automotive use, select SI8640ED-AS (automotive-grade variant), which shares identical electrical specs and packaging but includes AIAG-compliant PPAP documentation, IMDS/CAMDS support, and zero-defect manufacturing flow.
SI8640ED-B-YSR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si864x
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- -
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Data Rate:
- -
- Propagation Delay tpLH / tpHL (Max):
- 13ns, 13ns
- Pulse Width Distortion (Max):
- 4.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.375V ~ 5.5V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI8640ED-B-YSR FAQ
1.How can I place an order for SI8640ED-B-YSR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8640ED-B-YSR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8640ED-B-YSR reliable?
The price and inventory of SI8640ED-B-YSR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8640ED-B-YSR is usually 5 days.
3.What payment methods are accepted for SI8640ED-B-YSR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8640ED-B-YSR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8640ED-B-YSR?
SI8640ED-B-YSR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8640ED-B-YSR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8640ED-B-YSR?
For technical support, including SI8640ED-B-YSR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8640ED-B-YSR requirements.
6.How does Aetrix verify that SI8640ED-B-YSR is sourced from the original manufacturer or authorized distributors?
All SI8640ED-B-YSR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8640ED-B-YSR meets industry standards.
7.What is the process for return or replacement of SI8640ED-B-YSR?
All SI8640ED-B-YSR units undergo pre-shipment inspection (PSI). If there is an issue with SI8640ED-B-YSR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8640ED-B-YSR part is unused and in its original packaging.
Return procedure for SI8640ED-B-YSR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8640ED-B-YSR Tags
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ISO1212DBQR
Texas Instruments

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ISO6721BDR
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SI8710AC-B-ISR
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ISO7720FDR
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ISO7721DR
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ISO7721FDR
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SI8710CC-B-ISR
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ISO6741FQDWRQ1
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ISO7721DWVR
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ISO7762FDBQR
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ISO7741DWR
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ISO7741FDWR
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