Skyworks Solutions Inc. SI8641ET-AS2R
- Part No.:
- SI8641ET-AS2R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI8641ET-AS2R.pdf
- Description:
- LINEAR IC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI8641ET-AS2R from Skyworks is a quad-channel digital isolator with 3 input channels on VDD1 side and 1 output channel on VDD2 side, 5 kVRMS reinforced isolation (VDE 0884-10 certified), 150 Mbps data rate, and selectable high-default fail-safe mode. It operates from 2.5–5.5 V supplies across –40 to 125 °C and is used in battery management systems and isolated ADC interfaces where robust noise immunity and precise timing are required.
For engineers reviewing the SI8641ET-AS2R datasheet, SI8641ET-AS2R pinout, SI8641ET-AS2R application, or SI8641ET-AS2R equivalent, key selection criteria include its 3:1 channel asymmetry, 5 kVRMS wide-body SOIC-16 package, VDE-reinforced certification, and tri-state enable control for output-side power sequencing in automotive and industrial isolation barriers.
Technical Context
The SI8641ET-AS2R implements RF-based on/off keying across a silicon dioxide isolation barrier, eliminating startup initialization and enabling deterministic sub-10 ns propagation delay. Its dual-supply architecture supports independent 2.5–5.5 V operation on each side with separate undervoltage lockout (UVLO) monitors per domain.
It features two enable inputs (EN1 on VDD1 side, EN2 on VDD2 side) that independently control tri-state behavior of A4 and B1–B3 outputs respectively. The device uses Schmitt-trigger inputs (0.44 V typical hysteresis) and delivers 35–100 kV/µs common-mode transient immunity depending on variant.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels / Direction | 3 input + 1 output (A-side to B-side asymmetric configuration) |
| Isolation Rating | 5 kVRMS reinforced insulation, VDE 0884-10 certified (surge capable to 10 kV) |
| Max Data Rate | 150 Mbps - supports high-speed SPI, RS-485, and CAN FD signal isolation |
| Propagation Delay | 8 ns typical - enables tight-tolerance timing in closed-loop motor control feedback paths |
| Supply Voltage Range | 2.5–5.5 V per side - interoperable with 3.3 V microcontrollers and 5 V analog front-ends |
| Fail-Safe Default | High - ensures active-high enable signals remain asserted during VDD1 loss in BMS monitoring |
| CMTI | 60 kV/µs typical - maintains signal integrity in high-dV/dt environments like traction inverters |
Pinout & Package
SI8641ET-AS2R is housed in a RoHS-compliant wide-body SOIC-16 package (package code -AS2), offering 8 mm creepage distance and reinforced insulation suitable for reinforced safety barriers per IEC 62368-1 and IEC 60601-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 | Input-side supply | Power for channels A1–A3 and EN1; must be ≥2.5 V for valid input sampling |
| GND1 | Input-side ground | Reference for A1–A3 inputs and EN1; requires local 0.1 µF bypass to VDD1 |
| A1–A3 | Digital inputs (side A) | 3-channel logic inputs with Schmitt-trigger thresholds (VT+ = 1.67 V typ); drive internal RF modulator |
| EN1 | Enable for A4 output | Active-high control on VDD1 side; disables A4 into high-impedance when low |
| VDD2 | Output-side supply | Power for B1–B3 outputs and EN2; enables fail-safe high state when VDD1 is unpowered |
| GND2 | Output-side ground | Reference for B1–B3 outputs and EN2; requires local 0.1 µF bypass to VDD2 |
| B1–B3 | Digital outputs (side B) | 3-channel isolated outputs with 50 Ω nominal impedance; driven by RF demodulator |
| EN2 | Enable for B1–B3 outputs | Active-high control on VDD2 side; places B1–B3 in high-Z when low |
| A4 | Isolated output (side A) | Single output referenced to VDD1/GND1; enabled by EN1; default-high during VDD1 loss |
Key Features
| Feature | Design Value |
|---|---|
| Reinforced VDE 0884-10 isolation | Enables single-package reinforced barrier compliance in medical and EV battery systems without external creepage extenders |
| Tri-state enable per side | EN1 and EN2 allow independent output-side power sequencing and safe hot-plug operation in modular power converters |
| 0.5 ns channel-channel skew | Preserves phase alignment across multi-channel feedback signals in three-phase motor control and isolated current sensing |
| 1.5 ns pulse width distortion | Maintains duty cycle fidelity for PWM gate drive signals isolated across high-voltage barriers |
| Automotive-grade AEC-Q100 qualification | Validated for under-hood operation at 125 °C ambient with zero-defect manufacturing flow and PPAP support |
Applications
| Battery Management System Monitoring | Isolated ADC Interface |
|---|---|
|
Use Scenario: Real-time cell voltage and temperature monitoring in 400–800 V EV battery packs with distributed slave controllers. IC Role / Device Role / Timing Role: Isolates UART/SPI communication between MCU (low-side) and isolated ADCs/sensors (high-side), maintaining 150 Mbps throughput for fast sampling. Use Value: 60 kV/µs CMTI prevents corruption during switching transients in adjacent traction inverter stages. |
Use Scenario: Transmitting precision analog-to-digital conversion results from isolated sigma-delta ADCs to host processor across >1 kV working voltage barriers. IC Role / Device Role / Timing Role: Provides galvanic isolation for serial data lines (e.g., SDO of ADS131M04) while preserving sub-10 ns timing margins for synchronized sampling. Use Value: 0.5 ns channel-channel skew ensures accurate phase correlation between multi-channel current/voltage measurements. |
| On-Board Charger Control | Traction Inverter Gate Drive Feedback |
|
Use Scenario: Isolating digital control signals between primary-side controller and secondary-side DC-DC supervisor in bidirectional OBC topologies. IC Role / Device Role / Timing Role: Transfers enable/disable, fault status, and soft-start commands across reinforced barrier with fail-safe high default to maintain safe shutdown state. Use Value: 5 kVRMS rating meets reinforced insulation requirements for 1000 V AC mains-connected systems per IEC 62368-1. |
Use Scenario: Returning isolated gate driver status (DESAT, UVLO, fault) and current sense feedback from high-side IGBTs to central controller in 800 V inverters. IC Role / Device Role / Timing Role: Carries time-critical fault signals with <10 ns propagation delay to enable sub-microsecond overcurrent response. Use Value: Tri-state enable (EN2) allows dynamic disabling of feedback paths during inverter reset sequences without PCB layout changes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM4401BRIZ | 4-channel symmetrical (2/2), 100 Mbps max, 2.5 kVRMS basic isolation, SOIC-16 NB | Lacks reinforced certification and 5 kVRMS rating; not suitable for medical or EV battery primary barriers | Choose for cost-sensitive industrial PLC I/O where 2.5 kVRMS suffices and symmetric channel count is required |
| ISO7741FDWR | 4-channel symmetrical (2/2), 100 Mbps, 5 kVRMS reinforced, SOIC-16 WB, no selectable fail-safe default | Fixed default-low output; lacks EN1/EN2 flexibility for asymmetric enable control | Prefer when symmetric 2:2 isolation is needed and high-default fail-safe is not required for system safety logic |
Compared with ADUM4401BRIZ and ISO7741FDWR, SI8641ET-AS2R uniquely provides 3:1 channel asymmetry, VDE-reinforced 5 kVRMS in wide-body SOIC-16, and programmable high-default fail-safe-making it optimal for BMS monitor IC interfacing where input-heavy isolation and safety-critical default states are mandatory.
Availability
SI8641ET-AS2R is available at Aetrix Electronics and suitable for battery management systems, on-board chargers, and traction inverter control requiring stable component supply with automotive-grade traceability and long-term lifecycle support.
Supply support for SI8641ET-AS2R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si864x family was designed specifically for high-reliability automotive and industrial isolation applications demanding reinforced safety certification, ultra-low power, and precise timing-targeting EV powertrain, renewable energy, and medical equipment markets.
FAQ
What is the isolation rating and safety certification of SI8641ET-AS2R?
SI8641ET-AS2R provides 5 kVRMS reinforced isolation and is certified to VDE 0884-10 (reinforced), UL 1577, CSA 5A, and CQC GB4943.1. It meets IEC 62368-1 and IEC 60601-1 requirements for reinforced insulation in medical and EV applications. The -AS2 package offers 8 mm creepage for high-voltage barrier integrity.
How does the fail-safe default output work on SI8641ET-AS2R?
SI8641ET-AS2R is configured as a default-high device: when VDD1 is unpowered but VDD2 remains active, outputs B1–B3 and A4 assert logic high. This behavior is fixed by ordering option ('E' suffix) and ensures safe shutdown states in battery monitor circuits where loss of primary supply must trigger alert conditions.
What are the enable pin functions for SI8641ET-AS2R?
SI8641ET-AS2R has two independent enable inputs: EN1 (on VDD1 side) controls tri-state of A4; EN2 (on VDD2 side) controls tri-state of B1–B3. Both are active-high and internally pulled up. When disabled, outputs enter high-impedance-enabling flexible power sequencing in modular power systems without external logic.
Does SI8641ET-AS2R support 2.5 V and 5 V supply operation simultaneously?
Yes, SI8641ET-AS2R supports independent 2.5–5.5 V operation on VDD1 and VDD2 sides. It interfaces seamlessly between 2.5 V sensor interfaces and 5 V microcontrollers, with guaranteed performance across the full range. Input thresholds (VT+ = 1.67 V typ) ensure compatibility with both logic families without level shifters.
What is the channel configuration of SI8641ET-AS2R and how is it used in practice?
SI8641ET-AS2R has 3 inputs (A1–A3) and 1 output (A4) on the VDD1 side, plus 3 outputs (B1–B3) on the VDD2 side - a 3:1 asymmetric topology. This is deployed in BMS where A1–A3 read cell voltages, A4 reports pack-level fault, and B1–B3 return isolated ADC status or temperature data to the host MCU across the barrier.
SI8641ET-AS2R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si864x
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Magnetic Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 3/1
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 13ns, 13ns
- Pulse Width Distortion (Max):
- 4.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.375V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI8641ET-AS2R FAQ
1.How can I place an order for SI8641ET-AS2R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8641ET-AS2R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8641ET-AS2R reliable?
The price and inventory of SI8641ET-AS2R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8641ET-AS2R is usually 5 days.
3.What payment methods are accepted for SI8641ET-AS2R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8641ET-AS2R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8641ET-AS2R?
SI8641ET-AS2R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8641ET-AS2R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8641ET-AS2R?
For technical support, including SI8641ET-AS2R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8641ET-AS2R requirements.
6.How does Aetrix verify that SI8641ET-AS2R is sourced from the original manufacturer or authorized distributors?
All SI8641ET-AS2R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8641ET-AS2R meets industry standards.
7.What is the process for return or replacement of SI8641ET-AS2R?
All SI8641ET-AS2R units undergo pre-shipment inspection (PSI). If there is an issue with SI8641ET-AS2R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8641ET-AS2R part is unused and in its original packaging.
Return procedure for SI8641ET-AS2R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8641ET-AS2R Tags
-
ISO1212DBQR
Texas Instruments

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ISO6721BDR
Texas Instruments

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SI8710AC-B-ISR
Skyworks Solutions Inc.

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ISO7720FDR
Texas Instruments

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ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

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SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

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ISO7721DWVR
Texas Instruments
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ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
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