My Inquiry
My Account
Skyworks Solutions Inc. SI8641ET-ASR
- Part No.:
- SI8641ET-ASR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI8641ET-ASR.pdf
- Description:
- AUTOMOTIVE 10 KV SURGE, 5 KV ISO
- Quantity:
- Payment:
- Shipping:
Inventory:4,329
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI8641ET-ASR from Skyworks is a quad-channel digital isolator with 3 input channels on VDD1 side and 1 output channel on VDD2 side, 5 kVRMS reinforced isolation rating, fail-safe default-high output mode, and 150 Mbps data rate. It operates from 2.5–5.5 V supplies across –40 to 125 °C and delivers sub-10 ns propagation delay with <0.5 ns channel-channel skew-enabling precise timing in isolated gate drivers for industrial motor inverters.
For engineers reviewing the SI8641ET-ASR datasheet, SI8641ET-ASR pinout, SI8641ET-ASR application, or SI8641ET-ASR equivalent, this page provides verified specifications, SOIC-16 wide-body package details, fail-safe logic behavior, CMTI >60 kV/µs immunity, and automotive-grade AEC-Q100 qualified alternatives for high-reliability power conversion designs.
Technical Context
The SI8641ET-ASR implements RF-based on/off keying across a silicon-dielectric isolation barrier, eliminating startup initialization and enabling robust noise immunity without optical degradation. Its architecture supports independent undervoltage lockout (UVLO) on both sides, with VDDUV+ = 2.24 V (typ) and hysteresis of 70 mV (typ).
It features two enable inputs (EN1 on VDD1 side, EN2 on VDD2 side) controlling tri-state outputs: EN1 disables A4; EN2 disables B1–B3. Default-high operation uses 10 µA internal pull-ups on all I/Os per Si86xxxT ordering convention, ensuring deterministic state during VDD1 loss while VDD2 remains active.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels / Direction | 4-channel, 3:1 unidirectional (A1–A3 → B1–B3; A4 ← B4) |
| Isolation Rating | 5 kVRMS reinforced (VDE 0884-10 certified, 10 kV surge capable) |
| Max Data Rate | 150 Mbps - supports high-speed SPI, isolated ADC interface, and PWM feedback loops |
| Propagation Delay | 8 ns (typ) - enables tight timing closure in closed-loop motor control systems |
| CMTI | ≥60 kV/µs - sustains reliable operation in noisy high-dv/dt environments like IGBT/SiC gate drive circuits |
| Supply Range | 2.5–5.5 V per side - interoperable with 3.3 V microcontrollers and 5 V analog front-ends |
| Fail-Safe Mode | Default-high output - ensures safe shutdown of downstream logic upon input-side power loss |
Pinout & Package
SI8641ET-ASR is housed in a RoHS-compliant 16-pin wide-body SOIC package (WB SOIC-16, -IS suffix), with 8 mm creepage and reinforced insulation suitable for 5 kVRMS working voltage applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 | Input-side supply | Power for channels A1–A4 and EN1; must be ≥2.5 V for valid input sampling |
| GND1 | Input-side ground | Reference for A1–A4 inputs and EN1; requires local 0.1 µF bypass to VDD1 |
| A1–A3 | Input signals (VDD1 side) | Drive isolated logic to B1–B3; Schmitt-triggered for >0.44 V hysteresis against EMI |
| A4 | Input signal with EN1 control | Signal passes to B4 only when EN1 = high; otherwise B4 enters high-Z state |
| EN1 | Enable for A4→B4 path | Active-high control on VDD1 side; internally pulled up, can float but recommended tied externally in noisy environments |
| VDD2 | Output-side supply | Power for B1–B4 outputs and EN2; enables fail-safe default-high behavior when VDD1 = 0 |
| GND2 | Output-side ground | Reference for B1–B4 outputs and EN2; requires local 0.1 µF bypass to VDD2 |
| B1–B3 | Output signals (VDD2 side) | Isolated replicas of A1–A3; default-high during VDD1 loss per T-ordering option |
| B4 | Output signal with EN2 control | Replica of A4 only when EN2 = high; otherwise high-Z - enables output multiplexing |
| EN2 | Enable for B1–B3 paths | Active-high control on VDD2 side; disables B1–B3 into high-Z when low |
| NC | No-connect | Pins 1, 9, 16 are unused; no internal connection - may be left floating or grounded |
Key Features
| Feature | Design Value |
|---|---|
| Reinforced VDE 0884-10 certification | Validated 5 kVRMS working voltage and 10 kV surge withstand for safety-critical industrial and automotive systems |
| Tri-state outputs with dual enable | Independent EN1 (controls A4→B4) and EN2 (controls B1–B3) allow dynamic channel gating without external logic |
| Ultra-low power at 100 Mbps | 7.3 mA (typ) on VDD1 and 14.3 mA (typ) on VDD2 at 100 Mbps - reduces thermal load in dense PCB layouts |
| Sub-10 ns timing precision | 8 ns (typ) propagation delay with 0.5 ns (typ) channel-channel skew - enables synchronous multi-axis motor control |
| Fail-safe default-high logic | Guaranteed logic-high output on all channels during VDD1 brownout - prevents unintended actuation in power stage control |
Applications
| Industrial Motor Drives | Isolated Power Supply Feedback |
|---|---|
|
Use Scenario: Isolating PWM gate signals and current-sense feedback between MCU and 3-phase IGBT/SiC inverter stages. IC Role / Device Role / Timing Role: SI8641ET-ASR transmits three phase-control signals (A1–A3 → B1–B3) and receives isolated current-sense status (B4 ← A4) with <0.5 ns skew. Use Value: 60 kV/µs CMTI prevents false triggering during 5 kV/µs switching transients; default-high ensures safe shutdown if MCU supply fails. |
Use Scenario: Providing isolated feedback from secondary-side error amplifier to primary-side PWM controller in flyback or LLC converters. IC Role / Device Role / Timing Role: SI8641ET-ASR carries error voltage (A1→B1), overvoltage flag (A2→B2), and thermal alert (A3→B3) across 5 kVRMS barrier. Use Value: 150 Mbps capability supports fast transient response; 8 ns delay preserves loop stability; reinforced VDE 0884-10 meets IEC 62368-1 requirements. |
| Battery Management Systems | Traction Inverter Control |
|
Use Scenario: Isolating cell monitoring IC data and pack-level fault signals between high-voltage battery stack and 12 V MCU domain. IC Role / Device Role / Timing Role: SI8641ET-ASR routes three cell voltage readings (A1–A3 → B1–B3) and one pack-isolation status (A4 → B4) with fail-safe high default. Use Value: AEC-Q100 qualification ensures reliability in automotive environments; 5 kVRMS rating covers 800 V battery systems with margin. |
Use Scenario: Transmitting torque command, temperature status, and DC-link voltage feedback from vehicle controller to inverter gate driver stage. IC Role / Device Role / Timing Role: SI8641ET-ASR conveys three real-time control signals (A1–A3 → B1–B3) and enables diagnostics via EN2-controlled B4 reporting. Use Value: Dual enable pins allow runtime reconfiguration; 125 °C ambient rating supports under-hood placement; reinforced insulation meets ISO 26262 ASIL-B requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SI8641BT-ASR | Same 3:1 channel count, 5 kVRMS, WB SOIC-16, but default-low fail-safe mode (10 µA pull-downs) | Suitable where system requires active-low reset or disable assertion during input-side power loss | Select SI8641BT-ASR when deterministic low-state behavior is required on power interruption |
| ADUM2401ARWZ | 4-channel, 2.5 kVRMS basic insulation, SOIC-16 narrow body, 25 Mbps max data rate, no dual-enable architecture | Limited to lower-speed industrial interfaces; lacks reinforced isolation and fail-safe configurability | Choose ADUM2401ARWZ only for cost-sensitive, non-safety-critical 25 Mbps applications with existing narrow-SOIC layout |
Compared with SI8641BT-ASR, SI8641ET-ASR provides guaranteed high-state outputs during VDD1 loss-critical for fail-safe gate driver enablement-while ADUM2401ARWZ offers lower cost and legacy compatibility at the expense of speed, isolation strength, and programmable safety behavior.
Availability
SI8641ET-ASR is available at Aetrix Electronics and suitable for industrial motor drives, battery management systems, isolated power supplies, and traction inverter control requiring stable component supply and long-term lifecycle support.
Supply support for SI8641ET-ASR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si864x family was designed for high-reliability isolation in industrial automation, medical equipment, and automotive electrification-delivering RF-based performance with CMOS robustness and safety certifications.
FAQ
What is the isolation rating and safety certification of SI8641ET-ASR?
SI8641ET-ASR provides 5 kVRMS reinforced isolation and is certified to VDE 0884-10 (reinforced), UL 1577, CSA 5A, and CQC GB4943.1. It meets IEC 62368-1 and IEC 60601-1 requirements for reinforced insulation, with 10 kV surge capability-making it suitable for medical and industrial safety-critical applications.
How does the fail-safe default-high mode function in SI8641ET-ASR?
In SI8641ET-ASR, the "ET" ordering code specifies default-high fail-safe behavior: when VDD1 is unpowered but VDD2 remains active, all outputs (B1–B4) assert logic high via internal 10 µA pull-ups. This ensures safe deactivation of downstream power stages during MCU supply faults.
What are the enable pin functions on SI8641ET-ASR?
SI8641ET-ASR has two independent enable inputs: EN1 (on VDD1 side) controls the A4→B4 path, and EN2 (on VDD2 side) controls B1–B3 outputs. When either enable is low, its associated outputs enter high-impedance state-enabling dynamic channel disabling without external logic.
Does SI8641ET-ASR support AEC-Q100 qualification?
Yes, SI8641ET-ASR is an automotive-grade part with AEC-Q100 qualification (Grade 1, –40 to 125 °C). It is manufactured using automotive-specific process flows, supported by AIAG-compliant PPAP documentation, IMDS/CAMDS listings, and zero-defect methodology throughout production.
What is the maximum data rate and timing performance of SI8641ET-ASR?
SI8641ET-ASR supports up to 150 Mbps data rate with typical propagation delay of 8 ns, pulse width distortion of 0.2 ns, channel-channel skew of 0.5 ns, and propagation delay skew of 2.0 ns-enabling precise synchronization in high-speed digital interfaces such as isolated SPI and encoder feedback links.
SI8641ET-ASR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si864x
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 3/1
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 13ns, 13ns
- Pulse Width Distortion (Max):
- 4.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.375V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI8641ET-ASR FAQ
1.How can I place an order for SI8641ET-ASR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8641ET-ASR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8641ET-ASR reliable?
The price and inventory of SI8641ET-ASR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8641ET-ASR is usually 5 days.
3.What payment methods are accepted for SI8641ET-ASR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8641ET-ASR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8641ET-ASR?
SI8641ET-ASR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8641ET-ASR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8641ET-ASR?
For technical support, including SI8641ET-ASR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8641ET-ASR requirements.
6.How does Aetrix verify that SI8641ET-ASR is sourced from the original manufacturer or authorized distributors?
All SI8641ET-ASR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8641ET-ASR meets industry standards.
7.What is the process for return or replacement of SI8641ET-ASR?
All SI8641ET-ASR units undergo pre-shipment inspection (PSI). If there is an issue with SI8641ET-ASR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8641ET-ASR part is unused and in its original packaging.
Return procedure for SI8641ET-ASR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8641ET-ASR Tags
-
ISO1212DBQR
Texas Instruments
-
ISO6721BDR
Texas Instruments
-
SI8710AC-B-ISR
Skyworks Solutions Inc.
-
ISO7720FDR
Texas Instruments
-
ISO7721DR
Texas Instruments
-
ISO7721FDR
Texas Instruments
-
SI8710CC-B-ISR
Skyworks Solutions Inc.
-
ISO6741FQDWRQ1
Texas Instruments
-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments
-
ISO7741DWR
Texas Instruments
-
ISO7741FDWR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
