Skyworks Solutions Inc. SI8642BT-ASR
- Part No.:
- SI8642BT-ASR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI8642BT-ASR.pdf
- Description:
- AUTOMOTIVE 10 KV SURGE, 5 KV ISO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI8642BT-ASR from Skyworks is a quad-channel, 2-input/2-output digital isolator with reinforced 5 kVRMS isolation, 150 Mbps data rate, <10 ns propagation delay, and selectable fail-safe low-default output state. It operates across –40 to 125 °C and supports 2.5–5.5 V dual supplies, enabling robust signal isolation in high-noise motor control and battery management systems.
For engineers reviewing the SI8642BT-ASR datasheet, SI8642BT-ASR pinout, SI8642BT-ASR application, or SI8642BT-ASR equivalent, this page delivers verified specifications, package mapping, functional context, and real-world design implications - including fail-safe behavior during power loss, tri-state enable control, and VDE 0884-10 reinforced insulation compliance.
Technical Context
The SI8642BT-ASR implements RF-based on/off keying across a semiconductor isolation barrier, eliminating startup initialization and providing inherent noise immunity without optical degradation. Its architecture supports independent undervoltage lockout (UVLO) on both sides, with VDDUV+ = 2.24 V (typ) and hysteresis of 70 mV (typ).
It features two bidirectional enable inputs (EN1, EN2), each controlling one pair of outputs (A3/A4 and B1/B2 respectively), allowing selective channel gating. The device uses Schmitt-trigger inputs (VT+ = 1.67 V, VT– = 1.23 V) and delivers precise timing: 0.5 ns typical channel-channel skew and 2 ns propagation delay skew.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 5 kVRMS reinforced (VDE 0884-10 certified); enables direct interface with 1000 VDC bus systems in traction inverters. |
| Max Data Rate | 150 Mbps; supports high-speed SPI, UART, and isolated ADC/DAC interfaces without timing bottlenecks. |
| Propagation Delay | 8 ns (typ); ensures sub-10 ns latency for real-time feedback loops in motor control and power conversion. |
| Supply Voltage Range | 2.5–5.5 V per side; allows interoperability with 3.3 V microcontrollers and 5 V analog subsystems without level shifters. |
| Fail-Safe Default | Low-output during input-side power loss; prevents undefined states in safety-critical BMS fault detection paths. |
| Common-Mode Transient Immunity | 60 kV/µs (typ); maintains signal integrity in high-dV/dt environments like IGBT gate drivers and inverters. |
| Operating Temperature | –40 to 125 °C; qualified per AEC-Q100 Grade 1, suitable for under-hood automotive electronics. |
Pinout & Package
SI8642BT-ASR is housed in a RoHS-compliant wide-body SOIC-16 package (WB SOIC-16, -IS suffix), offering 8 mm creepage and reinforced insulation for 5 kVRMS rating. Pin assignments are validated per Skyworks' official pin description table (Section 5, Si864x Data Sheet Rev. 206329A).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1, GND1 | Input-side power supply | Power domain for channels A1–A4 and EN1; must be bypassed with 0.1 µF capacitor near pin. |
| VDD2, GND2 | Output-side power supply | Independent power domain for B1–B4 and EN2; enables galvanic separation between MCU and power stage. |
| A1–A2 | Input signals (Side A) | Digital inputs referenced to VDD1/GND1; Schmitt-triggered for >0.44 V hysteresis against EMI. |
| B1–B2 | Output signals (Side B) | Isolated outputs referenced to VDD2/GND2; 50 Ω nominal impedance for controlled-impedance PCB routing. |
| EN1 | Enable for A3/A4 outputs | Active-high control: drives A3/A4 into high-impedance when low; internal pull-up allows floating if unused. |
| EN2 | Enable for B1/B2 outputs | Active-high control: disables B1/B2 outputs when low; supports dynamic channel gating in multi-phase systems. |
| NC | No-connect pins | Pins 3, 4, 13, 14 are unconnected; must not be routed or tied to any net per datasheet guidance. |
Key Features
| Feature | Design Value |
|---|---|
| Reinforced VDE 0884-10 certification | Validated 10 kV surge capability and 60-year lifetime at rated working voltage - eliminates need for external transient protection in EV charging stations. |
| Tri-state enable logic | EN1/EN2 independently disable output pairs (A3/A4 and B1/B2), enabling time-multiplexed communication or safe power-down sequencing. |
| Fail-safe low-default mode | Guarantees B1/B2 = low during VDD1 loss - critical for preventing false turn-on in isolated gate driver enable paths. |
| Ultra-low power at 100 Mbps | 11 mA per side (typ) at 5 V/100 Mbps - reduces thermal load in densely packed battery pack monitoring modules. |
| Automotive-grade construction | AEC-Q100 qualified with AIAG-compliant PPAP, IMDS/CAMDS support, and zero-defect manufacturing flow - meets OEM BMS sourcing requirements. |
Applications
| Motor Control Feedback Isolation | Isolated Battery Cell Monitoring |
|---|---|
|
Use Scenario: Isolating encoder/position sensor signals and PWM feedback from gate drivers in 3-phase inverter stacks. IC Role / Device Role / Timing Role: SI8642BT-ASR provides bidirectional, low-skew isolation for current-sense ADC data and gate driver status signals across the isolation barrier. Use Value: 0.5 ns channel-channel skew and 8 ns propagation delay ensure synchronized sampling and fast fault response (<1 µs) in overcurrent protection. |
Use Scenario: Transmitting cell voltage and temperature readings from high-voltage battery strings to a central MCU in EV battery packs. IC Role / Device Role / Timing Role: SI8642BT-ASR isolates daisy-chained ADC outputs while maintaining fail-safe low default during partial power loss. Use Value: 5 kVRMS reinforced isolation and AEC-Q100 qualification meet ISO 26262 ASIL-B requirements for HV battery monitoring. |
| On-Board Charger (OBC) Communication | Traction Inverter Gate Driver Interface |
|
Use Scenario: Isolating CAN or SPI communication between OBC controller and AC/DC front-end power stage in bi-directional chargers. IC Role / Device Role / Timing Role: SI8642BT-ASR carries control commands and telemetry across the isolation barrier with 150 Mbps bandwidth and low jitter. Use Value: 350 ps peak eye diagram jitter preserves signal integrity at 50 MHz clock rates used in high-resolution OBC telemetry. |
Use Scenario: Isolating PWM signals and fault acknowledgments between MCU and isolated gate drivers in 800 V traction inverters. IC Role / Device Role / Timing Role: SI8642BT-ASR transmits dead-time-controlled PWM edges and desaturation fault flags with sub-10 ns timing fidelity. Use Value: 60 kV/µs CMTI prevents false triggering during 5 kV/µs switching transients in SiC-based inverters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM2402BRWZ | 4-channel, 2/2 configuration; 25 kV/µs CMTI; 100 Mbps max; 3.75 kVRMS basic isolation only. | Lacks VDE 0884-10 reinforced rating and automotive qualification; unsuitable for 800 V traction systems. | Choose ADUM2402BRWZ only for cost-sensitive industrial SMPS where 5 kVRMS and AEC-Q100 are not required. |
| ISO6742QDWR | 4-channel, 2/2; 50 kV/µs CMTI; 50 Mbps max; 5 kVRMS reinforced (UL/VDE); no AEC-Q100. | Lower data rate limits use in high-speed SPI or fast ADC links; lacks automotive process controls and PPAP support. | Select ISO6742QDWR for non-automotive 5 kVRMS isolation where 150 Mbps is unnecessary and supply voltage is fixed at 3.3 V. |
Compared with ADUM2402BRWZ and ISO6742QDWR, SI8642BT-ASR uniquely combines 150 Mbps speed, VDE 0884-10 reinforced 5 kVRMS, AEC-Q100 Grade 1, and fail-safe low-default - making it the only drop-in option for next-gen EV battery management and traction inverter designs requiring full automotive compliance and high-speed isolation.
Availability
SI8642BT-ASR is available at Aetrix Electronics and suitable for battery management systems, traction inverters, on-board chargers, and industrial motor drives requiring stable component supply across automotive and industrial lifecycles.
Supply support for SI8642BT-ASR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The SI864x family was designed specifically for high-reliability, high-speed digital isolation in automotive, industrial, and medical systems - delivering RF-based isolation performance with CMOS reliability and AEC-Q100 compliance.
FAQ
What is the isolation rating and certification status of SI8642BT-ASR?
SI8642BT-ASR provides 5 kVRMS reinforced isolation and is certified to VDE 0884-10 (reinforced), UL 1577, CSA 5A, and CQC GB4943.1. It meets IEC 62368-1 and IEC 60601-1 requirements for medical and industrial end equipment. The "T" in the part number explicitly denotes the VDE 0884-10 reinforced variant with 10 kV surge capability.
Does SI8642BT-ASR support fail-safe operation, and how is it configured?
Yes, SI8642BT-ASR has a factory-configured fail-safe mode that defaults outputs to low when the input-side supply (VDD1) is unpowered. This behavior is fixed by ordering code - "B" in SI8642BT-ASR indicates low-default; "E" variants provide high-default. No external configuration is needed.
What are the enable pin functions on SI8642BT-ASR, and how do they map to channels?
SI8642BT-ASR has two enable inputs: EN1 controls outputs A3 and A4; EN2 controls outputs B1 and B2. When an enable pin is low, its associated outputs enter high-impedance state. Both pins have internal pull-ups and may be left floating in noise-controlled environments, but Skyworks recommends tying them to VDD2 or GND for robustness.
Is SI8642BT-ASR qualified for automotive applications, and what documentation is available?
Yes, SI8642BT-ASR is AEC-Q100 Grade 1 qualified (–40 to 125 °C) and manufactured using full automotive process flows. It supports AIAG-compliant PPAP documentation, IMDS and CAMDS material declarations, and zero-defect methodology - all confirmed in Skyworks' official product brief and datasheet revision history.
What package type and footprint does SI8642BT-ASR use, and are there layout considerations?
SI8642BT-ASR uses the wide-body SOIC-16 (-IS) package with 8 mm creepage distance, matching JEDEC MS-013AC. Critical layout practices include placing 0.1 µF bypass capacitors within 2 mm of VDD1/GND1 and VDD2/GND2, avoiding traces near EN1/EN2 in noisy areas, and using controlled-impedance routing for outputs due to their 50 Ω nominal impedance.
SI8642BT-ASR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si864x
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 2/2
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 13ns, 13ns
- Pulse Width Distortion (Max):
- 4.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.375V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI8642BT-ASR FAQ
1.How can I place an order for SI8642BT-ASR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8642BT-ASR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8642BT-ASR reliable?
The price and inventory of SI8642BT-ASR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8642BT-ASR is usually 5 days.
3.What payment methods are accepted for SI8642BT-ASR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8642BT-ASR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8642BT-ASR?
SI8642BT-ASR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8642BT-ASR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8642BT-ASR?
For technical support, including SI8642BT-ASR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8642BT-ASR requirements.
6.How does Aetrix verify that SI8642BT-ASR is sourced from the original manufacturer or authorized distributors?
All SI8642BT-ASR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8642BT-ASR meets industry standards.
7.What is the process for return or replacement of SI8642BT-ASR?
All SI8642BT-ASR units undergo pre-shipment inspection (PSI). If there is an issue with SI8642BT-ASR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8642BT-ASR part is unused and in its original packaging.
Return procedure for SI8642BT-ASR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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