Skyworks Solutions Inc. SI8642EC-AS1
- Part No.:
- SI8642EC-AS1
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI8642EC-AS1.pdf
- Description:
- AUTOMOTIVE 3.75 KV 2 FORWARD & 2
- Quantity:
- Payment:

- Shipping:

Inventory:3,018
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Product details
Overview
SI8642EC-AS1 from Skyworks is a quad-channel digital isolator with 2 input channels on VDD1 side and 2 output channels on VDD2 side, providing reinforced 3.75 kVRMS isolation in a narrow-body SOIC-16 package. It supports DC–150 Mbps data rates, achieves <10 ns propagation delay, features selectable high-default fail-safe mode, and operates across –40 to 125 °C for industrial motor control and isolated ADC interfaces.
For engineers reviewing the SI8642EC-AS1 datasheet, SI8642EC-AS1 pinout, SI8642EC-AS1 application, or SI8642EC-AS1 equivalent, key selection criteria include its 2:2 channel split, 3.75 kVRMS isolation rating, narrow-body SOIC-16 footprint, fail-safe high default state, and automotive-grade AEC-Q100 qualification - all critical for space-constrained, safety-compliant power conversion designs.
Technical Context
The SI8642EC-AS1 implements RF-based on/off keying across a silicon-die isolation barrier, eliminating startup initialization and enabling robust noise immunity without optical components. Its dual enable inputs (EN1, EN2) independently control A3/A4 and B1/B2 outputs, supporting tri-state operation per side.
Each channel integrates Schmitt-trigger inputs (0.44 V hysteresis), 50 Ω nominal output impedance, and undervoltage lockout (UVLO) with 70 mV hysteresis on both VDD1 and VDD2 supplies - ensuring deterministic behavior during brownout and power sequencing in isolated gate driver feedback loops.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | 2 input / 2 output (A3,A4,B1,B2); enables bidirectional signal splitting across isolation barrier |
| Max Data Rate | 150 Mbps - supports high-speed SPI, RS-485 transceiver control, and real-time PWM feedback |
| Isolation Rating | 3.75 kVRMS - certified to UL 1577, CSA 5A, and IEC 60950-1 reinforced insulation |
| Propagation Delay | 8 ns typical - ensures sub-10 ns timing alignment for synchronous sampling in isolated ADC/DAC systems |
| Fail-Safe Default | High - maintains logic-high output during VDD1 loss, critical for safe shutdown in inverter gate drivers |
| Supply Voltage | 2.5–5.5 V - interoperable with 3.3 V microcontrollers and 5 V legacy logic without level shifters |
| Operating Temp | –40 to 125 °C - qualified for under-hood automotive and industrial ambient environments |
Pinout & Package
Narrow-body SOIC-16 (NB SOIC-16), RoHS-compliant, JEDEC-standard 260 °C peak reflow profile, 1.27 mm pitch, 10.3 mm × 7.5 mm body size.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 | Input-side power supply | Supplies 2.5–5.5 V to input-side logic and channel transmitter; bypassed with 0.1 µF capacitor |
| GND1 | Input-side ground reference | Return path for VDD1; must be separated from GND2 by creepage/clearance barrier |
| A3, A4 | Input signals (VDD1 side) | Digital inputs with Schmitt-trigger thresholds (VT+ = 1.67 V typ, VT– = 1.23 V typ) |
| EN1 | Enable for A3/A4 outputs | Active-high control: drives A3/A4 outputs into high-impedance when low |
| VDD2 | Output-side power supply | Supplies 2.5–5.5 V to output-side logic and channel receiver |
| GND2 | Output-side ground reference | Return path for VDD2; galvanically isolated from GND1 |
| B1, B2 | Output signals (VDD2 side) | CMOS outputs with 50 Ω impedance; default high during VDD1 loss (fail-safe mode) |
| EN2 | Enable for B1/B2 outputs | Active-high control: drives B1/B2 outputs into high-impedance when low |
| NC | No-connect terminal | Not internally bonded; may be left floating, tied to VDD2, or grounded |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation architecture | Eliminates LED aging and temperature drift; enables >60-year life at rated working voltage |
| Selectable fail-safe output | Factory-configured high-default state ensures safe system response during primary-side power loss |
| Tri-state enable control | Independent EN1/EN2 pins allow dynamic channel disabling without PCB-level gating logic |
| High CMTI immunity | 60 kV/µs common-mode transient immunity prevents corruption in noisy motor drive environments |
| Low-power operation | 1.8 mA per channel at 1 Mbps (5 V), scaling to 11 mA per channel at 100 Mbps - reduces thermal load in dense layouts |
Applications
| Motor Control Feedback | Isolated ADC Interface |
|---|---|
Use Scenario: Real-time current/voltage sensing in 3-phase inverter legs using shunt resistors and isolated sigma-delta modulators. IC Role / Device Role / Timing Role: Isolates high-speed bitstream from modulator to MCU while maintaining precise timing alignment for sinc filter decimation. Use Value: 8 ns propagation delay and 0.4 ns channel-channel skew preserve phase coherence across dual current-sense channels. | Use Scenario: Transmitting digitized sensor data from isolated high-voltage domains (e.g., battery pack monitoring) to host controller. IC Role / Device Role / Timing Role: Provides galvanic barrier for serial interface (SPI/I²C) between isolated ADC and system MCU. Use Value: 150 Mbps capability supports oversampled ADC data streams without bottlenecking throughput. |
| Industrial PLC I/O Module | On-Board Charger (OBC) Control |
Use Scenario: Digital input conditioning for 24 V DC field sensors in programmable logic controllers with surge-prone wiring. IC Role / Device Role / Timing Role: Translates and isolates discrete sensor states across safety barrier while rejecting EFT bursts. Use Value: Schmitt-trigger inputs with 0.44 V hysteresis suppress noise-induced false triggering in factory-floor EMI environments. | Use Scenario: Isolating gate driver enable signals and fault feedback between AC/DC stage and DC/DC stage in EV on-board chargers. IC Role / Device Role / Timing Role: Delivers fail-safe high default output to keep power stages disabled during primary-side brownout. Use Value: 3.75 kVRMS reinforced isolation meets IEC 62109 and UL 62368-1 requirements for EV charging systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SI8642BB-AS1 | Same 2:2 channel count and NB SOIC-16 package, but default-low fail-safe mode | Suitable where active-low enable or reset assertion is required during power loss | Select when system safety logic mandates low-default outputs on isolation barrier failure |
| ADUM2402BRWZ | 2:2 channel, 2.5 kVRMS isolation, SOIC-16 wide-body, no selectable fail-safe mode (fixed default) | Lacks configurable fail-safe; requires external pull-up/down for default state control | Choose only if 2.5 kVRMS rating suffices and board layout accommodates wider SOIC-16 footprint |
Compared with SI8642BB-AS1, SI8642EC-AS1 provides fail-safe high default essential for active-high enable paths; versus ADUM2402BRWZ, it delivers higher isolation (3.75 vs. 2.5 kVRMS), narrower package, and factory-configured reliability without external biasing.
Availability
SI8642EC-AS1 is available at Aetrix Electronics and suitable for industrial motor control, EV on-board chargers, and isolated data acquisition systems requiring stable component supply, long-term lifecycle support, and AEC-Q100-qualified assurance.
Supply support for SI8642EC-AS1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si864x family is engineered for high-reliability industrial and automotive isolation, delivering ultra-low power, precise timing, and reinforced safety certification in compact packages for next-generation power electronics.
FAQ
What is the isolation rating and safety certification of SI8642EC-AS1?
SI8642EC-AS1 provides 3.75 kVRMS reinforced isolation and is certified to UL 1577, CSA Component Notice 5A, IEC 60950-1, and IEC 62368-1. It meets basic insulation per VDE 0884-10 and carries CQC GB4943.1 approval - making SI8642EC-AS1 suitable for industrial safety-critical systems requiring functional isolation with validated creepage and clearance.
Does SI8642EC-AS1 support tri-state output control, and how is it implemented?
Yes, SI8642EC-AS1 supports independent tri-state control via two enable inputs: EN1 controls outputs A3 and A4, while EN2 controls outputs B1 and B2. When an enable pin is driven low, its associated outputs enter high-impedance state - allowing bus sharing or dynamic channel disable without external logic. This functionality is integral to SI8642EC-AS1's architecture and requires no configuration registers.
What is the default output state of SI8642EC-AS1 during input-side power loss?
SI8642EC-AS1 is factory-configured with high-default fail-safe mode. When VDD1 is unpowered but VDD2 remains active, outputs B1 and B2 maintain logic-high state - a critical safety feature for applications like inverter gate driver enable lines where "off" must be the default during primary-side faults. This behavior is hardwired and does not require external components.
Can SI8642EC-AS1 operate with mixed supply voltages on each side?
Yes, SI8642EC-AS1 supports independent 2.5–5.5 V supplies on VDD1 and VDD2. This allows interfacing a 3.3 V microcontroller (VDD1) with a 5 V FPGA or gate driver IC (VDD2) without level-shifting circuitry. The device maintains full timing specifications and isolation integrity across this voltage range, as verified in Skyworks' Electrical Specifications tables for both 3.3 V and 5 V conditions.
Is SI8642EC-AS1 qualified for automotive applications, and what documentation is available?
Yes, SI8642EC-AS1 is automotive-grade and AEC-Q100 qualified. Its part number suffix "-AS1" denotes automotive manufacturing flow, including AIAG-compliant PPAP documentation, IMDS/CAMDS material declarations, and zero-defect process controls. Full qualification reports and test data are available through Skyworks' automotive support portal upon NDA.
SI8642EC-AS1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si864x
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 2/2
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 3750Vrms
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 13ns, 13ns
- Pulse Width Distortion (Max):
- 4.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.375V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI8642EC-AS1 FAQ
1.How can I place an order for SI8642EC-AS1 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8642EC-AS1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8642EC-AS1 reliable?
The price and inventory of SI8642EC-AS1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8642EC-AS1 is usually 5 days.
3.What payment methods are accepted for SI8642EC-AS1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8642EC-AS1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8642EC-AS1?
SI8642EC-AS1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8642EC-AS1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8642EC-AS1?
For technical support, including SI8642EC-AS1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8642EC-AS1 requirements.
6.How does Aetrix verify that SI8642EC-AS1 is sourced from the original manufacturer or authorized distributors?
All SI8642EC-AS1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8642EC-AS1 meets industry standards.
7.What is the process for return or replacement of SI8642EC-AS1?
All SI8642EC-AS1 units undergo pre-shipment inspection (PSI). If there is an issue with SI8642EC-AS1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8642EC-AS1 part is unused and in its original packaging.
Return procedure for SI8642EC-AS1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8642EC-AS1 Tags
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ISO1212DBQR
Texas Instruments

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ISO6721BDR
Texas Instruments

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SI8710AC-B-ISR
Skyworks Solutions Inc.

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ISO7720FDR
Texas Instruments

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ISO7721DR
Texas Instruments

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ISO7721FDR
Texas Instruments

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SI8710CC-B-ISR
Skyworks Solutions Inc.

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ISO6741FQDWRQ1
Texas Instruments

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ISO7721DWVR
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ISO7762FDBQR
Texas Instruments

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ISO7741DWR
Texas Instruments

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ISO7741FDWR
Texas Instruments
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