Skyworks Solutions Inc. SI8642ET-AS2
- Part No.:
- SI8642ET-AS2
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI8642ET-AS2.pdf
- Description:
- LINEAR IC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI8642ET-AS2 from Skyworks is a quad-channel, 2-input/2-output digital isolator with reinforced 5 kVRMS isolation, 150 Mbps data rate, <10 ns propagation delay, and selectable high-default fail-safe mode. It operates across –40 to 125 °C and supports 2.5–5.5 V dual supplies, enabling robust signal isolation in high-noise motor control and battery management systems.
For engineers reviewing the SI8642ET-AS2 datasheet, SI8642ET-AS2 pinout, SI8642ET-AS2 application, or SI8642ET-AS2 equivalent, this page delivers verified specifications, SOIC-16 wide-body package details, fail-safe output behavior, and automotive-grade AEC-Q100 qualification - all critical for safety-critical isolated interface design.
Technical Context
The SI8642ET-AS2 implements RF-based on/off keying across a semiconductor isolation barrier, eliminating startup initialization and providing inherent noise immunity without optical degradation. Its architecture delivers precise timing with ≤2.5 ns channel-channel skew and ≤4.5 ns pulse width distortion at 150 Mbps.
It features two independent enable inputs (EN1, EN2), each controlling one pair of outputs (A3/A4 and B1/B2 respectively), supporting tri-state operation and multiplexed signal routing. The device maintains stable performance under undervoltage lockout (UVLO) thresholds of 2.24 V (rising) and 2.16 V (falling) per supply rail.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 5 kVRMS reinforced (VDE 0884-10 certified), enabling use in mains-connected industrial and EV traction inverters. |
| Data Rate | DC to 150 Mbps - supports high-speed SPI, RS-485, and PWM feedback loops without timing bottlenecks. |
| Propagation Delay | 5–13 ns (typ. 8 ns) - ensures sub-10 ns latency for real-time control loop closure in motor drives. |
| Supply Voltage | 2.5–5.5 V per side - allows interoperability with 3.3 V microcontrollers and 5 V analog front-ends. |
| Fail-Safe Default | High-output state during input-side power loss - prevents undefined logic states in BMS fault detection paths. |
| Common-Mode Immunity | 60 kV/µs (typ.) - sustains reliable operation amid fast-switching transients in SiC/GaN inverter gate drivers. |
| Operating Temperature | –40 to 125 °C - qualified for under-hood automotive and industrial ambient environments. |
Pinout & Package
SI8642ET-AS2 is housed in a RoHS-compliant wide-body SOIC-16 package (8 mm creepage, -IS2 variant), rated for 5 kVRMS reinforced insulation and compatible with JEDEC J-STD-020 reflow profiles (260 °C peak).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 | Input-side power supply | Supplies power to channels A1–A4 and EN1; must be ≥2.5 V for valid operation. |
| GND1 | Input-side ground reference | Return path for VDD1; requires low-inductance connection to minimize common-mode noise coupling. |
| INA1–INA2 | Input signals to Side A | Digital inputs referenced to VDD1/GND1; Schmitt-triggered for >0.44 V hysteresis against EMI. |
| EN1 | Enable for outputs A3/A4 | Active-high control: drives A3/A4 into high-impedance when low; internally pulled up to VDD1. |
| VDD2 | Output-side power supply | Supplies power to channels B1–B4 and EN2; independent of VDD1 for true galvanic isolation. |
| GND2 | Output-side ground reference | Isolated return path for VDD2; must be physically separated from GND1 per creepage/clearance rules. |
| INB1–INB2 | Input signals to Side B | Inputs referenced to VDD2/GND2; support bidirectional signal flow across isolation barrier. |
| EN2 | Enable for outputs B1/B2 | Active-high control: disables B1/B2 into Hi-Z when low; enables independent channel gating. |
| OUTA3–OUTA4 | Isolated outputs from Side A | Logic-high default during VDD1 loss; 50 Ω nominal output impedance for controlled-impedance PCB routing. |
| OUTB1–OUTB2 | Isolated outputs from Side B | Matched timing with A-side outputs; ≤2.5 ns channel-channel skew ensures synchronized PWM edge delivery. |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation barrier | Eliminates LED aging and CTR drift; guarantees 60-year lifetime at rated working voltage with no calibration needed. |
| Selectable fail-safe mode | Factory-configured high-default output ensures safe shutdown state in BMS and OBC power-loss scenarios. |
| Tri-state outputs with dual enables | EN1/EN2 allow independent gating of A3/A4 and B1/B2 pairs - essential for time-multiplexed sensor interfaces. |
| Ultra-low power at 100 Mbps | 11 mA per side at 5 V/100 Mbps - reduces thermal load in densely packed automotive ECUs and inverters. |
| AEC-Q100 Grade 1 qualification | Validated for automotive use with zero-defect manufacturing flow, PPAP documentation, and IMDS/CAMDS compliance. |
Applications
| Motor Control Systems | Battery Management Systems |
|---|---|
Use Scenario: Isolating gate driver signals and current-sense feedback in 3-phase inverter stages using SiC MOSFETs. IC Role / Device Role / Timing Role: Quad-channel isolator provides independent PWM channel isolation (A3/A4 for upper-leg, B1/B2 for lower-leg) with <2.5 ns skew to maintain dead-time integrity. Use Value: 60 kV/µs CMTI prevents false triggering during 100+ V/ns switching transients; 150 Mbps supports high-resolution current sampling. |
Use Scenario: Isolating cell voltage monitoring and pack-level communication between MCU and analog front-end in EV battery packs. IC Role / Device Role / Timing Role: SI8642ET-AS2 transmits isolated ADC data and control commands across 5 kVRMS barrier with fail-safe high default on loss of MCU supply. Use Value: Reinforced VDE 0884-10 certification meets IEC 62619 requirements; –40 to 125 °C range supports under-pack thermal conditions. |
| On-Board Chargers | Traction Inverters |
Use Scenario: Signal isolation between AC/DC controller and DC/DC stage in bi-directional OBC designs. IC Role / Device Role / Timing Role: SI8642ET-AS2 carries isolated enable, fault, and status signals across primary-secondary boundary with dual enable control for staged power-up sequencing. Use Value: Dual 2.5–5.5 V supply rails interface natively with 3.3 V controllers and 5 V gate drivers; 5 kVRMS rating satisfies UL 60335-1 creepage requirements. |
Use Scenario: Isolating high-side and low-side gate drive signals in multi-level traction inverters with distributed control architecture. IC Role / Device Role / Timing Role: Provides matched propagation delay (<13 ns max) and <2.5 ns channel skew between complementary PWM outputs to prevent shoot-through. Use Value: AEC-Q100 Grade 1 qualification ensures reliability over 15-year vehicle lifetime; wide-body SOIC-16 package supports 8 mm creepage for 800 V bus systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SI8642BT-AS2 | Same package and pinout; default output state is low (vs. high for SI8642ET-AS2). | Suitable where system logic requires active-low fault signaling or reset assertion on power loss. | Select SI8642BT-AS2 only if fail-safe low state aligns with host controller reset architecture. |
| ADUM2402BRWZ | 4-channel, 2/2 configuration; 25 kV/µs CMTI (vs. 60 kV/µs); 100 Mbps max data rate; SOIC-16 narrow body (3.9 mm width). | Limited to lower-noise industrial environments; insufficient for SiC/GaN inverter gate drive isolation. | Choose ADUM2402BRWZ only for cost-sensitive non-automotive applications with <25 kV/µs transient requirements. |
Compared with SI8642BT-AS2, SI8642ET-AS2 provides fail-safe high output for safer BMS fault escalation; compared with ADUM2402BRWZ, it delivers 1.5× higher data rate, 2.4× better CMTI, and automotive qualification - making it the sole option for ISO 26262-compliant traction systems.
Availability
SI8642ET-AS2 is available at Aetrix Electronics and suitable for battery management systems, on-board chargers, traction inverters, and industrial motor drives requiring stable component supply across automotive and industrial lifecycles.
Supply support for SI8642ET-AS2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in high-performance analog semiconductors, specializing in RF, timing, and isolation solutions for wireless, automotive, and industrial markets.
The Si864x family was designed specifically for safety-critical isolated communication in electric vehicles and industrial automation, delivering reinforced insulation, AEC-Q100 qualification, and RF-based reliability beyond optocoupler limitations.
FAQ
What is the isolation rating and certification status of SI8642ET-AS2?
SI8642ET-AS2 provides 5 kVRMS reinforced isolation and is certified to VDE 0884-10, UL 1577, CSA 5A, and CQC GB4943.1 standards. It meets IEC 62368-1 and IEC 60601-1 requirements for reinforced insulation, with surge capability up to 10 kV - validated for use in medical and EV traction systems.
Does SI8642ET-AS2 require external components for stable operation?
Yes - SI8642ET-AS2 requires a 0.1 µF ceramic bypass capacitor between VDD1 and GND1, and another between VDD2 and GND2, placed as close as possible to the pins. No pull-up/down resistors are needed due to internal Schmitt triggers and fail-safe configuration, but series termination (50–300 Ω) is recommended for noisy environments.
How does the fail-safe mode function in SI8642ET-AS2 during power loss?
In SI8642ET-AS2, the fail-safe mode is factory-set to high-default output. When VDD1 is unpowered but VDD2 remains active, outputs A3/A4 and B1/B2 drive logic high within 12 ns (tSD). This ensures defined states in safety-critical paths like BMS fault latches or OBC enable circuits.
What is the maximum data rate supported by SI8642ET-AS2, and how is timing performance characterized?
SI8642ET-AS2 supports up to 150 Mbps with guaranteed minimum pulse width of 5 ns. Its timing is characterized with 5–13 ns propagation delay (typ. 8 ns), ≤2.5 ns channel-channel skew, and ≤4.5 ns pulse width distortion - measured across –40 to 125 °C and 2.5–5.5 V supply ranges per datasheet Table 4.2.
Is SI8642ET-AS2 pin-compatible with other Si864x variants?
Yes - SI8642ET-AS2 shares identical pinout and SOIC-16 wide-body (-AS2) package with all Si8642x variants (e.g., SI8642BB-AS2, SI8642BD-AS2). Differences are limited to isolation rating (5 kVRMS), fail-safe default (high), and VDE 0884-10 reinforcement - no PCB layout changes are required when substituting within the Si8642x family.
SI8642ET-AS2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si864x
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Magnetic Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 2/2
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 13ns, 13ns
- Pulse Width Distortion (Max):
- 4.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.375V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI8642ET-AS2 FAQ
1.How can I place an order for SI8642ET-AS2 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8642ET-AS2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8642ET-AS2 reliable?
The price and inventory of SI8642ET-AS2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8642ET-AS2 is usually 5 days.
3.What payment methods are accepted for SI8642ET-AS2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8642ET-AS2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8642ET-AS2?
SI8642ET-AS2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8642ET-AS2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8642ET-AS2?
For technical support, including SI8642ET-AS2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8642ET-AS2 requirements.
6.How does Aetrix verify that SI8642ET-AS2 is sourced from the original manufacturer or authorized distributors?
All SI8642ET-AS2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8642ET-AS2 meets industry standards.
7.What is the process for return or replacement of SI8642ET-AS2?
All SI8642ET-AS2 units undergo pre-shipment inspection (PSI). If there is an issue with SI8642ET-AS2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8642ET-AS2 part is unused and in its original packaging.
Return procedure for SI8642ET-AS2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8642ET-AS2 Tags
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